Add support for TBM instructions.
gas/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
* doc/c-i386.texi (i386-TBM): New section.
opcodes/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* i386-dis.c (REG_XOP_TBM_01): New.
(REG_XOP_TBM_02): New.
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
entries, and add bextr instruction.
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
(cpu_flags): Add CpuTBM.
* i386-opc.h (CpuTBM) New.
(i386_cpu_flags): Add bit cputbm.
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
blcs, blsfill, blsic, t1mskc, and tzmsk.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated
gas/testsuite
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* gas/i386/tbm.s: New.
* gas/i386/tbm.d: New.
* gas/i386/tbm-intel.d: New.
* gas/i386/x86-64-tbm.s: New.
* gas/i386/x86-64-tbm.d: New.
* gas/i386/x86-64-tbm-intel.d: New.
* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
* gas/i386/arch-10.s: Add a TBM instruction.
* gas/i386/arch-10-1.l: Add TBM instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
2011-01-17 18:40:36 +00:00
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2011-01-17 Quentin Neill <quentin.neill@amd.com>
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* i386-dis.c (REG_XOP_TBM_01): New.
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(REG_XOP_TBM_02): New.
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(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
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(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
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entries, and add bextr instruction.
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* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
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(cpu_flags): Add CpuTBM.
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* i386-opc.h (CpuTBM) New.
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(i386_cpu_flags): Add bit cputbm.
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* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
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blcs, blsfill, blsic, t1mskc, and tzmsk.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Regenerated
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2011-01-12 07:06:29 +00:00
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2011-01-12 DJ Delorie <dj@redhat.com>
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* rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
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2011-01-11 07:22:09 +00:00
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2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
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* mips-dis.c (print_insn_args): Adjust the value to print the real
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offset for "+c" argument.
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2011-01-10 13:51:10 +00:00
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2011-01-10 Nick Clifton <nickc@redhat.com>
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* po/da.po: Updated Danish translation.
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2011-01-06 14:30:43 +00:00
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2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
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* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
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2011-01-05 00:16:57 +00:00
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (REG_VEX_38F3): New.
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(PREFIX_0FBC): Likewise.
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(PREFIX_VEX_38F2): Likewise.
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(PREFIX_VEX_38F3_REG_1): Likewise.
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(PREFIX_VEX_38F3_REG_2): Likewise.
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(PREFIX_VEX_38F3_REG_3): Likewise.
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(PREFIX_VEX_38F7): Likewise.
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(VEX_LEN_38F2_P_0): Likewise.
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(VEX_LEN_38F3_R_1_P_0): Likewise.
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(VEX_LEN_38F3_R_2_P_0): Likewise.
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(VEX_LEN_38F3_R_3_P_0): Likewise.
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(VEX_LEN_38F7_P_0): Likewise.
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(dis386_twobyte): Use PREFIX_0FBC.
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(reg_table): Add REG_VEX_38F3.
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(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
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PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
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PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
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(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
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PREFIX_VEX_38F7.
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(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
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VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
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VEX_LEN_38F7_P_0.
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* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
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(cpu_flags): Add CpuBMI.
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* i386-opc.h (CpuBMI): New.
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(i386_cpu_flags): Add cpubmi.
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* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2011-01-04 20:53:32 +00:00
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (VexGdq): New.
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(OP_VEX): Handle dq_mode.
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2011-01-01 20:55:48 +00:00
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2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update copyright to 2011.
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2011-01-01 16:43:53 +00:00
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For older changes see ChangeLog-2010
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1999-05-03 07:29:11 +00:00
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Local Variables:
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2001-01-11 19:01:42 +00:00
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mode: change-log
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left-margin: 8
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fill-column: 74
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1999-05-03 07:29:11 +00:00
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version-control: never
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End:
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