1997-05-01 22:33:23 +00:00
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/* Simulator instruction extractor for m32r.
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|
* Makefile.in: cgen_maint -> CGEN_MAINT.
* configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
* configure: Regenerate.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate.
* semx.c: Regenerate.
* mloopx.in (icount): Moved here from genmloop.sh.
1998-07-02 01:42:38 +00:00
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|
|
THIS FILE IS MACHINE GENERATED WITH CGEN.
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
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1998-01-20 06:18:51 +00:00
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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1997-05-01 22:33:23 +00:00
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1998-01-20 06:18:51 +00:00
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This file is part of the GNU Simulators.
|
1997-05-01 22:33:23 +00:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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1998-01-20 06:18:51 +00:00
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#define WANT_CPU
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
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|
#define WANT_CPU_M32RB
|
1998-01-20 06:18:51 +00:00
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|
1997-05-01 22:33:23 +00:00
|
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|
#include "sim-main.h"
|
1998-07-21 23:54:10 +00:00
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|
#include "cgen-ops.h"
|
1997-05-01 22:33:23 +00:00
|
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|
#include "cpu-sim.h"
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void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
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|
EX_FN_NAME (m32rb,fmt_add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
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1997-05-01 22:33:23 +00:00
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{
|
1998-04-11 01:26:47 +00:00
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#define FLD(f) abuf->fields.fmt_add.f
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EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
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1998-01-20 06:18:51 +00:00
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1998-04-11 01:26:47 +00:00
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EXTRACT_FMT_ADD_CODE
|
1997-05-01 22:33:23 +00:00
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/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
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FLD (f_r1) = & CPU (h_gr)[f_r1];
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FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
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|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
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abuf->length = length;
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abuf->addr = pc;
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#if WITH_PROFILE_MODEL_P
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/* Record the fields for profiling. */
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if (PROFILE_MODEL_P (current_cpu))
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|
{
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|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
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abuf->h_gr_set = 0 | (1 << f_r1);
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}
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#endif
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#undef FLD
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}
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void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
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|
EX_FN_NAME (m32rb,fmt_add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
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|
{
|
1998-04-11 01:26:47 +00:00
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|
#define FLD(f) abuf->fields.fmt_add3.f
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EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
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|
1998-04-11 01:26:47 +00:00
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EXTRACT_FMT_ADD3_CODE
|
1997-05-01 22:33:23 +00:00
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/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
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FLD (f_r1) = & CPU (h_gr)[f_r1];
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FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1997-05-01 22:33:23 +00:00
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FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
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|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
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|
abuf->length = length;
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abuf->addr = pc;
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|
#if WITH_PROFILE_MODEL_P
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/* Record the fields for profiling. */
|
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|
if (PROFILE_MODEL_P (current_cpu))
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|
{
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|
abuf->h_gr_get = 0 | (1 << f_r2);
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abuf->h_gr_set = 0 | (1 << f_r1);
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|
}
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|
#endif
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|
#undef FLD
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|
}
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|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
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|
EX_FN_NAME (m32rb,fmt_and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
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{
|
1998-04-11 01:26:47 +00:00
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|
#define FLD(f) abuf->fields.fmt_and3.f
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EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
|
1998-01-20 06:18:51 +00:00
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1998-04-11 01:26:47 +00:00
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EXTRACT_FMT_AND3_CODE
|
1997-05-01 22:33:23 +00:00
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/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
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FLD (f_r1) = & CPU (h_gr)[f_r1];
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FLD (f_r2) = & CPU (h_gr)[f_r2];
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FLD (f_uimm16) = f_uimm16;
|
1998-04-11 01:26:47 +00:00
|
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|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_and3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
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|
abuf->length = length;
|
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|
abuf->addr = pc;
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|
|
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|
#if WITH_PROFILE_MODEL_P
|
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|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
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|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1997-05-01 22:33:23 +00:00
|
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|
abuf->h_gr_set = 0 | (1 << f_r1);
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}
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|
#endif
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#undef FLD
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|
}
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|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
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|
EX_FN_NAME (m32rb,fmt_or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
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|
{
|
1998-04-11 01:26:47 +00:00
|
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|
#define FLD(f) abuf->fields.fmt_or3.f
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|
EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
|
1998-01-20 06:18:51 +00:00
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|
1998-04-11 01:26:47 +00:00
|
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|
EXTRACT_FMT_OR3_CODE
|
1997-05-01 22:33:23 +00:00
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|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
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|
FLD (f_r1) = & CPU (h_gr)[f_r1];
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|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1997-05-01 22:33:23 +00:00
|
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|
FLD (f_uimm16) = f_uimm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_or3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "ulo16 0x%x", 'x', f_uimm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
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|
|
abuf->length = length;
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|
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|
abuf->addr = pc;
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|
#if WITH_PROFILE_MODEL_P
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|
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|
/* Record the fields for profiling. */
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|
|
|
if (PROFILE_MODEL_P (current_cpu))
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|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
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|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
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|
}
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|
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|
#endif
|
|
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|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_addi.f
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|
EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
|
1998-01-20 06:18:51 +00:00
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|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ADDI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_simm8) = f_simm8;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addi", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_addv.f
|
|
|
|
EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ADDV_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_addv3.f
|
|
|
|
EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ADDV3_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_addx.f
|
|
|
|
EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ADDX_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bc8.f
|
|
|
|
EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BC8_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp8) = f_disp8;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bc24.f
|
|
|
|
EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BC24_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp24) = f_disp24;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_beq.f
|
|
|
|
EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BEQ_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp16) = f_disp16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_beqz.f
|
|
|
|
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BEQZ_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp16) = f_disp16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bl8.f
|
|
|
|
EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
|
1997-05-01 22:33:23 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BL8_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp8) = f_disp8;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << 14);
|
|
|
|
}
|
|
|
|
#endif
|
1997-05-01 22:33:23 +00:00
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bl24.f
|
|
|
|
EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BL24_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp24) = f_disp24;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << 14);
|
|
|
|
}
|
|
|
|
#endif
|
1997-05-01 22:33:23 +00:00
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bra8.f
|
|
|
|
EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BRA8_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp8) = f_disp8;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_bra24.f
|
|
|
|
EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_BRA24_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-07-21 23:54:10 +00:00
|
|
|
FLD (f_disp24) = f_disp24;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_cmp.f
|
|
|
|
EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_CMP_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_cmpi.f
|
|
|
|
EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_CMPI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_div.f
|
|
|
|
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_DIV_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_jl.f
|
|
|
|
EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_JL_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << 14);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_jmp.f
|
|
|
|
EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_JMP_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ld.f
|
|
|
|
EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LD_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ld_d.f
|
|
|
|
EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1997-05-01 22:33:23 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LD_D_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldb.f
|
|
|
|
EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1997-05-01 22:33:23 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDB_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldb_d.f
|
|
|
|
EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDB_D_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1997-05-01 22:33:23 +00:00
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldh.f
|
|
|
|
EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDH_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldh_d.f
|
|
|
|
EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDH_D_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ld_plus.f
|
|
|
|
EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LD_PLUS_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_plus", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ld24.f
|
|
|
|
EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LD24_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_uimm24) = f_uimm24;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldi8.f
|
|
|
|
EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDI8_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_simm8) = f_simm8;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_ldi16.f
|
|
|
|
EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LDI16_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_lock.f
|
|
|
|
EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_LOCK_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_lock", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-02-20 00:45:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_machi.f
|
|
|
|
EXTRACT_FMT_MACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MACHI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mulhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mulhi.f
|
|
|
|
EXTRACT_FMT_MULHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MULHI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mv.f
|
|
|
|
EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MV_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mvfachi.f
|
|
|
|
EXTRACT_FMT_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MVFACHI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mvfc.f
|
|
|
|
EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MVFC_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = f_r2;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mvtachi.f
|
|
|
|
EXTRACT_FMT_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MVTACHI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_mvtc.f
|
|
|
|
EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_MVTC_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = f_r1;
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_nop.f
|
|
|
|
EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_NOP_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_nop", (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_rac.f
|
|
|
|
EXTRACT_FMT_RAC_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_RAC_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rac", (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_rte.f
|
|
|
|
EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_RTE_CODE
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rte", (char *) 0));
|
* Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_seth.f
|
|
|
|
EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_SETH_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_hi16) = f_hi16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_sll3.f
|
|
|
|
EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_SLL3_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sll3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2);
|
1997-05-01 22:33:23 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_slli.f
|
|
|
|
EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_SLLI_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_uimm5) = f_uimm5;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_st.f
|
|
|
|
EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ST_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_st_d.f
|
|
|
|
EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ST_D_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1997-05-01 22:33:23 +00:00
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
1997-05-01 22:33:23 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_stb.f
|
|
|
|
EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
1998-01-20 06:18:51 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_STB_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_stb_d.f
|
|
|
|
EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_STB_D_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_sth.f
|
|
|
|
EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_STH_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_sth_d.f
|
|
|
|
EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_STH_D_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
|
|
|
FLD (f_simm16) = f_simm16;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_st_plus.f
|
|
|
|
EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_ST_PLUS_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
abuf->h_gr_set = 0 | (1 << f_r2);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_trap.f
|
|
|
|
EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_TRAP_CODE
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
1998-01-20 06:18:51 +00:00
|
|
|
FLD (f_uimm4) = f_uimm4;
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,fmt_unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
{
|
1998-04-11 01:26:47 +00:00
|
|
|
#define FLD(f) abuf->fields.fmt_unlock.f
|
|
|
|
EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
1998-04-11 01:26:47 +00:00
|
|
|
EXTRACT_FMT_UNLOCK_CODE
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
/* Record the fields for the semantic handler. */
|
|
|
|
FLD (f_r1) = & CPU (h_gr)[f_r1];
|
|
|
|
FLD (f_r2) = & CPU (h_gr)[f_r2];
|
1998-04-11 01:26:47 +00:00
|
|
|
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
|
1997-05-01 22:33:23 +00:00
|
|
|
|
|
|
|
abuf->length = length;
|
|
|
|
abuf->addr = pc;
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
|
|
/* Record the fields for profiling. */
|
|
|
|
if (PROFILE_MODEL_P (current_cpu))
|
|
|
|
{
|
1998-06-11 01:04:47 +00:00
|
|
|
abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
|
* Makefile.in (M32R_OBJS): Add cpu.o.
(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
1998-02-18 02:26:47 +00:00
|
|
|
}
|
|
|
|
#endif
|
1997-05-01 22:33:23 +00:00
|
|
|
#undef FLD
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
|
|
|
EX_FN_NAME (m32rb,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
|
1997-05-01 22:33:23 +00:00
|
|
|
{
|
1998-01-20 06:18:51 +00:00
|
|
|
abuf->length = CGEN_BASE_INSN_SIZE;
|
1997-05-01 22:33:23 +00:00
|
|
|
abuf->addr = pc;
|
1998-01-20 06:18:51 +00:00
|
|
|
/* Leave signalling to semantic fn. */
|
|
|
|
}
|
1997-05-01 22:33:23 +00:00
|
|
|
|
1998-01-20 06:18:51 +00:00
|
|
|
#if 0 /*wip*/
|
1997-05-01 22:33:23 +00:00
|
|
|
void
|
Rename cpu m32r to m32rb to distinguish from architecture name.
* Makefile.in (mloop.c): cpu m32r renamed to m32rb.
(stamp-cpu): Ditto.
* sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
* tconfig.in (WANT_CPU_M32RB): Ditto.
* m32r.c (WANT_CPU_M32RB): Ditto.
(*): m32r_ cpu fns renamed to m32rb_.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
* arch.h,arch.c: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* sim-if.c (sim_open): Don't allocate memory on top of any user
specified memory.
(h_gr_get,h_gr_set): Delete.
* sim-main.h (h_gr_get,h_gr_set): Delete.
* traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
a_m32r_h_gr_[gs]et.
1998-08-04 02:52:16 +00:00
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EXC_FN_NAME (m32rb,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
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1997-05-01 22:33:23 +00:00
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{
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1998-01-20 06:18:51 +00:00
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abuf->length = CGEN_BASE_INSN_SIZE;
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1997-05-01 22:33:23 +00:00
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abuf->addr = pc;
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1998-01-20 06:18:51 +00:00
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/* Leave signalling to semantic fn. */
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1997-05-01 22:33:23 +00:00
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}
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#endif
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