1999-04-16 01:35:26 +00:00
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dnl Process this file with autoconf to produce a configure script.
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sinclude(../common/aclocal.m4)
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AC_PREREQ(2.5)dnl
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AC_INIT(Makefile.in)
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SIM_AC_COMMON
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dnl Options available in this module
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SIM_AC_OPTION_INLINE()
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SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
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SIM_AC_OPTION_HOSTENDIAN
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SIM_AC_OPTION_WARNINGS
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# DEPRECATED
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#
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# Instead of defining a `subtarget' macro, code should be checking
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# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
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# in question.
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#
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case "${target}" in
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mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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1999-04-16 01:35:26 +00:00
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*) SIM_SUBTARGET="";;
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esac
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AC_SUBST(SIM_SUBTARGET)
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#
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# Select the byte order of the target
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#
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mips_endian=
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default_endian=
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case "${target}" in
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mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
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1999-04-26 18:34:20 +00:00
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mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
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1999-04-16 01:35:26 +00:00
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mips64*-*-*) default_endian=BIG_ENDIAN ;;
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mips16*-*-*) default_endian=BIG_ENDIAN ;;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa32*-*-*) default_endian=BIG_ENDIAN ;;
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mipsisa64*-*-*) default_endian=BIG_ENDIAN ;;
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1999-04-16 01:35:26 +00:00
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mips*-*-*) default_endian=BIG_ENDIAN ;;
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*) default_endian=BIG_ENDIAN ;;
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esac
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SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
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#
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# Select the bitsize of the target
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#
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mips_addr_bitsize=
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case "${target}" in
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mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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1999-04-16 01:35:26 +00:00
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mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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*) mips_bitsize=64 ; mips_msb=63 ;;
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esac
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SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
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#
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# Select the floating hardware support of the target
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#
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mips_fpu=HARDWARE_FLOATING_POINT
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mips_fpu_bitsize=
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case "${target}" in
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mips*tx39*) mips_fpu=HARD_FLOATING_POINT
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mips_fpu_bitsize=32
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;;
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mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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1999-04-16 01:35:26 +00:00
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mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
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*) mips_fpu=HARD_FLOATING_POINT ;;
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esac
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SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
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#
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# Select the level of SMP support
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#
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case "${target}" in
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*) mips_smp=0 ;;
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esac
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SIM_AC_OPTION_SMP($mips_smp)
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#
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# Select the IGEN architecture
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#
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sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_m16_machine="-M mips16"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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case "${target}" in
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mips*tx39*) sim_gen=IGEN
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sim_igen_filter="32,f"
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sim_igen_machine="-M r3900"
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;;
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mips64vr43*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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;;
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mips64vr5*-*-*) sim_gen=IGEN
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sim_igen_machine="-M vr5000"
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;;
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mips64vr41*) sim_gen=M16
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sim_igen_machine="-M vr4100"
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sim_m16_machine="-M vr4100"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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;;
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mips64*-*-*) sim_igen_filter="32,64,f"
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sim_gen=IGEN
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;;
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mips16*-*-*) sim_gen=M16
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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;;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa32*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips32"
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sim_igen_filter="32,f"
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;;
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2002-06-03 21:00:29 +00:00
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mipsisa64sb1*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips64,sb1"
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sim_igen_filter="32,64,f"
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;;
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2002-03-12 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
* mips.igen (mips32, mips64): New models, add to all instructions
and functions as appropriate.
(loadstore_ea, check_u64): New variant for model mips64.
(check_fmt_p): New variant for models mipsV and mips64, remove
mipsV model marking fro other variant.
(SLL) Rename to...
(SLLa) this.
(CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
for mips32 and mips64.
(DCLO, DCLZ): New instructions for mips64.
2002-03-12 22:53:01 +00:00
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mipsisa64*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips64"
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sim_igen_filter="32,64,f"
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;;
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1999-04-16 01:35:26 +00:00
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mips*lsi*) sim_gen=M16
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sim_igen_machine="-M mipsIII,mips16"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,f"
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sim_m16_filter="16"
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;;
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mips*-*-*) sim_gen=IGEN
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sim_igen_filter="32,f"
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;;
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esac
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sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
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sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
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AC_SUBST(sim_igen_flags)
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AC_SUBST(sim_m16_flags)
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AC_SUBST(sim_gen)
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#
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# Add simulated hardware devices
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#
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hw_enabled=no
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case "${target}" in
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mips*tx39*)
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hw_enabled=yes
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hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
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mips_extra_objs="dv-sockser.o"
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SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
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;;
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*)
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mips_extra_objs=""
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;;
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esac
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SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
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AC_SUBST(mips_extra_objs)
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# Choose simulator engine
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case "${target}" in
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*) mips_igen_engine="engine.o"
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;;
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esac
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AC_SUBST(mips_igen_engine)
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AC_PATH_X
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mips_extra_libs=""
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AC_SUBST(mips_extra_libs)
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AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
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AC_CHECK_LIB(m, fabs)
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AC_CHECK_FUNCS(aint anint sqrt)
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SIM_AC_OUTPUT
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