old-cross-binutils/include/elf/aarch64.h

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/* AArch64 ELF support for BFD.
Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GNU Binutils.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the license, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING3. If not,
see <http://www.gnu.org/licenses/>. */
#ifndef _ELF_AARCH64_H
#define _ELF_AARCH64_H
#include "elf/reloc-macros.h"
/* Processor specific program header types. */
#define PT_AARCH64_ARCHEXT (PT_LOPROC + 0)
/* Additional section types. */
#define SHT_AARCH64_ATTRIBUTES 0x70000003 /* Section holds attributes. */
/* AArch64-specific values for sh_flags. */
#define SHF_ENTRYSECT 0x10000000 /* Section contains an
entry point. */
#define SHF_COMDEF 0x80000000 /* Section may be multiply defined
in the input to a link step. */
/* Relocation types. */
START_RELOC_NUMBERS (elf_aarch64_reloc_type)
/* Null relocations. */
RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
FAKE_RELOC (R_AARCH64_static_min, 256)
RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
/* Basic data relocations. */
/* .xword: (S+A) */
RELOC_NUMBER (R_AARCH64_ABS64, 257)
/* .word: (S+A) */
RELOC_NUMBER (R_AARCH64_ABS32, 258)
/* .half: (S+A) */
RELOC_NUMBER (R_AARCH64_ABS16, 259)
/* .xword: (S+A-P) */
RELOC_NUMBER (R_AARCH64_PREL64, 260)
/* .word: (S+A-P) */
RELOC_NUMBER (R_AARCH64_PREL32, 261)
/* .half: (S+A-P) */
RELOC_NUMBER (R_AARCH64_PREL16, 262)
/* Group relocations to create a 16, 32, 48 or 64 bit
unsigned data or abs address inline. */
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0, 263)
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
/* MOV[ZK]: ((S+A) >> 48) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
/* Group relocations to create high part of a 16, 32, 48 or 64 bit
signed data or abs address inline. Will change instruction
to MOVN or MOVZ depending on sign of calculated value. */
/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
/* MOV[ZN]: ((S+A) >> 16) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
/* MOV[ZN]: ((S+A) >> 32) & 0xffff */
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
addresses: PG(x) is (x & ~0xfff). */
/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
/* ADR: (S+A-P) & 0x1fffff */
RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
/* ADD: (S+A) & 0xfff */
RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
/* LD/ST8: (S+A) & 0xfff */
RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
/* Relocations for control-flow instructions. */
/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
/* 281 unused */
/* B: ((S+A-P) >> 2) & 0x3ffffff. */
RELOC_NUMBER (R_AARCH64_JUMP26, 282)
/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
RELOC_NUMBER (R_AARCH64_CALL26, 283)
/* LD/ST16: (S+A) & 0xffe */
RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
/* LD/ST32: (S+A) & 0xffc */
RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
/* LD/ST64: (S+A) & 0xff8 */
RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
/* LD/ST128: (S+A) & 0xff0 */
RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> bfd/ * bfd-in2.h: Regenerated. * elf64-aarch64.c (elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO. (elf64_aarch64_reloc_map): Add reloc entry. (aarch64_resolve_relocation): Likewise. (bfd_elf_aarch64_put_addend): Likewise. (aarch64_reloc_got_type): Likewise. (elf64_aarch64_final_link_relocate): Likewise. (lf64_aarch64_check_relocs): Likewise. (elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21 reloc. * libbfd.h: Regenerated. * reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc. gas/ * config/tc-aarch64.c (reloc_table): Add reloc to table entry. (parse_address_main): Add support for #:<reloc_op>:<symbol>. (parse_operands): Check for unused reloc. (md_apply_fix): New case for reloc. (aarch64_force_relocation): Likewise. gas/testsuite * gas/aarch64/reloc-insn.d (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test. * gas/aarch64/reloc-insn.s (BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc. include/ * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. ld/testsuite * ld-aarch64/aarch64-elf.exp: New reloc tests. * ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test failure (lower bound overflow). * ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test success (lower bound). * ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test failure (upper bound overflow). * ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test success (upper bound). * ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 16:25:51 +00:00
RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
FAKE_RELOC (R_AARCH64_static_max, 313)
FAKE_RELOC (R_AARCH64_tls_min, 512)
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
FAKE_RELOC (R_AARCH64_tls_max, 552)
FAKE_RELOC (R_AARCH64_tlsdesc_min, 560)
RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12_NC, 563)
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12_NC, 564)
RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
FAKE_RELOC (R_AARCH64_tlsdesc_max, 570)
/* Dynamic relocations */
FAKE_RELOC (R_AARCH64_dyn_min, 1024)
/* Copy symbol at runtime. */
RELOC_NUMBER (R_AARCH64_COPY, 1024)
/* Create GOT entry. */
RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
/* Create PLT entry. */
RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
/* Adjust by program base. */
RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
aarch64: Revert AArch64 ifunc changes. The AArch64 ifunc patch introduced a regression caused by incorrect PLT layout. Revert it until a fix is verified. bfd/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * configure: Regenerated. * configure.in: Remove aarch64 dependency on elf-ifunc.c. * elf64-aarch64.c: Remove objalloc.h include. (elf64_aarch64_howto_dynrelocs): Remove R_AARCH64_IRELATIVE howto. (struct elf64_aarch64_link_hash_table): Remove ifunc related members. (elf_aarch64_local_htab_hash): Remove function. (elf_aarch64_local_htab_eq): Remove function. (elf_aarch64_get_local_sym_hash): Remove function. (elf64_aarch64_link_hash_table_create): Remove local hash table initialization. (elf64_aarch64_final_link_relocate): Remove sym argument and handling of ifunc symbols. (elf64_aarch64_relocate_section): Don't pass sym argument to elf64_aarch64_final_link_relocate. (elf64_aarch64_gc_sweep_hook): Remove handling of ifunc symbols. (elf64_aarch64_adjust_dynamic_symbol): Likewise. (elf64_aarch64_check_relocs): Likewise. (elf64_aarch64_post_process_headers): Remove call to _bfd_elf_set_osabi. (elf64_aarch64_is_function_type): New function. (elf64_aarch64_allocate_dynrelocs): Remove handling of ifunc symbols. (elf_aarch64_allocate_local_dynrelocs): Remove function. (elf64_aarch64_size_dynamic_sections): Remove call to elf_aarch64_allocate_local_dynrelocs. (elf64_aarch64_create_small_pltn_entry): Remove info argument. Remove creation of R_AARCH64_IRELATIVE dynamic relocs. (elf64_aarch64_finish_dynamic_symbol): Remove handling of ifunc symbols. (elf_aarch64_finish_local_dynamic_symbol): Remove function. (elf64_aarch64_finish_dynamic_sections): Remove call to elf_aarch64_finish_local_dynamic_symbol. (elf64_aarch64_add_symbol_hook): Remove function. include/elf/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * aarch64.h: Remove R_AARCH64_IRELATIVE. ld/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * emulparams/aarch64elf.sh: Remove IREL_IN_PLT. ld/testsuite/ChangeLog: 2013-06-19 Will Newton <will.newton@linaro.org> * ld-aarch64/aarch64-elf.exp: Remove ifunc tests. * ld-ifunc/ifunc.exp: Disable ifunc tests on AArch64. * ld-aarch64/ifunc-1-local.d: Remove. * ld-aarch64/ifunc-1-local.s: Likewise. * ld-aarch64/ifunc-1.d: Likewise. * ld-aarch64/ifunc-1.s: Likewise. * ld-aarch64/ifunc-10.d: Likewise. * ld-aarch64/ifunc-10.s: Likewise. * ld-aarch64/ifunc-11.d: Likewise. * ld-aarch64/ifunc-11.s: Likewise. * ld-aarch64/ifunc-12.d: Likewise. * ld-aarch64/ifunc-12.s: Likewise. * ld-aarch64/ifunc-13.d: Likewise. * ld-aarch64/ifunc-13a.s: Likewise. * ld-aarch64/ifunc-13b.s: Likewise. * ld-aarch64/ifunc-14a.d: Likewise. * ld-aarch64/ifunc-14a.s: Likewise. * ld-aarch64/ifunc-14b.d: Likewise. * ld-aarch64/ifunc-14b.s: Likewise. * ld-aarch64/ifunc-14c.d: Likewise. * ld-aarch64/ifunc-14c.s: Likewise. * ld-aarch64/ifunc-14d.d: Likewise. * ld-aarch64/ifunc-14e.d: Likewise. * ld-aarch64/ifunc-14f.d: Likewise. * ld-aarch64/ifunc-15.d: Likewise. * ld-aarch64/ifunc-15.s: Likewise. * ld-aarch64/ifunc-16.d: Likewise. * ld-aarch64/ifunc-16.s: Likewise. * ld-aarch64/ifunc-17a.d: Likewise. * ld-aarch64/ifunc-17a.s: Likewise. * ld-aarch64/ifunc-17b.d: Likewise. * ld-aarch64/ifunc-17b.s: Likewise. * ld-aarch64/ifunc-18a.d: Likewise. * ld-aarch64/ifunc-18a.s: Likewise. * ld-aarch64/ifunc-18b.d: Likewise. * ld-aarch64/ifunc-18b.s: Likewise. * ld-aarch64/ifunc-19a.d: Likewise. * ld-aarch64/ifunc-19a.s: Likewise. * ld-aarch64/ifunc-19b.d: Likewise. * ld-aarch64/ifunc-19b.s: Likewise. * ld-aarch64/ifunc-2-local.d: Likewise. * ld-aarch64/ifunc-2-local.s: Likewise. * ld-aarch64/ifunc-2.d: Likewise. * ld-aarch64/ifunc-2.s: Likewise. * ld-aarch64/ifunc-20.d: Likewise. * ld-aarch64/ifunc-20.s: Likewise. * ld-aarch64/ifunc-3.s: Likewise. * ld-aarch64/ifunc-3a.d: Likewise. * ld-aarch64/ifunc-3b.d: Likewise. * ld-aarch64/ifunc-4.d: Likewise. * ld-aarch64/ifunc-4.s: Likewise. * ld-aarch64/ifunc-4a.d: Likewise. * ld-aarch64/ifunc-5-local.s: Likewise. * ld-aarch64/ifunc-5.s: Likewise. * ld-aarch64/ifunc-5a-local.d: Likewise. * ld-aarch64/ifunc-5a.d: Likewise. * ld-aarch64/ifunc-5b-local.d: Likewise. * ld-aarch64/ifunc-5b.d: Likewise. * ld-aarch64/ifunc-5r-local.d: Likewise. * ld-aarch64/ifunc-6.s: Likewise. * ld-aarch64/ifunc-6a.d: Likewise. * ld-aarch64/ifunc-6b.d: Likewise. * ld-aarch64/ifunc-7.s: Likewise. * ld-aarch64/ifunc-7a.d: Likewise. * ld-aarch64/ifunc-7b.d: Likewise. * ld-aarch64/ifunc-7c.d: Likewise. * ld-aarch64/ifunc-8.d: Likewise. * ld-aarch64/ifunc-8a.s: Likewise. * ld-aarch64/ifunc-8b.s: Likewise. * ld-aarch64/ifunc-9.d: Likewise. * ld-aarch64/ifunc-9.s: Likewise.
2013-06-19 10:30:59 +00:00
FAKE_RELOC (R_AARCH64_dyn_max, 1032)
END_RELOC_NUMBERS (R_AARCH64_end)
#endif /* _ELF_AARCH64_H */