2000-07-07 Michael Snyder <msnyder@cleaver.cygnus.com>
* findvar.c (_initialize_findvar, build_findvar, write_fp, read_fp,
generic_target_write_fp, generic_target_read_fp, write_sp, read_sp,
generic_target_write_sp, generic_target_read_sp, write_pc, read_pc,
generic_target_write_pc, generic_target_read_pc, write_pc_pid,
read_pc_pid, supply_register, write_register_pid, write_register,
read_register_pid, read_register, write_register_bytes,
read_register_bytes, write_register_gen, read_register_gen,
registers_fetched, registers_changed, find_saved_register,
read_relative_register_raw_bytes, default_get_saved_register,
read_relative_register_raw_bytes_for_frame, get_saved_register):
Move from this file into new file regcache.c.
(register_valid, registers_pid, registers): Ditto.
* regcache.c: New file to hold the register cache.
(register_cached): New function to read register_valid array.
* value.h (register_cached): Declare.
* defs.h (default_get_saved_register): Delete decl of static function.
* Makefile.in: Add regcache module.
2000-07-10 06:16:51 +00:00
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/* Cache and manage the values of registers for GDB, the GNU debugger.
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Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "target.h"
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#include "gdbarch.h"
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/*
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* DATA STRUCTURE
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*
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* Here is the actual register cache.
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*/
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/* NOTE: this is a write-back cache. There is no "dirty" bit for
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recording if the register values have been changed (eg. by the
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user). Therefore all registers must be written back to the
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target when appropriate. */
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/* REGISTERS contains the cached register values (in target byte order). */
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char *registers;
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/* REGISTER_VALID is 0 if the register needs to be fetched,
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1 if it has been fetched, and
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-1 if the register value was not available.
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"Not available" means don't try to fetch it again. */
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signed char *register_valid;
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/* The thread/process associated with the current set of registers.
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For now, -1 is special, and means `no current process'. */
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static int registers_pid = -1;
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/*
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* FUNCTIONS:
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*/
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/* REGISTER_CACHED()
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Returns 0 if the value is not in the cache (needs fetch).
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>0 if the value is in the cache.
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<0 if the value is permanently unavailable (don't ask again). */
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int
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register_cached (int regnum)
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{
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return register_valid[regnum];
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}
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/* FIND_SAVED_REGISTER ()
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Return the address in which frame FRAME's value of register REGNUM
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has been saved in memory. Or return zero if it has not been saved.
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If REGNUM specifies the SP, the value we return is actually
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the SP value, not an address where it was saved. */
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CORE_ADDR
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find_saved_register (struct frame_info *frame, int regnum)
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{
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register struct frame_info *frame1 = NULL;
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register CORE_ADDR addr = 0;
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if (frame == NULL) /* No regs saved if want current frame */
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return 0;
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#ifdef HAVE_REGISTER_WINDOWS
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/* We assume that a register in a register window will only be saved
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in one place (since the name changes and/or disappears as you go
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towards inner frames), so we only call get_frame_saved_regs on
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the current frame. This is directly in contradiction to the
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usage below, which assumes that registers used in a frame must be
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saved in a lower (more interior) frame. This change is a result
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of working on a register window machine; get_frame_saved_regs
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always returns the registers saved within a frame, within the
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context (register namespace) of that frame. */
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/* However, note that we don't want this to return anything if
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nothing is saved (if there's a frame inside of this one). Also,
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callers to this routine asking for the stack pointer want the
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stack pointer saved for *this* frame; this is returned from the
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next frame. */
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if (REGISTER_IN_WINDOW_P (regnum))
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{
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frame1 = get_next_frame (frame);
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if (!frame1)
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return 0; /* Registers of this frame are active. */
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/* Get the SP from the next frame in; it will be this
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current frame. */
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if (regnum != SP_REGNUM)
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frame1 = frame;
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FRAME_INIT_SAVED_REGS (frame1);
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return frame1->saved_regs[regnum]; /* ... which might be zero */
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}
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#endif /* HAVE_REGISTER_WINDOWS */
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/* Note that this next routine assumes that registers used in
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frame x will be saved only in the frame that x calls and
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frames interior to it. This is not true on the sparc, but the
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above macro takes care of it, so we should be all right. */
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while (1)
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{
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QUIT;
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frame1 = get_prev_frame (frame1);
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if (frame1 == 0 || frame1 == frame)
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break;
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FRAME_INIT_SAVED_REGS (frame1);
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if (frame1->saved_regs[regnum])
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addr = frame1->saved_regs[regnum];
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}
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return addr;
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}
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/* DEFAULT_GET_SAVED_REGISTER ()
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Find register number REGNUM relative to FRAME and put its (raw,
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target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
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variable was optimized out (and thus can't be fetched). Set *LVAL
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to lval_memory, lval_register, or not_lval, depending on whether
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the value was fetched from memory, from a register, or in a strange
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and non-modifiable way (e.g. a frame pointer which was calculated
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rather than fetched). Set *ADDRP to the address, either in memory
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on as a REGISTER_BYTE offset into the registers array.
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Note that this implementation never sets *LVAL to not_lval. But
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it can be replaced by defining GET_SAVED_REGISTER and supplying
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your own.
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The argument RAW_BUFFER must point to aligned memory. */
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static void
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default_get_saved_register (char *raw_buffer,
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int *optimized,
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CORE_ADDR *addrp,
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struct frame_info *frame,
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int regnum,
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enum lval_type *lval)
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{
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CORE_ADDR addr;
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if (!target_has_registers)
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error ("No registers.");
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/* Normal systems don't optimize out things with register numbers. */
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if (optimized != NULL)
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*optimized = 0;
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addr = find_saved_register (frame, regnum);
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if (addr != 0)
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{
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if (lval != NULL)
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*lval = lval_memory;
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if (regnum == SP_REGNUM)
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{
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if (raw_buffer != NULL)
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{
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/* Put it back in target format. */
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store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
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(LONGEST) addr);
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}
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if (addrp != NULL)
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*addrp = 0;
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return;
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}
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if (raw_buffer != NULL)
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target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
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}
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else
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{
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if (lval != NULL)
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*lval = lval_register;
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addr = REGISTER_BYTE (regnum);
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if (raw_buffer != NULL)
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read_register_gen (regnum, raw_buffer);
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}
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if (addrp != NULL)
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*addrp = addr;
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}
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#if !defined (GET_SAVED_REGISTER)
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#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
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default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
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#endif
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void
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get_saved_register (char *raw_buffer,
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int *optimized,
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CORE_ADDR *addrp,
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struct frame_info *frame,
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int regnum,
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enum lval_type *lval)
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{
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GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
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}
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/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
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Copy the bytes of register REGNUM, relative to the input stack frame,
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into our memory at MYADDR, in target byte order.
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The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
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Returns 1 if could not be read, 0 if could. */
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/* FIXME: This function increases the confusion between FP_REGNUM
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and the virtual/pseudo-frame pointer. */
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static int
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read_relative_register_raw_bytes_for_frame (int regnum,
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char *myaddr,
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struct frame_info *frame)
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{
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int optim;
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if (regnum == FP_REGNUM && frame)
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{
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/* Put it back in target format. */
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store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
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(LONGEST) FRAME_FP (frame));
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return 0;
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}
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get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
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regnum, (enum lval_type *) NULL);
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if (register_valid[regnum] < 0)
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return 1; /* register value not available */
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return optim;
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}
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/* READ_RELATIVE_REGISTER_RAW_BYTES
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Copy the bytes of register REGNUM, relative to the current stack
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frame, into our memory at MYADDR, in target byte order.
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The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
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Returns 1 if could not be read, 0 if could. */
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int
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read_relative_register_raw_bytes (int regnum, char *myaddr)
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{
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return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
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selected_frame);
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}
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/* Low level examining and depositing of registers.
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The caller is responsible for making sure that the inferior is
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stopped before calling the fetching routines, or it will get
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garbage. (a change from GDB version 3, in which the caller got the
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value from the last stop). */
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/* REGISTERS_CHANGED ()
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Indicate that registers may have changed, so invalidate the cache. */
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void
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registers_changed (void)
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{
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int i;
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int numregs = ARCH_NUM_REGS;
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registers_pid = -1;
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/* Force cleanup of any alloca areas if using C alloca instead of
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a builtin alloca. This particular call is used to clean up
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areas allocated by low level target code which may build up
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during lengthy interactions between gdb and the target before
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gdb gives control to the user (ie watchpoints). */
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alloca (0);
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for (i = 0; i < numregs; i++)
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register_valid[i] = 0;
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if (registers_changed_hook)
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registers_changed_hook ();
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}
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/* REGISTERS_FETCHED ()
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Indicate that all registers have been fetched, so mark them all valid. */
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void
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registers_fetched (void)
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{
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int i;
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int numregs = ARCH_NUM_REGS;
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for (i = 0; i < numregs; i++)
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register_valid[i] = 1;
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}
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/* read_register_bytes and write_register_bytes are generally a *BAD*
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idea. They are inefficient because they need to check for partial
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updates, which can only be done by scanning through all of the
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registers and seeing if the bytes that are being read/written fall
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inside of an invalid register. [The main reason this is necessary
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is that register sizes can vary, so a simple index won't suffice.]
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It is far better to call read_register_gen and write_register_gen
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if you want to get at the raw register contents, as it only takes a
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regno as an argument, and therefore can't do a partial register
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update.
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Prior to the recent fixes to check for partial updates, both read
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and write_register_bytes always checked to see if any registers
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were stale, and then called target_fetch_registers (-1) to update
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the whole set. This caused really slowed things down for remote
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targets. */
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/* Copy INLEN bytes of consecutive data from registers
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starting with the INREGBYTE'th byte of register data
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into memory at MYADDR. */
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void
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read_register_bytes (int inregbyte, char *myaddr, int inlen)
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{
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int inregend = inregbyte + inlen;
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int regno;
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if (registers_pid != inferior_pid)
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{
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registers_changed ();
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registers_pid = inferior_pid;
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}
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/* See if we are trying to read bytes from out-of-date registers. If so,
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update just those registers. */
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for (regno = 0; regno < NUM_REGS; regno++)
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{
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int regstart, regend;
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if (register_valid[regno])
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continue;
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if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
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continue;
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regstart = REGISTER_BYTE (regno);
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regend = regstart + REGISTER_RAW_SIZE (regno);
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if (regend <= inregbyte || inregend <= regstart)
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/* The range the user wants to read doesn't overlap with regno. */
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continue;
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|
|
|
|
/* We've found an invalid register where at least one byte will be read.
|
|
|
|
Update it from the target. */
|
|
|
|
target_fetch_registers (regno);
|
|
|
|
|
|
|
|
if (!register_valid[regno])
|
|
|
|
error ("read_register_bytes: Couldn't update register %d.", regno);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (myaddr != NULL)
|
|
|
|
memcpy (myaddr, ®isters[inregbyte], inlen);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read register REGNO into memory at MYADDR, which must be large
|
|
|
|
enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
|
|
|
|
register is known to be the size of a CORE_ADDR or smaller,
|
|
|
|
read_register can be used instead. */
|
|
|
|
|
|
|
|
void
|
|
|
|
read_register_gen (int regno, char *myaddr)
|
|
|
|
{
|
|
|
|
if (registers_pid != inferior_pid)
|
|
|
|
{
|
|
|
|
registers_changed ();
|
|
|
|
registers_pid = inferior_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!register_valid[regno])
|
|
|
|
target_fetch_registers (regno);
|
|
|
|
memcpy (myaddr, ®isters[REGISTER_BYTE (regno)],
|
|
|
|
REGISTER_RAW_SIZE (regno));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Write register REGNO at MYADDR to the target. MYADDR points at
|
|
|
|
REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
|
|
|
|
|
|
|
|
/* Registers we shouldn't try to store. */
|
|
|
|
#if !defined (CANNOT_STORE_REGISTER)
|
|
|
|
#define CANNOT_STORE_REGISTER(regno) 0
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void
|
|
|
|
write_register_gen (int regno, char *myaddr)
|
|
|
|
{
|
|
|
|
int size;
|
|
|
|
|
|
|
|
/* On the sparc, writing %g0 is a no-op, so we don't even want to
|
|
|
|
change the registers array if something writes to this register. */
|
|
|
|
if (CANNOT_STORE_REGISTER (regno))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (registers_pid != inferior_pid)
|
|
|
|
{
|
|
|
|
registers_changed ();
|
|
|
|
registers_pid = inferior_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
size = REGISTER_RAW_SIZE (regno);
|
|
|
|
|
|
|
|
/* If we have a valid copy of the register, and new value == old value,
|
|
|
|
then don't bother doing the actual store. */
|
|
|
|
|
|
|
|
if (register_valid[regno]
|
|
|
|
&& memcmp (®isters[REGISTER_BYTE (regno)], myaddr, size) == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
target_prepare_to_store ();
|
|
|
|
|
|
|
|
memcpy (®isters[REGISTER_BYTE (regno)], myaddr, size);
|
|
|
|
|
|
|
|
register_valid[regno] = 1;
|
|
|
|
|
|
|
|
target_store_registers (regno);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Copy INLEN bytes of consecutive data from memory at MYADDR
|
|
|
|
into registers starting with the MYREGSTART'th byte of register data. */
|
|
|
|
|
|
|
|
void
|
|
|
|
write_register_bytes (int myregstart, char *myaddr, int inlen)
|
|
|
|
{
|
|
|
|
int myregend = myregstart + inlen;
|
|
|
|
int regno;
|
|
|
|
|
|
|
|
target_prepare_to_store ();
|
|
|
|
|
|
|
|
/* Scan through the registers updating any that are covered by the
|
|
|
|
range myregstart<=>myregend using write_register_gen, which does
|
|
|
|
nice things like handling threads, and avoiding updates when the
|
|
|
|
new and old contents are the same. */
|
|
|
|
|
|
|
|
for (regno = 0; regno < NUM_REGS; regno++)
|
|
|
|
{
|
|
|
|
int regstart, regend;
|
|
|
|
|
|
|
|
regstart = REGISTER_BYTE (regno);
|
|
|
|
regend = regstart + REGISTER_RAW_SIZE (regno);
|
|
|
|
|
|
|
|
/* Is this register completely outside the range the user is writing? */
|
|
|
|
if (myregend <= regstart || regend <= myregstart)
|
|
|
|
/* do nothing */ ;
|
|
|
|
|
|
|
|
/* Is this register completely within the range the user is writing? */
|
|
|
|
else if (myregstart <= regstart && regend <= myregend)
|
|
|
|
write_register_gen (regno, myaddr + (regstart - myregstart));
|
|
|
|
|
|
|
|
/* The register partially overlaps the range being written. */
|
|
|
|
else
|
|
|
|
{
|
|
|
|
char regbuf[MAX_REGISTER_RAW_SIZE];
|
|
|
|
/* What's the overlap between this register's bytes and
|
|
|
|
those the caller wants to write? */
|
|
|
|
int overlapstart = max (regstart, myregstart);
|
|
|
|
int overlapend = min (regend, myregend);
|
|
|
|
|
|
|
|
/* We may be doing a partial update of an invalid register.
|
|
|
|
Update it from the target before scribbling on it. */
|
|
|
|
read_register_gen (regno, regbuf);
|
|
|
|
|
|
|
|
memcpy (registers + overlapstart,
|
|
|
|
myaddr + (overlapstart - myregstart),
|
|
|
|
overlapend - overlapstart);
|
|
|
|
|
|
|
|
target_store_registers (regno);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Return the raw contents of register REGNO, regarding it as an
|
|
|
|
integer. This probably should be returning LONGEST rather than
|
|
|
|
CORE_ADDR. */
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
read_register (int regno)
|
|
|
|
{
|
|
|
|
if (registers_pid != inferior_pid)
|
|
|
|
{
|
|
|
|
registers_changed ();
|
|
|
|
registers_pid = inferior_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!register_valid[regno])
|
|
|
|
target_fetch_registers (regno);
|
|
|
|
|
|
|
|
return ((CORE_ADDR)
|
|
|
|
extract_unsigned_integer (®isters[REGISTER_BYTE (regno)],
|
|
|
|
REGISTER_RAW_SIZE (regno)));
|
|
|
|
}
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
read_register_pid (int regno, int pid)
|
|
|
|
{
|
|
|
|
int save_pid;
|
|
|
|
CORE_ADDR retval;
|
|
|
|
|
|
|
|
if (pid == inferior_pid)
|
|
|
|
return read_register (regno);
|
|
|
|
|
|
|
|
save_pid = inferior_pid;
|
|
|
|
|
|
|
|
inferior_pid = pid;
|
|
|
|
|
|
|
|
retval = read_register (regno);
|
|
|
|
|
|
|
|
inferior_pid = save_pid;
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Store VALUE, into the raw contents of register number REGNO. */
|
|
|
|
|
|
|
|
void
|
|
|
|
write_register (int regno, LONGEST val)
|
|
|
|
{
|
|
|
|
PTR buf;
|
|
|
|
int size;
|
|
|
|
|
|
|
|
/* On the sparc, writing %g0 is a no-op, so we don't even want to
|
|
|
|
change the registers array if something writes to this register. */
|
|
|
|
if (CANNOT_STORE_REGISTER (regno))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (registers_pid != inferior_pid)
|
|
|
|
{
|
|
|
|
registers_changed ();
|
|
|
|
registers_pid = inferior_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
size = REGISTER_RAW_SIZE (regno);
|
|
|
|
buf = alloca (size);
|
|
|
|
store_signed_integer (buf, size, (LONGEST) val);
|
|
|
|
|
|
|
|
/* If we have a valid copy of the register, and new value == old value,
|
|
|
|
then don't bother doing the actual store. */
|
|
|
|
|
|
|
|
if (register_valid[regno]
|
|
|
|
&& memcmp (®isters[REGISTER_BYTE (regno)], buf, size) == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
target_prepare_to_store ();
|
|
|
|
|
|
|
|
memcpy (®isters[REGISTER_BYTE (regno)], buf, size);
|
|
|
|
|
|
|
|
register_valid[regno] = 1;
|
|
|
|
|
|
|
|
target_store_registers (regno);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
write_register_pid (int regno, CORE_ADDR val, int pid)
|
|
|
|
{
|
|
|
|
int save_pid;
|
|
|
|
|
|
|
|
if (pid == inferior_pid)
|
|
|
|
{
|
|
|
|
write_register (regno, val);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
save_pid = inferior_pid;
|
|
|
|
|
|
|
|
inferior_pid = pid;
|
|
|
|
|
|
|
|
write_register (regno, val);
|
|
|
|
|
|
|
|
inferior_pid = save_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SUPPLY_REGISTER()
|
|
|
|
|
|
|
|
Record that register REGNO contains VAL. This is used when the
|
|
|
|
value is obtained from the inferior or core dump, so there is no
|
|
|
|
need to store the value there.
|
|
|
|
|
|
|
|
If VAL is a NULL pointer, then it's probably an unsupported register.
|
|
|
|
We just set it's value to all zeros. We might want to record this
|
|
|
|
fact, and report it to the users of read_register and friends. */
|
|
|
|
|
|
|
|
void
|
|
|
|
supply_register (int regno, char *val)
|
|
|
|
{
|
|
|
|
#if 1
|
|
|
|
if (registers_pid != inferior_pid)
|
|
|
|
{
|
|
|
|
registers_changed ();
|
|
|
|
registers_pid = inferior_pid;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
register_valid[regno] = 1;
|
|
|
|
if (val)
|
|
|
|
memcpy (®isters[REGISTER_BYTE (regno)], val,
|
|
|
|
REGISTER_RAW_SIZE (regno));
|
|
|
|
else
|
|
|
|
memset (®isters[REGISTER_BYTE (regno)], '\000',
|
|
|
|
REGISTER_RAW_SIZE (regno));
|
|
|
|
|
|
|
|
/* On some architectures, e.g. HPPA, there are a few stray bits in
|
|
|
|
some registers, that the rest of the code would like to ignore. */
|
|
|
|
|
|
|
|
#ifdef CLEAN_UP_REGISTER_VALUE
|
|
|
|
CLEAN_UP_REGISTER_VALUE (regno, ®isters[REGISTER_BYTE (regno)]);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
|
|
|
|
Special handling for registers PC, SP, and FP. */
|
|
|
|
|
|
|
|
/* This routine is getting awfully cluttered with #if's. It's probably
|
|
|
|
time to turn this into READ_PC and define it in the tm.h file.
|
|
|
|
Ditto for write_pc.
|
|
|
|
|
|
|
|
1999-06-08: The following were re-written so that it assumes the
|
|
|
|
existance of a TARGET_READ_PC et.al. macro. A default generic
|
|
|
|
version of that macro is made available where needed.
|
|
|
|
|
|
|
|
Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
|
|
|
|
by the multi-arch framework, it will eventually be possible to
|
|
|
|
eliminate the intermediate read_pc_pid(). The client would call
|
|
|
|
TARGET_READ_PC directly. (cagney). */
|
|
|
|
|
|
|
|
#ifndef TARGET_READ_PC
|
|
|
|
#define TARGET_READ_PC generic_target_read_pc
|
|
|
|
#endif
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
generic_target_read_pc (int pid)
|
|
|
|
{
|
|
|
|
#ifdef PC_REGNUM
|
|
|
|
if (PC_REGNUM >= 0)
|
|
|
|
{
|
|
|
|
CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
|
|
|
|
return pc_val;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
internal_error ("generic_target_read_pc");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
read_pc_pid (int pid)
|
|
|
|
{
|
|
|
|
int saved_inferior_pid;
|
|
|
|
CORE_ADDR pc_val;
|
|
|
|
|
|
|
|
/* In case pid != inferior_pid. */
|
|
|
|
saved_inferior_pid = inferior_pid;
|
|
|
|
inferior_pid = pid;
|
|
|
|
|
|
|
|
pc_val = TARGET_READ_PC (pid);
|
|
|
|
|
|
|
|
inferior_pid = saved_inferior_pid;
|
|
|
|
return pc_val;
|
|
|
|
}
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
read_pc (void)
|
|
|
|
{
|
|
|
|
return read_pc_pid (inferior_pid);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef TARGET_WRITE_PC
|
|
|
|
#define TARGET_WRITE_PC generic_target_write_pc
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void
|
|
|
|
generic_target_write_pc (CORE_ADDR pc, int pid)
|
|
|
|
{
|
|
|
|
#ifdef PC_REGNUM
|
|
|
|
if (PC_REGNUM >= 0)
|
|
|
|
write_register_pid (PC_REGNUM, pc, pid);
|
|
|
|
if (NPC_REGNUM >= 0)
|
|
|
|
write_register_pid (NPC_REGNUM, pc + 4, pid);
|
|
|
|
if (NNPC_REGNUM >= 0)
|
|
|
|
write_register_pid (NNPC_REGNUM, pc + 8, pid);
|
|
|
|
#else
|
|
|
|
internal_error ("generic_target_write_pc");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
write_pc_pid (CORE_ADDR pc, int pid)
|
|
|
|
{
|
|
|
|
int saved_inferior_pid;
|
|
|
|
|
|
|
|
/* In case pid != inferior_pid. */
|
|
|
|
saved_inferior_pid = inferior_pid;
|
|
|
|
inferior_pid = pid;
|
|
|
|
|
|
|
|
TARGET_WRITE_PC (pc, pid);
|
|
|
|
|
|
|
|
inferior_pid = saved_inferior_pid;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
write_pc (CORE_ADDR pc)
|
|
|
|
{
|
|
|
|
write_pc_pid (pc, inferior_pid);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Cope with strage ways of getting to the stack and frame pointers */
|
|
|
|
|
|
|
|
#ifndef TARGET_READ_SP
|
|
|
|
#define TARGET_READ_SP generic_target_read_sp
|
|
|
|
#endif
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
generic_target_read_sp (void)
|
|
|
|
{
|
|
|
|
#ifdef SP_REGNUM
|
|
|
|
if (SP_REGNUM >= 0)
|
|
|
|
return read_register (SP_REGNUM);
|
|
|
|
#endif
|
|
|
|
internal_error ("generic_target_read_sp");
|
|
|
|
}
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
read_sp (void)
|
|
|
|
{
|
|
|
|
return TARGET_READ_SP ();
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef TARGET_WRITE_SP
|
|
|
|
#define TARGET_WRITE_SP generic_target_write_sp
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void
|
|
|
|
generic_target_write_sp (CORE_ADDR val)
|
|
|
|
{
|
|
|
|
#ifdef SP_REGNUM
|
|
|
|
if (SP_REGNUM >= 0)
|
|
|
|
{
|
|
|
|
write_register (SP_REGNUM, val);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
internal_error ("generic_target_write_sp");
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
write_sp (CORE_ADDR val)
|
|
|
|
{
|
|
|
|
TARGET_WRITE_SP (val);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef TARGET_READ_FP
|
|
|
|
#define TARGET_READ_FP generic_target_read_fp
|
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#endif
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CORE_ADDR
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generic_target_read_fp (void)
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{
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#ifdef FP_REGNUM
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if (FP_REGNUM >= 0)
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return read_register (FP_REGNUM);
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#endif
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internal_error ("generic_target_read_fp");
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}
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CORE_ADDR
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read_fp (void)
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{
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return TARGET_READ_FP ();
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}
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#ifndef TARGET_WRITE_FP
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#define TARGET_WRITE_FP generic_target_write_fp
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#endif
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void
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generic_target_write_fp (CORE_ADDR val)
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{
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#ifdef FP_REGNUM
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if (FP_REGNUM >= 0)
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{
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write_register (FP_REGNUM, val);
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return;
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}
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#endif
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internal_error ("generic_target_write_fp");
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}
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void
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write_fp (CORE_ADDR val)
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{
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TARGET_WRITE_FP (val);
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}
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static void
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build_regcache (void)
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{
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/* We allocate some extra slop since we do a lot of memcpy's around
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`registers', and failing-soft is better than failing hard. */
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int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
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int sizeof_register_valid = NUM_REGS * sizeof (*register_valid);
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registers = xmalloc (sizeof_registers);
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memset (registers, 0, sizeof_registers);
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register_valid = xmalloc (sizeof_register_valid);
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memset (register_valid, 0, sizeof_register_valid);
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}
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void
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_initialize_regcache (void)
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{
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build_regcache ();
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register_gdbarch_swap (®isters, sizeof (registers), NULL);
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register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL);
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register_gdbarch_swap (NULL, 0, build_regcache);
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}
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