2002-02-01 11:44:32 +00:00
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/* Simulator header for sh.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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2006-10-18 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
2006-06-14 Dave Brolley <brolley@redhat.com>
* sh64-sim.h (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
* sh64.c (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
(sh_models): Add sh2e, sh2a, sh2a_nofpu, sh4_nofpu, sh4a,
sh4a_nofpu and sh4al.
(sh2e_mach): New MACH.
(sh2a_fpu_mach): New MACH.
(sh2a_nofpu_mach): New MACH.
(sh4_nofpu): New MACH.
(sh4a_mach): New MACH.
(sh4a_nofpu_mach): New MACH.
(sh4al_mach): New MACH.
* Makefile.in (stamp-*): Depend on $(CGEN_CPU_DIR)/sh-sim.cpu. Pass
archfile to CGEN script.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* cpuall.h: Regenerated.
* decode-compact.c: Regenerated.
* decode-compact.h: Regenerated.
* decode-media.c: Regenerated.
* decode-media.h: Regenerated.
* defs-compact.h: Regenerated.
* defs-media.h: Regenerated.
* sem-compact-switch.c: Regenerated.
* sem-compact.c: Regenerated.
* sem-media-switch.c: Regenerated.
* sem-media.c: Regenerated.
* sh-desc.c: Regenerated.
* sh-desc.h: Regenerated.
* sh-opc.h: Regenerated.
2006-10-18 18:13:22 +00:00
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Copyright 1996-2005 Free Software Foundation, Inc.
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2002-02-01 11:44:32 +00:00
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2006-10-18 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
2006-06-14 Dave Brolley <brolley@redhat.com>
* sh64-sim.h (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
* sh64.c (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
(sh_models): Add sh2e, sh2a, sh2a_nofpu, sh4_nofpu, sh4a,
sh4a_nofpu and sh4al.
(sh2e_mach): New MACH.
(sh2a_fpu_mach): New MACH.
(sh2a_nofpu_mach): New MACH.
(sh4_nofpu): New MACH.
(sh4a_mach): New MACH.
(sh4a_nofpu_mach): New MACH.
(sh4al_mach): New MACH.
* Makefile.in (stamp-*): Depend on $(CGEN_CPU_DIR)/sh-sim.cpu. Pass
archfile to CGEN script.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* cpuall.h: Regenerated.
* decode-compact.c: Regenerated.
* decode-compact.h: Regenerated.
* decode-media.c: Regenerated.
* decode-media.h: Regenerated.
* defs-compact.h: Regenerated.
* defs-media.h: Regenerated.
* sem-compact-switch.c: Regenerated.
* sem-compact.c: Regenerated.
* sem-media-switch.c: Regenerated.
* sem-media.c: Regenerated.
* sh-desc.c: Regenerated.
* sh-desc.h: Regenerated.
* sh-opc.h: Regenerated.
2006-10-18 18:13:22 +00:00
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This file is part of the GNU simulators.
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2002-02-01 11:44:32 +00:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-08-24 14:30:15 +00:00
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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2002-02-01 11:44:32 +00:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2007-08-24 14:30:15 +00:00
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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2002-02-01 11:44:32 +00:00
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*/
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#ifndef SH_ARCH_H
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#define SH_ARCH_H
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#define TARGET_BIG_ENDIAN 1
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/* Enum declaration for model types. */
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typedef enum model_type {
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2006-10-18 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
2006-06-14 Dave Brolley <brolley@redhat.com>
* sh64-sim.h (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
* sh64.c (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
(sh_models): Add sh2e, sh2a, sh2a_nofpu, sh4_nofpu, sh4a,
sh4a_nofpu and sh4al.
(sh2e_mach): New MACH.
(sh2a_fpu_mach): New MACH.
(sh2a_nofpu_mach): New MACH.
(sh4_nofpu): New MACH.
(sh4a_mach): New MACH.
(sh4a_nofpu_mach): New MACH.
(sh4al_mach): New MACH.
* Makefile.in (stamp-*): Depend on $(CGEN_CPU_DIR)/sh-sim.cpu. Pass
archfile to CGEN script.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* cpuall.h: Regenerated.
* decode-compact.c: Regenerated.
* decode-compact.h: Regenerated.
* decode-media.c: Regenerated.
* decode-media.h: Regenerated.
* defs-compact.h: Regenerated.
* defs-media.h: Regenerated.
* sem-compact-switch.c: Regenerated.
* sem-compact.c: Regenerated.
* sem-media-switch.c: Regenerated.
* sem-media.c: Regenerated.
* sh-desc.c: Regenerated.
* sh-desc.h: Regenerated.
* sh-opc.h: Regenerated.
2006-10-18 18:13:22 +00:00
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MODEL_SH2A_NOFPU, MODEL_SH2A_FPU, MODEL_SH4_NOFPU, MODEL_SH4
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, MODEL_SH4A_NOFPU, MODEL_SH4A, MODEL_SH4AL, MODEL_SH5
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, MODEL_SH5_MEDIA, MODEL_SH2, MODEL_SH2E, MODEL_SH3
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, MODEL_SH3E, MODEL_MAX
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2002-02-01 11:44:32 +00:00
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} MODEL_TYPE;
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#define MAX_MODELS ((int) MODEL_MAX)
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/* Enum declaration for unit types. */
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typedef enum unit_type {
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2006-10-18 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
2006-06-14 Dave Brolley <brolley@redhat.com>
* sh64-sim.h (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
* sh64.c (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
(sh_models): Add sh2e, sh2a, sh2a_nofpu, sh4_nofpu, sh4a,
sh4a_nofpu and sh4al.
(sh2e_mach): New MACH.
(sh2a_fpu_mach): New MACH.
(sh2a_nofpu_mach): New MACH.
(sh4_nofpu): New MACH.
(sh4a_mach): New MACH.
(sh4a_nofpu_mach): New MACH.
(sh4al_mach): New MACH.
* Makefile.in (stamp-*): Depend on $(CGEN_CPU_DIR)/sh-sim.cpu. Pass
archfile to CGEN script.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* cpuall.h: Regenerated.
* decode-compact.c: Regenerated.
* decode-compact.h: Regenerated.
* decode-media.c: Regenerated.
* decode-media.h: Regenerated.
* defs-compact.h: Regenerated.
* defs-media.h: Regenerated.
* sem-compact-switch.c: Regenerated.
* sem-compact.c: Regenerated.
* sem-media-switch.c: Regenerated.
* sem-media.c: Regenerated.
* sh-desc.c: Regenerated.
* sh-desc.h: Regenerated.
* sh-opc.h: Regenerated.
2006-10-18 18:13:22 +00:00
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UNIT_NONE, UNIT_SH2A_NOFPU_U_MULR_GR, UNIT_SH2A_NOFPU_U_MULR, UNIT_SH2A_NOFPU_U_TRAP
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, UNIT_SH2A_NOFPU_U_WRITE_BACK, UNIT_SH2A_NOFPU_U_USE_MULTIPLY_RESULT, UNIT_SH2A_NOFPU_U_SHIFT, UNIT_SH2A_NOFPU_U_TAS
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, UNIT_SH2A_NOFPU_U_MULSW, UNIT_SH2A_NOFPU_U_MULL, UNIT_SH2A_NOFPU_U_DMUL, UNIT_SH2A_NOFPU_U_MACL
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, UNIT_SH2A_NOFPU_U_MACW, UNIT_SH2A_NOFPU_U_MULTIPLY, UNIT_SH2A_NOFPU_U_SET_MAC, UNIT_SH2A_NOFPU_U_LOAD_MAC
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, UNIT_SH2A_NOFPU_U_LOAD_VBR, UNIT_SH2A_NOFPU_U_LOAD_GBR, UNIT_SH2A_NOFPU_U_USE_GR, UNIT_SH2A_NOFPU_U_LOAD_GR
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, UNIT_SH2A_NOFPU_U_STC_VBR, UNIT_SH2A_NOFPU_U_LDCL_VBR, UNIT_SH2A_NOFPU_U_LDCL, UNIT_SH2A_NOFPU_U_USE_TBIT
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, UNIT_SH2A_NOFPU_U_LDC_GBR, UNIT_SH2A_NOFPU_U_LDC_SR, UNIT_SH2A_NOFPU_U_SET_SR_BIT, UNIT_SH2A_NOFPU_U_USE_PR
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, UNIT_SH2A_NOFPU_U_LOAD_PR, UNIT_SH2A_NOFPU_U_STS_PR, UNIT_SH2A_NOFPU_U_LDS_PR, UNIT_SH2A_NOFPU_U_MEMORY_ACCESS
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, UNIT_SH2A_NOFPU_U_LOGIC_B, UNIT_SH2A_NOFPU_U_JSR, UNIT_SH2A_NOFPU_U_JMP, UNIT_SH2A_NOFPU_U_BRANCH
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, UNIT_SH2A_NOFPU_U_SX, UNIT_SH2A_NOFPU_U_EXEC, UNIT_SH2A_FPU_U_USE_DR, UNIT_SH2A_FPU_U_LOAD_DR
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, UNIT_SH2A_FPU_U_SET_DR, UNIT_SH2A_FPU_U_MULR_GR, UNIT_SH2A_FPU_U_MULR, UNIT_SH2A_FPU_U_FCNV
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, UNIT_SH2A_FPU_U_FCMP, UNIT_SH2A_FPU_U_FSQRT, UNIT_SH2A_FPU_U_FDIV, UNIT_SH2A_FPU_U_FPU_LOAD_GR
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, UNIT_SH2A_FPU_U_USE_FPSCR, UNIT_SH2A_FPU_U_LDSL_FPSCR, UNIT_SH2A_FPU_U_LDS_FPSCR, UNIT_SH2A_FPU_U_USE_FPUL
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, UNIT_SH2A_FPU_U_FLDS_FPUL, UNIT_SH2A_FPU_U_LOAD_FPUL, UNIT_SH2A_FPU_U_SET_FPUL, UNIT_SH2A_FPU_U_FPU_MEMORY_ACCESS
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, UNIT_SH2A_FPU_U_USE_FR, UNIT_SH2A_FPU_U_SET_FR_0, UNIT_SH2A_FPU_U_SET_FR, UNIT_SH2A_FPU_U_LOAD_FR
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, UNIT_SH2A_FPU_U_MAYBE_FPU, UNIT_SH2A_FPU_U_FPU, UNIT_SH2A_FPU_U_TRAP, UNIT_SH2A_FPU_U_WRITE_BACK
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, UNIT_SH2A_FPU_U_USE_MULTIPLY_RESULT, UNIT_SH2A_FPU_U_SHIFT, UNIT_SH2A_FPU_U_TAS, UNIT_SH2A_FPU_U_MULSW
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, UNIT_SH2A_FPU_U_MULL, UNIT_SH2A_FPU_U_DMUL, UNIT_SH2A_FPU_U_MACL, UNIT_SH2A_FPU_U_MACW
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, UNIT_SH2A_FPU_U_MULTIPLY, UNIT_SH2A_FPU_U_SET_MAC, UNIT_SH2A_FPU_U_LOAD_MAC, UNIT_SH2A_FPU_U_LOAD_VBR
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, UNIT_SH2A_FPU_U_LOAD_GBR, UNIT_SH2A_FPU_U_USE_GR, UNIT_SH2A_FPU_U_LOAD_GR, UNIT_SH2A_FPU_U_STC_VBR
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, UNIT_SH2A_FPU_U_LDCL_VBR, UNIT_SH2A_FPU_U_LDCL, UNIT_SH2A_FPU_U_USE_TBIT, UNIT_SH2A_FPU_U_LDC_GBR
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, UNIT_SH2A_FPU_U_LDC_SR, UNIT_SH2A_FPU_U_SET_SR_BIT, UNIT_SH2A_FPU_U_USE_PR, UNIT_SH2A_FPU_U_LOAD_PR
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, UNIT_SH2A_FPU_U_STS_PR, UNIT_SH2A_FPU_U_LDS_PR, UNIT_SH2A_FPU_U_MEMORY_ACCESS, UNIT_SH2A_FPU_U_LOGIC_B
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, UNIT_SH2A_FPU_U_JSR, UNIT_SH2A_FPU_U_JMP, UNIT_SH2A_FPU_U_BRANCH, UNIT_SH2A_FPU_U_SX
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, UNIT_SH2A_FPU_U_EXEC, UNIT_SH4_NOFPU_U_OCB, UNIT_SH4_NOFPU_U_MULR_GR, UNIT_SH4_NOFPU_U_MULR
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, UNIT_SH4_NOFPU_U_TRAP, UNIT_SH4_NOFPU_U_WRITE_BACK, UNIT_SH4_NOFPU_U_USE_MULTIPLY_RESULT, UNIT_SH4_NOFPU_U_SHIFT
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, UNIT_SH4_NOFPU_U_TAS, UNIT_SH4_NOFPU_U_MULSW, UNIT_SH4_NOFPU_U_MULL, UNIT_SH4_NOFPU_U_DMUL
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, UNIT_SH4_NOFPU_U_MACL, UNIT_SH4_NOFPU_U_MACW, UNIT_SH4_NOFPU_U_MULTIPLY, UNIT_SH4_NOFPU_U_SET_MAC
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, UNIT_SH4_NOFPU_U_LOAD_MAC, UNIT_SH4_NOFPU_U_LOAD_VBR, UNIT_SH4_NOFPU_U_LOAD_GBR, UNIT_SH4_NOFPU_U_USE_GR
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, UNIT_SH4_NOFPU_U_LOAD_GR, UNIT_SH4_NOFPU_U_STC_VBR, UNIT_SH4_NOFPU_U_LDCL_VBR, UNIT_SH4_NOFPU_U_LDCL
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, UNIT_SH4_NOFPU_U_USE_TBIT, UNIT_SH4_NOFPU_U_LDC_GBR, UNIT_SH4_NOFPU_U_LDC_SR, UNIT_SH4_NOFPU_U_SET_SR_BIT
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, UNIT_SH4_NOFPU_U_USE_PR, UNIT_SH4_NOFPU_U_LOAD_PR, UNIT_SH4_NOFPU_U_STS_PR, UNIT_SH4_NOFPU_U_LDS_PR
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, UNIT_SH4_NOFPU_U_MEMORY_ACCESS, UNIT_SH4_NOFPU_U_LOGIC_B, UNIT_SH4_NOFPU_U_JSR, UNIT_SH4_NOFPU_U_JMP
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, UNIT_SH4_NOFPU_U_BRANCH, UNIT_SH4_NOFPU_U_SX, UNIT_SH4_NOFPU_U_EXEC, UNIT_SH4_U_FTRV
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, UNIT_SH4_U_FIPR, UNIT_SH4_U_OCB, UNIT_SH4_U_MULR_GR, UNIT_SH4_U_MULR
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, UNIT_SH4_U_USE_DR, UNIT_SH4_U_LOAD_DR, UNIT_SH4_U_SET_DR, UNIT_SH4_U_FCNV
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, UNIT_SH4_U_FCMP, UNIT_SH4_U_FSQRT, UNIT_SH4_U_FDIV, UNIT_SH4_U_FPU_LOAD_GR
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, UNIT_SH4_U_USE_FPSCR, UNIT_SH4_U_LDSL_FPSCR, UNIT_SH4_U_LDS_FPSCR, UNIT_SH4_U_USE_FPUL
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, UNIT_SH4_U_FLDS_FPUL, UNIT_SH4_U_LOAD_FPUL, UNIT_SH4_U_SET_FPUL, UNIT_SH4_U_FPU_MEMORY_ACCESS
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, UNIT_SH4_U_USE_FR, UNIT_SH4_U_SET_FR_0, UNIT_SH4_U_SET_FR, UNIT_SH4_U_LOAD_FR
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, UNIT_SH4_U_MAYBE_FPU, UNIT_SH4_U_FPU, UNIT_SH4_U_TRAP, UNIT_SH4_U_WRITE_BACK
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, UNIT_SH4_U_USE_MULTIPLY_RESULT, UNIT_SH4_U_SHIFT, UNIT_SH4_U_TAS, UNIT_SH4_U_MULSW
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, UNIT_SH4_U_MULL, UNIT_SH4_U_DMUL, UNIT_SH4_U_MACL, UNIT_SH4_U_MACW
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, UNIT_SH4_U_MULTIPLY, UNIT_SH4_U_SET_MAC, UNIT_SH4_U_LOAD_MAC, UNIT_SH4_U_LOAD_VBR
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, UNIT_SH4_U_LOAD_GBR, UNIT_SH4_U_USE_GR, UNIT_SH4_U_LOAD_GR, UNIT_SH4_U_STC_VBR
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, UNIT_SH4_U_LDCL_VBR, UNIT_SH4_U_LDCL, UNIT_SH4_U_USE_TBIT, UNIT_SH4_U_LDC_GBR
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, UNIT_SH4_U_LDC_SR, UNIT_SH4_U_SET_SR_BIT, UNIT_SH4_U_USE_PR, UNIT_SH4_U_LOAD_PR
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, UNIT_SH4_U_STS_PR, UNIT_SH4_U_LDS_PR, UNIT_SH4_U_MEMORY_ACCESS, UNIT_SH4_U_LOGIC_B
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, UNIT_SH4_U_JSR, UNIT_SH4_U_JMP, UNIT_SH4_U_BRANCH, UNIT_SH4_U_SX
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, UNIT_SH4_U_EXEC, UNIT_SH4A_NOFPU_U_OCB, UNIT_SH4A_NOFPU_U_MULR_GR, UNIT_SH4A_NOFPU_U_MULR
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, UNIT_SH4A_NOFPU_U_FCNV, UNIT_SH4A_NOFPU_U_FCMP, UNIT_SH4A_NOFPU_U_FSQRT, UNIT_SH4A_NOFPU_U_FDIV
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, UNIT_SH4A_NOFPU_U_FPU_LOAD_GR, UNIT_SH4A_NOFPU_U_USE_FPSCR, UNIT_SH4A_NOFPU_U_LDSL_FPSCR, UNIT_SH4A_NOFPU_U_LDS_FPSCR
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, UNIT_SH4A_NOFPU_U_USE_FPUL, UNIT_SH4A_NOFPU_U_FLDS_FPUL, UNIT_SH4A_NOFPU_U_LOAD_FPUL, UNIT_SH4A_NOFPU_U_SET_FPUL
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, UNIT_SH4A_NOFPU_U_FPU_MEMORY_ACCESS, UNIT_SH4A_NOFPU_U_USE_FR, UNIT_SH4A_NOFPU_U_SET_FR_0, UNIT_SH4A_NOFPU_U_SET_FR
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, UNIT_SH4A_NOFPU_U_LOAD_FR, UNIT_SH4A_NOFPU_U_MAYBE_FPU, UNIT_SH4A_NOFPU_U_FPU, UNIT_SH4A_NOFPU_U_TRAP
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, UNIT_SH4A_NOFPU_U_WRITE_BACK, UNIT_SH4A_NOFPU_U_USE_MULTIPLY_RESULT, UNIT_SH4A_NOFPU_U_SHIFT, UNIT_SH4A_NOFPU_U_TAS
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, UNIT_SH4A_NOFPU_U_MULSW, UNIT_SH4A_NOFPU_U_MULL, UNIT_SH4A_NOFPU_U_DMUL, UNIT_SH4A_NOFPU_U_MACL
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, UNIT_SH4A_NOFPU_U_MACW, UNIT_SH4A_NOFPU_U_MULTIPLY, UNIT_SH4A_NOFPU_U_SET_MAC, UNIT_SH4A_NOFPU_U_LOAD_MAC
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, UNIT_SH4A_NOFPU_U_LOAD_VBR, UNIT_SH4A_NOFPU_U_LOAD_GBR, UNIT_SH4A_NOFPU_U_USE_GR, UNIT_SH4A_NOFPU_U_LOAD_GR
|
|
|
|
|
, UNIT_SH4A_NOFPU_U_STC_VBR, UNIT_SH4A_NOFPU_U_LDCL_VBR, UNIT_SH4A_NOFPU_U_LDCL, UNIT_SH4A_NOFPU_U_USE_TBIT
|
|
|
|
|
, UNIT_SH4A_NOFPU_U_LDC_GBR, UNIT_SH4A_NOFPU_U_LDC_SR, UNIT_SH4A_NOFPU_U_SET_SR_BIT, UNIT_SH4A_NOFPU_U_USE_PR
|
|
|
|
|
, UNIT_SH4A_NOFPU_U_LOAD_PR, UNIT_SH4A_NOFPU_U_STS_PR, UNIT_SH4A_NOFPU_U_LDS_PR, UNIT_SH4A_NOFPU_U_MEMORY_ACCESS
|
|
|
|
|
, UNIT_SH4A_NOFPU_U_LOGIC_B, UNIT_SH4A_NOFPU_U_JSR, UNIT_SH4A_NOFPU_U_JMP, UNIT_SH4A_NOFPU_U_BRANCH
|
|
|
|
|
, UNIT_SH4A_NOFPU_U_SX, UNIT_SH4A_NOFPU_U_EXEC, UNIT_SH4A_U_FTRV, UNIT_SH4A_U_FIPR
|
|
|
|
|
, UNIT_SH4A_U_OCB, UNIT_SH4A_U_MULR_GR, UNIT_SH4A_U_MULR, UNIT_SH4A_U_FCNV
|
|
|
|
|
, UNIT_SH4A_U_FCMP, UNIT_SH4A_U_FSQRT, UNIT_SH4A_U_FDIV, UNIT_SH4A_U_FPU_LOAD_GR
|
|
|
|
|
, UNIT_SH4A_U_USE_FPSCR, UNIT_SH4A_U_LDSL_FPSCR, UNIT_SH4A_U_LDS_FPSCR, UNIT_SH4A_U_USE_FPUL
|
|
|
|
|
, UNIT_SH4A_U_FLDS_FPUL, UNIT_SH4A_U_LOAD_FPUL, UNIT_SH4A_U_SET_FPUL, UNIT_SH4A_U_FPU_MEMORY_ACCESS
|
|
|
|
|
, UNIT_SH4A_U_USE_FR, UNIT_SH4A_U_SET_FR_0, UNIT_SH4A_U_SET_FR, UNIT_SH4A_U_LOAD_FR
|
|
|
|
|
, UNIT_SH4A_U_MAYBE_FPU, UNIT_SH4A_U_FPU, UNIT_SH4A_U_TRAP, UNIT_SH4A_U_WRITE_BACK
|
|
|
|
|
, UNIT_SH4A_U_USE_MULTIPLY_RESULT, UNIT_SH4A_U_SHIFT, UNIT_SH4A_U_TAS, UNIT_SH4A_U_MULSW
|
|
|
|
|
, UNIT_SH4A_U_MULL, UNIT_SH4A_U_DMUL, UNIT_SH4A_U_MACL, UNIT_SH4A_U_MACW
|
|
|
|
|
, UNIT_SH4A_U_MULTIPLY, UNIT_SH4A_U_SET_MAC, UNIT_SH4A_U_LOAD_MAC, UNIT_SH4A_U_LOAD_VBR
|
|
|
|
|
, UNIT_SH4A_U_LOAD_GBR, UNIT_SH4A_U_USE_GR, UNIT_SH4A_U_LOAD_GR, UNIT_SH4A_U_STC_VBR
|
|
|
|
|
, UNIT_SH4A_U_LDCL_VBR, UNIT_SH4A_U_LDCL, UNIT_SH4A_U_USE_TBIT, UNIT_SH4A_U_LDC_GBR
|
|
|
|
|
, UNIT_SH4A_U_LDC_SR, UNIT_SH4A_U_SET_SR_BIT, UNIT_SH4A_U_USE_PR, UNIT_SH4A_U_LOAD_PR
|
|
|
|
|
, UNIT_SH4A_U_STS_PR, UNIT_SH4A_U_LDS_PR, UNIT_SH4A_U_MEMORY_ACCESS, UNIT_SH4A_U_LOGIC_B
|
|
|
|
|
, UNIT_SH4A_U_JSR, UNIT_SH4A_U_JMP, UNIT_SH4A_U_BRANCH, UNIT_SH4A_U_SX
|
|
|
|
|
, UNIT_SH4A_U_EXEC, UNIT_SH4AL_U_OCB, UNIT_SH4AL_U_MULR_GR, UNIT_SH4AL_U_MULR
|
|
|
|
|
, UNIT_SH4AL_U_FCNV, UNIT_SH4AL_U_FCMP, UNIT_SH4AL_U_FSQRT, UNIT_SH4AL_U_FDIV
|
|
|
|
|
, UNIT_SH4AL_U_FPU_LOAD_GR, UNIT_SH4AL_U_USE_FPSCR, UNIT_SH4AL_U_LDSL_FPSCR, UNIT_SH4AL_U_LDS_FPSCR
|
|
|
|
|
, UNIT_SH4AL_U_USE_FPUL, UNIT_SH4AL_U_FLDS_FPUL, UNIT_SH4AL_U_LOAD_FPUL, UNIT_SH4AL_U_SET_FPUL
|
|
|
|
|
, UNIT_SH4AL_U_FPU_MEMORY_ACCESS, UNIT_SH4AL_U_USE_FR, UNIT_SH4AL_U_SET_FR_0, UNIT_SH4AL_U_SET_FR
|
|
|
|
|
, UNIT_SH4AL_U_LOAD_FR, UNIT_SH4AL_U_MAYBE_FPU, UNIT_SH4AL_U_FPU, UNIT_SH4AL_U_TRAP
|
|
|
|
|
, UNIT_SH4AL_U_WRITE_BACK, UNIT_SH4AL_U_USE_MULTIPLY_RESULT, UNIT_SH4AL_U_SHIFT, UNIT_SH4AL_U_TAS
|
|
|
|
|
, UNIT_SH4AL_U_MULSW, UNIT_SH4AL_U_MULL, UNIT_SH4AL_U_DMUL, UNIT_SH4AL_U_MACL
|
|
|
|
|
, UNIT_SH4AL_U_MACW, UNIT_SH4AL_U_MULTIPLY, UNIT_SH4AL_U_SET_MAC, UNIT_SH4AL_U_LOAD_MAC
|
|
|
|
|
, UNIT_SH4AL_U_LOAD_VBR, UNIT_SH4AL_U_LOAD_GBR, UNIT_SH4AL_U_USE_GR, UNIT_SH4AL_U_LOAD_GR
|
|
|
|
|
, UNIT_SH4AL_U_STC_VBR, UNIT_SH4AL_U_LDCL_VBR, UNIT_SH4AL_U_LDCL, UNIT_SH4AL_U_USE_TBIT
|
|
|
|
|
, UNIT_SH4AL_U_LDC_GBR, UNIT_SH4AL_U_LDC_SR, UNIT_SH4AL_U_SET_SR_BIT, UNIT_SH4AL_U_USE_PR
|
|
|
|
|
, UNIT_SH4AL_U_LOAD_PR, UNIT_SH4AL_U_STS_PR, UNIT_SH4AL_U_LDS_PR, UNIT_SH4AL_U_MEMORY_ACCESS
|
|
|
|
|
, UNIT_SH4AL_U_LOGIC_B, UNIT_SH4AL_U_JSR, UNIT_SH4AL_U_JMP, UNIT_SH4AL_U_BRANCH
|
|
|
|
|
, UNIT_SH4AL_U_SX, UNIT_SH4AL_U_EXEC, UNIT_SH5_U_FTRV, UNIT_SH5_U_FIPR
|
|
|
|
|
, UNIT_SH5_U_OCB, UNIT_SH5_U_MULR_GR, UNIT_SH5_U_MULR, UNIT_SH5_U_USE_DR
|
|
|
|
|
, UNIT_SH5_U_LOAD_DR, UNIT_SH5_U_SET_DR, UNIT_SH5_U_FCNV, UNIT_SH5_U_FCMP
|
|
|
|
|
, UNIT_SH5_U_FSQRT, UNIT_SH5_U_FDIV, UNIT_SH5_U_FPU_LOAD_GR, UNIT_SH5_U_USE_FPSCR
|
|
|
|
|
, UNIT_SH5_U_LDSL_FPSCR, UNIT_SH5_U_LDS_FPSCR, UNIT_SH5_U_USE_FPUL, UNIT_SH5_U_FLDS_FPUL
|
|
|
|
|
, UNIT_SH5_U_LOAD_FPUL, UNIT_SH5_U_SET_FPUL, UNIT_SH5_U_FPU_MEMORY_ACCESS, UNIT_SH5_U_USE_FR
|
|
|
|
|
, UNIT_SH5_U_SET_FR_0, UNIT_SH5_U_SET_FR, UNIT_SH5_U_LOAD_FR, UNIT_SH5_U_MAYBE_FPU
|
|
|
|
|
, UNIT_SH5_U_FPU, UNIT_SH5_U_TRAP, UNIT_SH5_U_WRITE_BACK, UNIT_SH5_U_USE_MULTIPLY_RESULT
|
|
|
|
|
, UNIT_SH5_U_SHIFT, UNIT_SH5_U_TAS, UNIT_SH5_U_MULSW, UNIT_SH5_U_MULL
|
|
|
|
|
, UNIT_SH5_U_DMUL, UNIT_SH5_U_MACL, UNIT_SH5_U_MACW, UNIT_SH5_U_MULTIPLY
|
|
|
|
|
, UNIT_SH5_U_SET_MAC, UNIT_SH5_U_LOAD_MAC, UNIT_SH5_U_LOAD_VBR, UNIT_SH5_U_LOAD_GBR
|
|
|
|
|
, UNIT_SH5_U_USE_GR, UNIT_SH5_U_LOAD_GR, UNIT_SH5_U_STC_VBR, UNIT_SH5_U_LDCL_VBR
|
|
|
|
|
, UNIT_SH5_U_LDCL, UNIT_SH5_U_USE_TBIT, UNIT_SH5_U_LDC_GBR, UNIT_SH5_U_LDC_SR
|
|
|
|
|
, UNIT_SH5_U_SET_SR_BIT, UNIT_SH5_U_USE_PR, UNIT_SH5_U_LOAD_PR, UNIT_SH5_U_STS_PR
|
|
|
|
|
, UNIT_SH5_U_LDS_PR, UNIT_SH5_U_MEMORY_ACCESS, UNIT_SH5_U_LOGIC_B, UNIT_SH5_U_JSR
|
|
|
|
|
, UNIT_SH5_U_JMP, UNIT_SH5_U_BRANCH, UNIT_SH5_U_SX, UNIT_SH5_U_EXEC
|
|
|
|
|
, UNIT_SH5_MEDIA_U_PUTCFG, UNIT_SH5_MEDIA_U_GETCFG, UNIT_SH5_MEDIA_U_PT, UNIT_SH5_MEDIA_U_FTRVS
|
|
|
|
|
, UNIT_SH5_MEDIA_U_FSQRTD, UNIT_SH5_MEDIA_U_FDIVD, UNIT_SH5_MEDIA_U_COND_BRANCH, UNIT_SH5_MEDIA_U_BLINK
|
|
|
|
|
, UNIT_SH5_MEDIA_U_USE_TR, UNIT_SH5_MEDIA_U_USE_MTRX, UNIT_SH5_MEDIA_U_USE_FV, UNIT_SH5_MEDIA_U_USE_FP
|
|
|
|
|
, UNIT_SH5_MEDIA_U_LOAD_MTRX, UNIT_SH5_MEDIA_U_LOAD_FV, UNIT_SH5_MEDIA_U_LOAD_FP, UNIT_SH5_MEDIA_U_SET_MTRX
|
|
|
|
|
, UNIT_SH5_MEDIA_U_SET_FV, UNIT_SH5_MEDIA_U_SET_FP, UNIT_SH5_MEDIA_U_SET_GR, UNIT_SH5_MEDIA_U_FTRV
|
|
|
|
|
, UNIT_SH5_MEDIA_U_FIPR, UNIT_SH5_MEDIA_U_OCB, UNIT_SH5_MEDIA_U_MULR_GR, UNIT_SH5_MEDIA_U_MULR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_USE_DR, UNIT_SH5_MEDIA_U_LOAD_DR, UNIT_SH5_MEDIA_U_SET_DR, UNIT_SH5_MEDIA_U_FCNV
|
|
|
|
|
, UNIT_SH5_MEDIA_U_FCMP, UNIT_SH5_MEDIA_U_FSQRT, UNIT_SH5_MEDIA_U_FDIV, UNIT_SH5_MEDIA_U_FPU_LOAD_GR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_USE_FPSCR, UNIT_SH5_MEDIA_U_LDSL_FPSCR, UNIT_SH5_MEDIA_U_LDS_FPSCR, UNIT_SH5_MEDIA_U_USE_FPUL
|
|
|
|
|
, UNIT_SH5_MEDIA_U_FLDS_FPUL, UNIT_SH5_MEDIA_U_LOAD_FPUL, UNIT_SH5_MEDIA_U_SET_FPUL, UNIT_SH5_MEDIA_U_FPU_MEMORY_ACCESS
|
|
|
|
|
, UNIT_SH5_MEDIA_U_USE_FR, UNIT_SH5_MEDIA_U_SET_FR_0, UNIT_SH5_MEDIA_U_SET_FR, UNIT_SH5_MEDIA_U_LOAD_FR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_MAYBE_FPU, UNIT_SH5_MEDIA_U_FPU, UNIT_SH5_MEDIA_U_TRAP, UNIT_SH5_MEDIA_U_WRITE_BACK
|
|
|
|
|
, UNIT_SH5_MEDIA_U_USE_MULTIPLY_RESULT, UNIT_SH5_MEDIA_U_SHIFT, UNIT_SH5_MEDIA_U_TAS, UNIT_SH5_MEDIA_U_MULSW
|
|
|
|
|
, UNIT_SH5_MEDIA_U_MULL, UNIT_SH5_MEDIA_U_DMUL, UNIT_SH5_MEDIA_U_MACL, UNIT_SH5_MEDIA_U_MACW
|
|
|
|
|
, UNIT_SH5_MEDIA_U_MULTIPLY, UNIT_SH5_MEDIA_U_SET_MAC, UNIT_SH5_MEDIA_U_LOAD_MAC, UNIT_SH5_MEDIA_U_LOAD_VBR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_LOAD_GBR, UNIT_SH5_MEDIA_U_USE_GR, UNIT_SH5_MEDIA_U_LOAD_GR, UNIT_SH5_MEDIA_U_STC_VBR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_LDCL_VBR, UNIT_SH5_MEDIA_U_LDCL, UNIT_SH5_MEDIA_U_USE_TBIT, UNIT_SH5_MEDIA_U_LDC_GBR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_LDC_SR, UNIT_SH5_MEDIA_U_SET_SR_BIT, UNIT_SH5_MEDIA_U_USE_PR, UNIT_SH5_MEDIA_U_LOAD_PR
|
|
|
|
|
, UNIT_SH5_MEDIA_U_STS_PR, UNIT_SH5_MEDIA_U_LDS_PR, UNIT_SH5_MEDIA_U_MEMORY_ACCESS, UNIT_SH5_MEDIA_U_LOGIC_B
|
|
|
|
|
, UNIT_SH5_MEDIA_U_JSR, UNIT_SH5_MEDIA_U_JMP, UNIT_SH5_MEDIA_U_BRANCH, UNIT_SH5_MEDIA_U_SX
|
|
|
|
|
, UNIT_SH5_MEDIA_U_EXEC, UNIT_SH2_U_TRAP, UNIT_SH2_U_WRITE_BACK, UNIT_SH2_U_USE_MULTIPLY_RESULT
|
|
|
|
|
, UNIT_SH2_U_SHIFT, UNIT_SH2_U_TAS, UNIT_SH2_U_MULSW, UNIT_SH2_U_MULL
|
|
|
|
|
, UNIT_SH2_U_DMUL, UNIT_SH2_U_MACL, UNIT_SH2_U_MACW, UNIT_SH2_U_MULTIPLY
|
|
|
|
|
, UNIT_SH2_U_SET_MAC, UNIT_SH2_U_LOAD_MAC, UNIT_SH2_U_LOAD_VBR, UNIT_SH2_U_LOAD_GBR
|
|
|
|
|
, UNIT_SH2_U_USE_GR, UNIT_SH2_U_LOAD_GR, UNIT_SH2_U_STC_VBR, UNIT_SH2_U_LDCL_VBR
|
|
|
|
|
, UNIT_SH2_U_LDCL, UNIT_SH2_U_USE_TBIT, UNIT_SH2_U_LDC_GBR, UNIT_SH2_U_LDC_SR
|
|
|
|
|
, UNIT_SH2_U_SET_SR_BIT, UNIT_SH2_U_USE_PR, UNIT_SH2_U_LOAD_PR, UNIT_SH2_U_STS_PR
|
|
|
|
|
, UNIT_SH2_U_LDS_PR, UNIT_SH2_U_MEMORY_ACCESS, UNIT_SH2_U_LOGIC_B, UNIT_SH2_U_JSR
|
|
|
|
|
, UNIT_SH2_U_JMP, UNIT_SH2_U_BRANCH, UNIT_SH2_U_SX, UNIT_SH2_U_EXEC
|
|
|
|
|
, UNIT_SH2E_U_FCNV, UNIT_SH2E_U_FCMP, UNIT_SH2E_U_FSQRT, UNIT_SH2E_U_FDIV
|
|
|
|
|
, UNIT_SH2E_U_FPU_LOAD_GR, UNIT_SH2E_U_USE_FPSCR, UNIT_SH2E_U_LDSL_FPSCR, UNIT_SH2E_U_LDS_FPSCR
|
|
|
|
|
, UNIT_SH2E_U_USE_FPUL, UNIT_SH2E_U_FLDS_FPUL, UNIT_SH2E_U_LOAD_FPUL, UNIT_SH2E_U_SET_FPUL
|
|
|
|
|
, UNIT_SH2E_U_FPU_MEMORY_ACCESS, UNIT_SH2E_U_USE_FR, UNIT_SH2E_U_SET_FR_0, UNIT_SH2E_U_SET_FR
|
|
|
|
|
, UNIT_SH2E_U_LOAD_FR, UNIT_SH2E_U_MAYBE_FPU, UNIT_SH2E_U_FPU, UNIT_SH2E_U_TRAP
|
|
|
|
|
, UNIT_SH2E_U_WRITE_BACK, UNIT_SH2E_U_USE_MULTIPLY_RESULT, UNIT_SH2E_U_SHIFT, UNIT_SH2E_U_TAS
|
|
|
|
|
, UNIT_SH2E_U_MULSW, UNIT_SH2E_U_MULL, UNIT_SH2E_U_DMUL, UNIT_SH2E_U_MACL
|
|
|
|
|
, UNIT_SH2E_U_MACW, UNIT_SH2E_U_MULTIPLY, UNIT_SH2E_U_SET_MAC, UNIT_SH2E_U_LOAD_MAC
|
|
|
|
|
, UNIT_SH2E_U_LOAD_VBR, UNIT_SH2E_U_LOAD_GBR, UNIT_SH2E_U_USE_GR, UNIT_SH2E_U_LOAD_GR
|
|
|
|
|
, UNIT_SH2E_U_STC_VBR, UNIT_SH2E_U_LDCL_VBR, UNIT_SH2E_U_LDCL, UNIT_SH2E_U_USE_TBIT
|
|
|
|
|
, UNIT_SH2E_U_LDC_GBR, UNIT_SH2E_U_LDC_SR, UNIT_SH2E_U_SET_SR_BIT, UNIT_SH2E_U_USE_PR
|
|
|
|
|
, UNIT_SH2E_U_LOAD_PR, UNIT_SH2E_U_STS_PR, UNIT_SH2E_U_LDS_PR, UNIT_SH2E_U_MEMORY_ACCESS
|
|
|
|
|
, UNIT_SH2E_U_LOGIC_B, UNIT_SH2E_U_JSR, UNIT_SH2E_U_JMP, UNIT_SH2E_U_BRANCH
|
|
|
|
|
, UNIT_SH2E_U_SX, UNIT_SH2E_U_EXEC, UNIT_SH3_U_TRAP, UNIT_SH3_U_WRITE_BACK
|
|
|
|
|
, UNIT_SH3_U_USE_MULTIPLY_RESULT, UNIT_SH3_U_SHIFT, UNIT_SH3_U_TAS, UNIT_SH3_U_MULSW
|
|
|
|
|
, UNIT_SH3_U_MULL, UNIT_SH3_U_DMUL, UNIT_SH3_U_MACL, UNIT_SH3_U_MACW
|
|
|
|
|
, UNIT_SH3_U_MULTIPLY, UNIT_SH3_U_SET_MAC, UNIT_SH3_U_LOAD_MAC, UNIT_SH3_U_LOAD_VBR
|
|
|
|
|
, UNIT_SH3_U_LOAD_GBR, UNIT_SH3_U_USE_GR, UNIT_SH3_U_LOAD_GR, UNIT_SH3_U_STC_VBR
|
|
|
|
|
, UNIT_SH3_U_LDCL_VBR, UNIT_SH3_U_LDCL, UNIT_SH3_U_USE_TBIT, UNIT_SH3_U_LDC_GBR
|
|
|
|
|
, UNIT_SH3_U_LDC_SR, UNIT_SH3_U_SET_SR_BIT, UNIT_SH3_U_USE_PR, UNIT_SH3_U_LOAD_PR
|
|
|
|
|
, UNIT_SH3_U_STS_PR, UNIT_SH3_U_LDS_PR, UNIT_SH3_U_MEMORY_ACCESS, UNIT_SH3_U_LOGIC_B
|
|
|
|
|
, UNIT_SH3_U_JSR, UNIT_SH3_U_JMP, UNIT_SH3_U_BRANCH, UNIT_SH3_U_SX
|
|
|
|
|
, UNIT_SH3_U_EXEC, UNIT_SH3E_U_FCNV, UNIT_SH3E_U_FCMP, UNIT_SH3E_U_FSQRT
|
|
|
|
|
, UNIT_SH3E_U_FDIV, UNIT_SH3E_U_FPU_LOAD_GR, UNIT_SH3E_U_USE_FPSCR, UNIT_SH3E_U_LDSL_FPSCR
|
|
|
|
|
, UNIT_SH3E_U_LDS_FPSCR, UNIT_SH3E_U_USE_FPUL, UNIT_SH3E_U_FLDS_FPUL, UNIT_SH3E_U_LOAD_FPUL
|
|
|
|
|
, UNIT_SH3E_U_SET_FPUL, UNIT_SH3E_U_FPU_MEMORY_ACCESS, UNIT_SH3E_U_USE_FR, UNIT_SH3E_U_SET_FR_0
|
|
|
|
|
, UNIT_SH3E_U_SET_FR, UNIT_SH3E_U_LOAD_FR, UNIT_SH3E_U_MAYBE_FPU, UNIT_SH3E_U_FPU
|
|
|
|
|
, UNIT_SH3E_U_TRAP, UNIT_SH3E_U_WRITE_BACK, UNIT_SH3E_U_USE_MULTIPLY_RESULT, UNIT_SH3E_U_SHIFT
|
|
|
|
|
, UNIT_SH3E_U_TAS, UNIT_SH3E_U_MULSW, UNIT_SH3E_U_MULL, UNIT_SH3E_U_DMUL
|
|
|
|
|
, UNIT_SH3E_U_MACL, UNIT_SH3E_U_MACW, UNIT_SH3E_U_MULTIPLY, UNIT_SH3E_U_SET_MAC
|
|
|
|
|
, UNIT_SH3E_U_LOAD_MAC, UNIT_SH3E_U_LOAD_VBR, UNIT_SH3E_U_LOAD_GBR, UNIT_SH3E_U_USE_GR
|
|
|
|
|
, UNIT_SH3E_U_LOAD_GR, UNIT_SH3E_U_STC_VBR, UNIT_SH3E_U_LDCL_VBR, UNIT_SH3E_U_LDCL
|
|
|
|
|
, UNIT_SH3E_U_USE_TBIT, UNIT_SH3E_U_LDC_GBR, UNIT_SH3E_U_LDC_SR, UNIT_SH3E_U_SET_SR_BIT
|
|
|
|
|
, UNIT_SH3E_U_USE_PR, UNIT_SH3E_U_LOAD_PR, UNIT_SH3E_U_STS_PR, UNIT_SH3E_U_LDS_PR
|
|
|
|
|
, UNIT_SH3E_U_MEMORY_ACCESS, UNIT_SH3E_U_LOGIC_B, UNIT_SH3E_U_JSR, UNIT_SH3E_U_JMP
|
|
|
|
|
, UNIT_SH3E_U_BRANCH, UNIT_SH3E_U_SX, UNIT_SH3E_U_EXEC, UNIT_MAX
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2002-02-01 11:44:32 +00:00
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} UNIT_TYPE;
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2006-10-18 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
2006-06-14 Dave Brolley <brolley@redhat.com>
* sh64-sim.h (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
* sh64.c (sh64_fipr,sh64_fiprs,sh64_fldp,sh64_fstp,sh64_ftrv)
(sh64_fpref): New functions.
(sh_models): Add sh2e, sh2a, sh2a_nofpu, sh4_nofpu, sh4a,
sh4a_nofpu and sh4al.
(sh2e_mach): New MACH.
(sh2a_fpu_mach): New MACH.
(sh2a_nofpu_mach): New MACH.
(sh4_nofpu): New MACH.
(sh4a_mach): New MACH.
(sh4a_nofpu_mach): New MACH.
(sh4al_mach): New MACH.
* Makefile.in (stamp-*): Depend on $(CGEN_CPU_DIR)/sh-sim.cpu. Pass
archfile to CGEN script.
* arch.c: Regenerated.
* arch.h: Regenerated.
* cpu.c: Regenerated.
* cpu.h: Regenerated.
* cpuall.h: Regenerated.
* decode-compact.c: Regenerated.
* decode-compact.h: Regenerated.
* decode-media.c: Regenerated.
* decode-media.h: Regenerated.
* defs-compact.h: Regenerated.
* defs-media.h: Regenerated.
* sem-compact-switch.c: Regenerated.
* sem-compact.c: Regenerated.
* sem-media-switch.c: Regenerated.
* sem-media.c: Regenerated.
* sh-desc.c: Regenerated.
* sh-desc.h: Regenerated.
* sh-opc.h: Regenerated.
2006-10-18 18:13:22 +00:00
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#define MAX_UNITS (9)
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2002-02-01 11:44:32 +00:00
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#endif /* SH_ARCH_H */
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