1996-10-31 02:27:58 +00:00
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/* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
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Copyright 1996, Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "obstack.h"
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#include "target.h"
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#include "value.h"
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#include "bfd.h"
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#include "gdb_string.h"
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#include "gdbcore.h"
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#include "symfile.h"
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struct dummy_frame
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{
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struct dummy_frame *next;
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CORE_ADDR fp;
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CORE_ADDR sp;
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CORE_ADDR rp;
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CORE_ADDR pc;
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};
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void
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m32r_frame_find_saved_regs PARAMS ((struct frame_info *fi,
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struct frame_saved_regs *regaddr))
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{
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*regaddr = fi->fsr;
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}
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static struct dummy_frame *dummy_frame_stack = NULL;
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/* Find end of function prologue */
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CORE_ADDR
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m32r_skip_prologue (pc)
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CORE_ADDR pc;
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{
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CORE_ADDR func_addr, func_end;
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struct symtab_and_line sal;
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/* See what the symbol table says */
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if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
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{
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sal = find_pc_line (func_addr, 0);
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if (sal.line != 0 && sal.end < func_end)
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return sal.end;
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else
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/* Either there's no line info, or the line after the prologue is after
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the end of the function. In this case, there probably isn't a
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prologue. */
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return pc;
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}
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/* We can't find the start of this function, so there's nothing we can do. */
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return pc;
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}
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/* This function decodes the target function prologue to determine
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1) the size of the stack frame, and 2) which registers are saved on it.
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It saves the offsets of saved regs in the frame_saved_regs argument,
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and returns the frame size.
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*/
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static unsigned long
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m32r_scan_prologue (fi, fsr)
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struct frame_info *fi;
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struct frame_saved_regs *fsr;
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{
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struct symtab_and_line sal;
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CORE_ADDR prologue_start, prologue_end, current_pc;
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unsigned long framesize;
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/* this code essentially duplicates skip_prologue,
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but we need the start address below. */
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1996-11-01 00:41:21 +00:00
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if (fsr)
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memset (fsr->regs, '\000', sizeof fsr->regs);
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1996-10-31 02:27:58 +00:00
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if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
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{
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sal = find_pc_line (prologue_start, 0);
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if (sal.line == 0) /* no line info, use current PC */
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1996-11-01 00:41:21 +00:00
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if (prologue_start != entry_point_address ())
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prologue_end = fi->pc;
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else
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return 0; /* _start has no frame or prologue */
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1996-10-31 02:27:58 +00:00
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else if (sal.end < prologue_end) /* next line begins after fn end */
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prologue_end = sal.end; /* (probably means no prologue) */
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}
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else
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1996-11-01 00:41:21 +00:00
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prologue_end = prologue_start + 48; /* We're in the boondocks: allow for */
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/* 16 pushes, an add, and "mv fp,sp" */
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1996-10-31 02:27:58 +00:00
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prologue_end = min (prologue_end, fi->pc);
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/* Now, search the prologue looking for instructions that setup fp, save
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rp (and other regs), adjust sp and such. */
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framesize = 0;
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for (current_pc = prologue_start; current_pc < prologue_end; current_pc += 2)
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{
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int insn;
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int regno;
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insn = read_memory_unsigned_integer (current_pc, 2);
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1996-11-01 00:41:21 +00:00
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if (insn & 0x8000) /* Four byte instruction? */
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1996-10-31 02:27:58 +00:00
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current_pc += 2;
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if ((insn & 0xf0ff) == 0x207f) { /* st reg, @-sp */
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framesize += 4;
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regno = ((insn >> 8) & 0xf);
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1996-11-01 00:41:21 +00:00
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if (fsr) /* save_regs offset */
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fsr->regs[regno] = framesize;
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1996-10-31 02:27:58 +00:00
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}
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1996-11-01 00:41:21 +00:00
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else if ((insn >> 8) == 0x4f) /* addi sp, xx */
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/* add 8 bit sign-extended offset */
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framesize += -((char) (insn & 0xff));
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else if (insn == 0x8faf) /* add3 sp, sp, xxxx */
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/* add 16 bit sign-extended offset */
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framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
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else if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx ; sub sp, r4 */
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read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
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{ /* subtract 24 bit sign-extended negative-offset */
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insn = read_memory_unsigned_integer (current_pc - 2, 4);
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if (insn & 0x00800000) /* sign extend */
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insn |= 0xff000000; /* negative */
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else
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insn &= 0x00ffffff; /* positive */
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framesize += insn;
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}
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else if (insn == 0x1d8f) /* mv fp, sp */
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1996-10-31 02:27:58 +00:00
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break; /* end of stack adjustments */
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}
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return framesize;
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}
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/* This function actually figures out the frame address for a given pc and
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sp. This is tricky on the v850 because we only use an explicit frame
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pointer when using alloca(). The only reliable way to get this info is to
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examine the prologue.
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*/
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void
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m32r_init_extra_frame_info (fi)
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struct frame_info *fi;
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{
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int reg;
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int framesize;
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if (fi->next)
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fi->pc = FRAME_SAVED_PC (fi->next);
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framesize = m32r_scan_prologue (fi, &fi->fsr);
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1996-11-01 00:41:21 +00:00
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#if 0
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1996-10-31 02:27:58 +00:00
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if (PC_IN_CALL_DUMMY (fi->pc, NULL, NULL))
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fi->frame = dummy_frame_stack->sp;
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1996-11-01 00:41:21 +00:00
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else
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#endif
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if (!fi->next)
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fi->frame = read_register (SP_REGNUM);
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1996-10-31 02:27:58 +00:00
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for (reg = 0; reg < NUM_REGS; reg++)
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if (fi->fsr.regs[reg] != 0)
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fi->fsr.regs[reg] = fi->frame + framesize - fi->fsr.regs[reg];
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}
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/* Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
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in the stack anywhere, otherwise we get it from the registers. */
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CORE_ADDR
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m32r_find_callers_reg (fi, regnum)
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struct frame_info *fi;
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int regnum;
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{
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#if 0
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/* XXX - Won't work if multiple dummy frames are active */
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if (PC_IN_CALL_DUMMY (fi->pc, NULL, NULL))
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switch (regnum)
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{
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case SP_REGNUM:
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return dummy_frame_stack->sp;
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break;
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case FP_REGNUM:
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return dummy_frame_stack->fp;
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break;
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case RP_REGNUM:
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return dummy_frame_stack->pc;
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break;
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case PC_REGNUM:
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return dummy_frame_stack->pc;
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break;
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}
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#endif
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for (; fi; fi = fi->next)
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if (fi->fsr.regs[regnum] != 0)
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return read_memory_integer (fi->fsr.regs[regnum], 4);
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return read_register (regnum);
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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For m32r, simply get the saved FP off the stack.
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*/
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CORE_ADDR
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m32r_frame_chain (fi)
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struct frame_info *fi;
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{
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CORE_ADDR saved_fp = fi->fsr.regs[FP_REGNUM];
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1996-11-01 00:41:21 +00:00
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CORE_ADDR fn_start, fn_end;
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if (saved_fp != 0)
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return read_memory_integer (saved_fp, 4);
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else {
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if (find_pc_partial_function (fi->pc, 0, &fn_start, &fn_end))
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if (fn_start == entry_point_address ())
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return 0; /* in _start fn, don't chain further */
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else
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return read_register (FP_REGNUM);
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else /* in the woods, what to do? */
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return 0; /* for now, play it safe and give up... */
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}
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1996-10-31 02:27:58 +00:00
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}
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/* All we do here is record SP and FP on the call dummy stack */
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void
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m32r_push_dummy_frame ()
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{
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struct dummy_frame *dummy_frame;
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dummy_frame = xmalloc (sizeof (struct dummy_frame));
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dummy_frame->fp = read_register (FP_REGNUM);
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dummy_frame->sp = read_register (SP_REGNUM);
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dummy_frame->rp = read_register (RP_REGNUM);
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dummy_frame->pc = read_register (PC_REGNUM);
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dummy_frame->next = dummy_frame_stack;
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dummy_frame_stack = dummy_frame;
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}
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/*
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* MISSING FUNCTION HEADER COMMENT
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*/
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int
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m32r_pc_in_call_dummy (pc)
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CORE_ADDR pc;
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{
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1996-11-01 00:41:21 +00:00
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#if 0
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1996-10-31 02:27:58 +00:00
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return dummy_frame_stack
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&& pc >= CALL_DUMMY_ADDRESS ()
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&& pc <= CALL_DUMMY_ADDRESS () + DECR_PC_AFTER_BREAK;
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1996-11-01 00:41:21 +00:00
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#else
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return 0;
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#endif
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1996-10-31 02:27:58 +00:00
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}
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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struct frame_info *
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m32r_pop_frame (frame)
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struct frame_info *frame;
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{
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int regnum;
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#if 0
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if (PC_IN_CALL_DUMMY (frame->pc, NULL, NULL))
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{
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struct dummy_frame *dummy_frame;
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dummy_frame = dummy_frame_stack;
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if (!dummy_frame)
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error ("Can't pop dummy frame!");
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dummy_frame_stack = dummy_frame->next;
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write_register (FP_REGNUM, dummy_frame->fp);
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write_register (SP_REGNUM, dummy_frame->sp);
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write_register (RP_REGNUM, dummy_frame->rp);
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write_register (PC_REGNUM, dummy_frame->pc);
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free (dummy_frame);
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flush_cached_frames ();
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return NULL;
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}
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#endif
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write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
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for (regnum = 0; regnum < NUM_REGS; regnum++)
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if (frame->fsr.regs[regnum] != 0)
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|
write_register (regnum,
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|
|
|
|
read_memory_integer (frame->fsr.regs[regnum], 4));
|
|
|
|
|
|
|
|
|
|
write_register (SP_REGNUM, read_register (FP_REGNUM));
|
|
|
|
|
if (read_register (PSW_REGNUM) & 0x80)
|
|
|
|
|
write_register (SPU_REGNUM, read_register (SP_REGNUM));
|
|
|
|
|
else
|
|
|
|
|
write_register (SPI_REGNUM, read_register (SP_REGNUM));
|
|
|
|
|
/* registers_changed (); */
|
|
|
|
|
flush_cached_frames ();
|
|
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Put arguments in the right places, and setup return address register (RP) to
|
|
|
|
|
point at a convenient place to put a breakpoint. First four args go in
|
|
|
|
|
R6->R9, subsequent args go into sp + 16 -> sp + ... Structs are passed by
|
|
|
|
|
reference. 64 bit quantities (doubles and long longs) may be split between
|
|
|
|
|
the regs and the stack. When calling a function that returns a struct, a
|
|
|
|
|
pointer to the struct is passed in as a secret first argument (always in R6).
|
|
|
|
|
|
|
|
|
|
By the time we get here, stack space has been allocated for the args, but
|
|
|
|
|
not for the struct return pointer. */
|
|
|
|
|
|
|
|
|
|
CORE_ADDR
|
|
|
|
|
m32r_push_arguments (nargs, args, sp, struct_return, struct_addr)
|
|
|
|
|
int nargs;
|
|
|
|
|
value_ptr *args;
|
|
|
|
|
CORE_ADDR sp;
|
|
|
|
|
unsigned char struct_return;
|
|
|
|
|
CORE_ADDR struct_addr;
|
|
|
|
|
{
|
|
|
|
|
int argreg;
|
|
|
|
|
int argnum;
|
|
|
|
|
|
|
|
|
|
argreg = ARG0_REGNUM;
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
if (struct_return)
|
|
|
|
|
{
|
|
|
|
|
write_register (argreg++, struct_addr);
|
|
|
|
|
sp -= 4;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
|
|
|
{
|
|
|
|
|
int len;
|
|
|
|
|
char *val;
|
|
|
|
|
char valbuf[4];
|
|
|
|
|
|
|
|
|
|
if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
|
|
|
|
|
&& TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
|
|
|
|
|
{
|
|
|
|
|
store_address (valbuf, 4, VALUE_ADDRESS (*args));
|
|
|
|
|
len = 4;
|
|
|
|
|
val = valbuf;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
len = TYPE_LENGTH (VALUE_TYPE (*args));
|
|
|
|
|
val = (char *)VALUE_CONTENTS (*args);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
if (argreg <= ARGLAST_REGNUM)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR regval;
|
|
|
|
|
|
|
|
|
|
regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
|
|
|
|
|
write_register (argreg, regval);
|
|
|
|
|
|
|
|
|
|
len -= REGISTER_RAW_SIZE (argreg);
|
|
|
|
|
val += REGISTER_RAW_SIZE (argreg);
|
|
|
|
|
argreg++;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
write_memory (sp + argnum * 4, val, 4);
|
|
|
|
|
|
|
|
|
|
len -= 4;
|
|
|
|
|
val += 4;
|
|
|
|
|
}
|
|
|
|
|
args++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
write_register (RP_REGNUM, entry_point_address ());
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
return sp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
_initialize_m32r_tdep ()
|
|
|
|
|
{
|
|
|
|
|
tm_print_insn = print_insn_m32r;
|
|
|
|
|
}
|