1999-04-16 01:35:26 +00:00
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# Makefile template for Configure for the MIPS simulator.
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# Written by Cygnus Support.
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2003-05-16 07:11:43 +00:00
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SHELL = @SHELL@
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1999-04-16 01:35:26 +00:00
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## COMMON_PRE_CONFIG_FRAG
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srcdir=@srcdir@
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srcroot=$(srcdir)/../../
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# Object files created by various simulator generators.
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SIM_IGEN_OBJ = \
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support.o \
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itable.o \
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semantics.o \
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idecode.o \
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icache.o \
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@mips_igen_engine@ \
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irun.o \
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SIM_M16_OBJ = \
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m16_support.o \
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m16_semantics.o \
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m16_idecode.o \
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m16_icache.o \
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\
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m32_support.o \
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m32_semantics.o \
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m32_idecode.o \
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m32_icache.o \
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\
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itable.o \
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m16run.o \
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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SIM_MULTI_OBJ = itable.o @sim_multi_obj@
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1999-04-16 01:35:26 +00:00
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MIPS_EXTRA_OBJS = @mips_extra_objs@
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MIPS_EXTRA_LIBS = @mips_extra_libs@
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SIM_OBJS = \
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$(SIM_@sim_gen@_OBJ) \
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$(SIM_NEW_COMMON_OBJS) \
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$(MIPS_EXTRA_OBJS) \
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2002-03-20 01:35:13 +00:00
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cp1.o \
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1999-04-16 01:35:26 +00:00
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interp.o \
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2002-06-02 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips.igen (mdmx): New (pseudo-)model.
* mdmx.c, mdmx.igen: New files.
* Makefile.in (SIM_OBJS): Add mdmx.o.
* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
New typedefs.
(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
(qh_fmtsel): New macros.
(_sim_cpu): New member "acc".
(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
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mdmx.o \
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1999-04-16 01:35:26 +00:00
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sim-main.o \
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sim-hload.o \
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sim-engine.o \
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sim-stop.o \
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sim-resume.o \
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sim-reason.o \
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# List of flags to always pass to $(CC).
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SIM_SUBTARGET=@SIM_SUBTARGET@
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SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
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SIM_EXTRA_CLEAN = clean-extra
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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SIM_EXTRA_DISTCLEAN = distclean-extra
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1999-04-16 01:35:26 +00:00
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SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
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SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
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# List of main object files for `run'.
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SIM_RUN_OBJS = nrun.o
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## COMMON_POST_CONFIG_FRAG
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interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
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2002-03-20 01:35:13 +00:00
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cp1.o: $(srcdir)/cp1.c config.h sim-main.h
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1999-04-16 01:35:26 +00:00
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2002-06-02 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips.igen (mdmx): New (pseudo-)model.
* mdmx.c, mdmx.igen: New files.
* Makefile.in (SIM_OBJS): Add mdmx.o.
* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
New typedefs.
(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
(qh_fmtsel): New macros.
(_sim_cpu): New member "acc".
(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
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mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h
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1999-04-16 01:35:26 +00:00
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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multi-run.o: multi-include.h tmp-mach-multi
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1999-04-16 01:35:26 +00:00
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../igen/igen:
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cd ../igen && $(MAKE)
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IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
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IGEN_INSN=$(srcdir)/mips.igen
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IGEN_DC=$(srcdir)/mips.dc
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M16_DC=$(srcdir)/m16.dc
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IGEN_INCLUDE=\
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$(srcdir)/m16.igen \
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2002-06-03 18:35:19 +00:00
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$(srcdir)/mdmx.igen \
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2002-06-14 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips3d.igen: New file which contains MIPS-3D ASE instructions.
* Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
* mips.igen: Include mips3d.igen.
(mips3d): New model name for MIPS-3D ASE instructions.
(CVT.W.fmt): Don't use this instruction for word (source) format
instructions.
* cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
(fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
(fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
(NR_FRAC_GUARD, IMPLICIT_1): New macros.
* sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
(RSquareRoot1, RSquareRoot2): New macros.
(fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
(fp_rsqrt2): New functions.
* configure.in: Add MIPS-3D support to mipsisa64 simulator.
* configure: Regenerate.
2002-06-14 18:49:09 +00:00
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$(srcdir)/mips3d.igen \
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2002-06-03 21:00:29 +00:00
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$(srcdir)/sb1.igen \
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1999-04-16 01:35:26 +00:00
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$(srcdir)/tx.igen \
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$(srcdir)/vr.igen \
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# NB: Since these can be built by a number of generators, care
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# must be taken to ensure that they are only dependant on
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# one of those generators.
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BUILT_SRC_FROM_GEN = \
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itable.h \
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itable.c \
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SIM_IGEN_ALL = tmp-igen
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SIM_M16_ALL = tmp-m16
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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SIM_MULTI_ALL = tmp-multi
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1999-04-16 01:35:26 +00:00
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$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
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BUILT_SRC_FROM_IGEN = \
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icache.h \
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icache.c \
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idecode.h \
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idecode.c \
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semantics.h \
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semantics.c \
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model.h \
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model.c \
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support.h \
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support.c \
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engine.h \
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engine.c \
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irun.c \
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$(BUILT_SRC_FROM_IGEN): tmp-igen
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tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
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cd ../igen && $(MAKE)
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../igen/igen \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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@sim_igen_flags@ \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-x \
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-n icache.h -hc tmp-icache.h \
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-n icache.c -c tmp-icache.c \
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-n semantics.h -hs tmp-semantics.h \
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-n semantics.c -s tmp-semantics.c \
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-n idecode.h -hd tmp-idecode.h \
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-n idecode.c -d tmp-idecode.c \
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-n model.h -hm tmp-model.h \
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-n model.c -m tmp-model.c \
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-n support.h -hf tmp-support.h \
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-n support.c -f tmp-support.c \
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-n itable.h -ht tmp-itable.h \
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-n itable.c -t tmp-itable.c \
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-n engine.h -he tmp-engine.h \
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-n engine.c -e tmp-engine.c \
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-n irun.c -r tmp-irun.c
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2003-05-16 07:11:43 +00:00
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
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$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
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$(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
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1999-04-16 01:35:26 +00:00
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touch tmp-igen
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semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
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engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
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support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
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idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
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itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
BUILT_SRC_FROM_M16 = \
|
|
|
|
m16_icache.h \
|
|
|
|
m16_icache.c \
|
|
|
|
m16_idecode.h \
|
|
|
|
m16_idecode.c \
|
|
|
|
m16_semantics.h \
|
|
|
|
m16_semantics.c \
|
|
|
|
m16_model.h \
|
|
|
|
m16_model.c \
|
|
|
|
m16_support.h \
|
|
|
|
m16_support.c \
|
|
|
|
\
|
|
|
|
m32_icache.h \
|
|
|
|
m32_icache.c \
|
|
|
|
m32_idecode.h \
|
|
|
|
m32_idecode.c \
|
|
|
|
m32_semantics.h \
|
|
|
|
m32_semantics.c \
|
|
|
|
m32_model.h \
|
|
|
|
m32_model.c \
|
|
|
|
m32_support.h \
|
|
|
|
m32_support.c \
|
|
|
|
|
|
|
|
$(BUILT_SRC_FROM_M16): tmp-m16
|
|
|
|
|
|
|
|
tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
|
|
|
|
cd ../igen && $(MAKE)
|
|
|
|
../igen/igen \
|
|
|
|
$(IGEN_TRACE) \
|
|
|
|
-I $(srcdir) \
|
|
|
|
-Werror \
|
|
|
|
-Wnodiscard \
|
|
|
|
@sim_m16_flags@ \
|
|
|
|
-G gen-direct-access \
|
|
|
|
-G gen-zero-r0 \
|
|
|
|
-B 16 \
|
|
|
|
-H 15 \
|
|
|
|
-i $(IGEN_INSN) \
|
|
|
|
-o $(M16_DC) \
|
|
|
|
-P m16_ \
|
|
|
|
-x \
|
|
|
|
-n m16_icache.h -hc tmp-icache.h \
|
|
|
|
-n m16_icache.c -c tmp-icache.c \
|
|
|
|
-n m16_semantics.h -hs tmp-semantics.h \
|
|
|
|
-n m16_semantics.c -s tmp-semantics.c \
|
|
|
|
-n m16_idecode.h -hd tmp-idecode.h \
|
|
|
|
-n m16_idecode.c -d tmp-idecode.c \
|
|
|
|
-n m16_model.h -hm tmp-model.h \
|
|
|
|
-n m16_model.c -m tmp-model.c \
|
|
|
|
-n m16_support.h -hf tmp-support.h \
|
|
|
|
-n m16_support.c -f tmp-support.c \
|
|
|
|
#
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m16_model.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m16_model.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m16_support.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m16_support.c
|
1999-04-16 01:35:26 +00:00
|
|
|
../igen/igen \
|
|
|
|
$(IGEN_TRACE) \
|
|
|
|
-I $(srcdir) \
|
|
|
|
-Werror \
|
|
|
|
-Wnodiscard \
|
|
|
|
@sim_igen_flags@ \
|
|
|
|
-G gen-direct-access \
|
|
|
|
-G gen-zero-r0 \
|
|
|
|
-B 32 \
|
|
|
|
-H 31 \
|
|
|
|
-i $(IGEN_INSN) \
|
|
|
|
-o $(IGEN_DC) \
|
|
|
|
-P m32_ \
|
|
|
|
-x \
|
|
|
|
-n m32_icache.h -hc tmp-icache.h \
|
|
|
|
-n m32_icache.c -c tmp-icache.c \
|
|
|
|
-n m32_semantics.h -hs tmp-semantics.h \
|
|
|
|
-n m32_semantics.c -s tmp-semantics.c \
|
|
|
|
-n m32_idecode.h -hd tmp-idecode.h \
|
|
|
|
-n m32_idecode.c -d tmp-idecode.c \
|
|
|
|
-n m32_model.h -hm tmp-model.h \
|
|
|
|
-n m32_model.c -m tmp-model.c \
|
|
|
|
-n m32_support.h -hf tmp-support.h \
|
|
|
|
-n m32_support.c -f tmp-support.c \
|
|
|
|
#
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.h m32_model.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.c m32_model.c
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.h m32_support.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.c m32_support.c
|
1999-04-16 01:35:26 +00:00
|
|
|
../igen/igen \
|
|
|
|
$(IGEN_TRACE) \
|
|
|
|
-I $(srcdir) \
|
|
|
|
-Werror \
|
|
|
|
-Wnodiscard \
|
|
|
|
-Wnowidth \
|
|
|
|
@sim_igen_flags@ @sim_m16_flags@ \
|
|
|
|
-G gen-direct-access \
|
|
|
|
-G gen-zero-r0 \
|
|
|
|
-i $(IGEN_INSN) \
|
|
|
|
-n itable.h -ht tmp-itable.h \
|
|
|
|
-n itable.c -t tmp-itable.c \
|
|
|
|
#
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
|
1999-04-16 01:35:26 +00:00
|
|
|
touch tmp-m16
|
|
|
|
|
|
|
|
|
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
|
|
|
BUILT_SRC_FROM_MULTI = @sim_multi_src@
|
|
|
|
SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@
|
|
|
|
|
|
|
|
$(BUILT_SRC_FROM_MULTI): tmp-multi
|
|
|
|
tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h
|
|
|
|
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
|
|
|
|
for t in $(SIM_MULTI_IGEN_CONFIGS); do \
|
|
|
|
p=`echo $${t} | sed -e 's/:.*//'` ; \
|
|
|
|
m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
|
|
|
|
f=`echo $${t} | sed -e 's/.*://'` ; \
|
|
|
|
case $${p} in \
|
|
|
|
m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
|
|
|
|
*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
|
|
|
|
esac; \
|
|
|
|
../igen/igen \
|
|
|
|
$(IGEN_TRACE) \
|
|
|
|
$${e} \
|
|
|
|
-I $(srcdir) \
|
|
|
|
-Werror \
|
|
|
|
-Wnodiscard \
|
|
|
|
-N 0 \
|
|
|
|
-M $${m} \
|
|
|
|
-G gen-direct-access \
|
|
|
|
-G gen-zero-r0 \
|
|
|
|
-i $(IGEN_INSN) \
|
|
|
|
-P $${p}_ \
|
|
|
|
-x \
|
|
|
|
-n $${p}_icache.h -hc tmp-icache.h \
|
|
|
|
-n $${p}_icache.c -c tmp-icache.c \
|
|
|
|
-n $${p}_semantics.h -hs tmp-semantics.h \
|
|
|
|
-n $${p}_semantics.c -s tmp-semantics.c \
|
|
|
|
-n $${p}_idecode.h -hd tmp-idecode.h \
|
|
|
|
-n $${p}_idecode.c -d tmp-idecode.c \
|
|
|
|
-n $${p}_model.h -hm tmp-model.h \
|
|
|
|
-n $${p}_model.c -m tmp-model.c \
|
|
|
|
-n $${p}_support.h -hf tmp-support.h \
|
|
|
|
-n $${p}_support.c -f tmp-support.c \
|
|
|
|
-n $${p}_engine.h -he tmp-engine.h \
|
|
|
|
-n $${p}_engine.c -e tmp-engine.c \
|
|
|
|
; \
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.h $${p}_icache.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-icache.c $${p}_icache.c ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h $${p}_idecode.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c $${p}_idecode.c ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h $${p}_semantics.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c $${p}_semantics.c ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.h $${p}_model.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-model.c $${p}_model.c ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.h $${p}_support.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-support.c $${p}_support.c ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.h $${p}_engine.h ; \
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-engine.c $${p}_engine.c ; \
|
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
|
|
|
done
|
|
|
|
touch tmp-mach-multi
|
|
|
|
tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
|
|
|
|
../igen/igen \
|
|
|
|
$(IGEN_TRACE) \
|
|
|
|
-I $(srcdir) \
|
|
|
|
-Werror \
|
|
|
|
-Wnodiscard \
|
|
|
|
-Wnowidth \
|
|
|
|
-N 0 \
|
|
|
|
@sim_multi_flags@ \
|
|
|
|
-G gen-direct-access \
|
|
|
|
-G gen-zero-r0 \
|
|
|
|
-i $(IGEN_INSN) \
|
|
|
|
-n itable.h -ht tmp-itable.h \
|
|
|
|
-n itable.c -t tmp-itable.c \
|
|
|
|
#
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
|
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
|
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
|
|
|
touch tmp-itable-multi
|
|
|
|
tmp-run-multi: $(srcdir)/m16run.c
|
|
|
|
for t in $(SIM_MULTI_IGEN_CONFIGS); do \
|
|
|
|
case $${t} in \
|
2003-01-06 01:57:40 +00:00
|
|
|
m16*) \
|
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
|
|
|
m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
|
|
|
|
sed < $(srcdir)/m16run.c > tmp-run \
|
|
|
|
-e "s/^sim_/m16$${m}_/" \
|
|
|
|
-e "s/m16_/m16$${m}_/" \
|
|
|
|
-e "s/m32_/m32$${m}_/" ; \
|
2003-05-16 07:11:43 +00:00
|
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-run m16$${m}_run.c ; \
|
2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
|
|
|
esac \
|
|
|
|
done
|
|
|
|
touch tmp-run-multi
|
|
|
|
|
1999-04-16 01:35:26 +00:00
|
|
|
clean-extra:
|
|
|
|
rm -f $(BUILT_SRC_FROM_GEN)
|
|
|
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rm -f $(BUILT_SRC_FROM_IGEN)
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rm -f $(BUILT_SRC_FROM_M16)
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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rm -f $(BUILT_SRC_FROM_MULTI)
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1999-04-16 01:35:26 +00:00
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rm -f tmp-*
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2000-07-27 12:03:19 +00:00
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rm -f m16*.o m32*.o itable*.o
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1999-04-16 01:35:26 +00:00
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2003-01-04 Richard Sandiford <rsandifo@redhat.com>
Andrew Cagney <ac131313@redhat.com>
Gavin Romig-Koch <gavin@redhat.com>
Graydon Hoare <graydon@redhat.com>
Aldy Hernandez <aldyh@redhat.com>
Dave Brolley <brolley@redhat.com>
Chris Demetriou <cgd@broadcom.com>
* configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
(sim_mach_default): New variable.
(mips64vr-*-*, mips64vrel-*-*): New configurations.
Add a new simulator generator, MULTI.
* configure: Regenerate.
* Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
(multi-run.o): New dependency.
(SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
(tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
(tmp-multi): Combine them.
(BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
(clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
(distclean-extra): New rule.
* sim-main.h: Include bfd.h.
(MIPS_MACH): New macro.
* mips.igen (vr4120, vr5400, vr5500): New models.
(clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
* vr.igen: Replace with new version.
2003-01-05 07:56:59 +00:00
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distclean-extra:
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rm -f multi-include.h multi-run.c
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