57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
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/* Simulator for Analog Devices Blackfin processors.
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Copyright (C) 2005-2011 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef _BFIN_MACHS_H_
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#define _BFIN_MACHS_H_
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typedef enum model_type {
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#define P(n) MODEL_BF##n,
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#include "proc_list.def"
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#undef P
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MODEL_MAX
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} MODEL_TYPE;
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typedef enum mach_attr {
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MACH_BASE,
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MACH_BFIN,
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MACH_MAX
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} MACH_ATTR;
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#define CPU_MODEL_NUM(cpu) MODEL_NUM (CPU_MODEL (cpu))
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/* XXX: Some of this probably belongs in CPU_MODEL. */
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struct bfin_board_data {
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unsigned int sirev, sirev_valid;
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const char *hw_file;
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};
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void bfin_model_cpu_init (SIM_DESC, SIM_CPU *);
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bu32 bfin_model_get_chipid (SIM_DESC);
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bu32 bfin_model_get_dspid (SIM_DESC);
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enum {
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#define I(insn) BFIN_INSN_##insn,
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#include "insn_list.def"
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#undef I
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BFIN_INSN_MAX
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};
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#endif
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