2005-01-28 04:29:00 +00:00
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/* Misc. support for CPU family crisv32f.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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2015-01-01 09:32:14 +00:00
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Copyright 1996-2015 Free Software Foundation, Inc.
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2005-01-28 04:29:00 +00:00
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This file is part of the GNU simulators.
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 16:06:38 +00:00
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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2005-01-28 04:29:00 +00:00
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 16:06:38 +00:00
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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2005-01-28 04:29:00 +00:00
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* cris/arch.c, cris/arch.h, cris/cpuall.h, cris/cpuv10.c,
cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
2007-10-22 16:06:38 +00:00
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You should have received a copy of the GNU General Public License along
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2012-12-19 07:18:22 +00:00
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with this program; if not, see <http://www.gnu.org/licenses/>.
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2005-01-28 04:29:00 +00:00
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*/
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#define WANT_CPU crisv32f
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#define WANT_CPU_CRISV32F
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#include "sim-main.h"
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#include "cgen-ops.h"
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/* Get the value of h-v32-v32. */
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BI
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crisv32f_h_v32_v32_get (SIM_CPU *current_cpu)
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{
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return GET_H_V32_V32 ();
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}
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/* Set a value for h-v32-v32. */
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void
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crisv32f_h_v32_v32_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_V32_V32 (newval);
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}
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/* Get the value of h-pc. */
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USI
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crisv32f_h_pc_get (SIM_CPU *current_cpu)
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{
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return CPU (h_pc);
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}
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/* Set a value for h-pc. */
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void
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crisv32f_h_pc_set (SIM_CPU *current_cpu, USI newval)
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{
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SET_H_PC (newval);
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}
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/* Get the value of h-gr. */
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SI
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crisv32f_h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_GR (regno);
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}
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/* Set a value for h-gr. */
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void
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crisv32f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_GR (regno, newval);
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}
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/* Get the value of h-gr-acr. */
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SI
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crisv32f_h_gr_acr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return CPU (h_gr_acr[regno]);
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}
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/* Set a value for h-gr-acr. */
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void
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crisv32f_h_gr_acr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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CPU (h_gr_acr[regno]) = newval;
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}
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/* Get the value of h-raw-gr-acr. */
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SI
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crisv32f_h_raw_gr_acr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_RAW_GR_ACR (regno);
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}
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/* Set a value for h-raw-gr-acr. */
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void
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crisv32f_h_raw_gr_acr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_RAW_GR_ACR (regno, newval);
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}
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/* Get the value of h-sr. */
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SI
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crisv32f_h_sr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_SR (regno);
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}
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/* Set a value for h-sr. */
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void
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crisv32f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_SR (regno, newval);
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}
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/* Get the value of h-sr-v32. */
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SI
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crisv32f_h_sr_v32_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_SR_V32 (regno);
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}
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/* Set a value for h-sr-v32. */
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void
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crisv32f_h_sr_v32_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_SR_V32 (regno, newval);
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}
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/* Get the value of h-supr. */
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SI
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crisv32f_h_supr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_SUPR (regno);
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}
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/* Set a value for h-supr. */
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void
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crisv32f_h_supr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_SUPR (regno, newval);
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}
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/* Get the value of h-cbit. */
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BI
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crisv32f_h_cbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_cbit);
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}
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/* Set a value for h-cbit. */
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void
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crisv32f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_cbit) = newval;
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}
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/* Get the value of h-cbit-move. */
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BI
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crisv32f_h_cbit_move_get (SIM_CPU *current_cpu)
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{
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return GET_H_CBIT_MOVE ();
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}
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/* Set a value for h-cbit-move. */
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void
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crisv32f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_CBIT_MOVE (newval);
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}
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/* Get the value of h-cbit-move-v32. */
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BI
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crisv32f_h_cbit_move_v32_get (SIM_CPU *current_cpu)
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{
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return GET_H_CBIT_MOVE_V32 ();
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}
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/* Set a value for h-cbit-move-v32. */
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void
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crisv32f_h_cbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_CBIT_MOVE_V32 (newval);
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}
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/* Get the value of h-vbit. */
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BI
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crisv32f_h_vbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_vbit);
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}
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/* Set a value for h-vbit. */
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void
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crisv32f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_vbit) = newval;
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}
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/* Get the value of h-vbit-move. */
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BI
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crisv32f_h_vbit_move_get (SIM_CPU *current_cpu)
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{
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return GET_H_VBIT_MOVE ();
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}
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/* Set a value for h-vbit-move. */
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void
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crisv32f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_VBIT_MOVE (newval);
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}
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/* Get the value of h-vbit-move-v32. */
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BI
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crisv32f_h_vbit_move_v32_get (SIM_CPU *current_cpu)
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{
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return GET_H_VBIT_MOVE_V32 ();
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}
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/* Set a value for h-vbit-move-v32. */
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void
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crisv32f_h_vbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_VBIT_MOVE_V32 (newval);
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}
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/* Get the value of h-zbit. */
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BI
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crisv32f_h_zbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_zbit);
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}
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/* Set a value for h-zbit. */
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void
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crisv32f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_zbit) = newval;
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}
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/* Get the value of h-zbit-move. */
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BI
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crisv32f_h_zbit_move_get (SIM_CPU *current_cpu)
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{
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return GET_H_ZBIT_MOVE ();
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}
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/* Set a value for h-zbit-move. */
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void
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crisv32f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_ZBIT_MOVE (newval);
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}
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/* Get the value of h-zbit-move-v32. */
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BI
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crisv32f_h_zbit_move_v32_get (SIM_CPU *current_cpu)
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{
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return GET_H_ZBIT_MOVE_V32 ();
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}
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/* Set a value for h-zbit-move-v32. */
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void
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crisv32f_h_zbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_ZBIT_MOVE_V32 (newval);
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}
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/* Get the value of h-nbit. */
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BI
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crisv32f_h_nbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_nbit);
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}
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/* Set a value for h-nbit. */
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void
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crisv32f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_nbit) = newval;
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}
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/* Get the value of h-nbit-move. */
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BI
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crisv32f_h_nbit_move_get (SIM_CPU *current_cpu)
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{
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return GET_H_NBIT_MOVE ();
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}
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/* Set a value for h-nbit-move. */
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void
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crisv32f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_NBIT_MOVE (newval);
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}
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/* Get the value of h-nbit-move-v32. */
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BI
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crisv32f_h_nbit_move_v32_get (SIM_CPU *current_cpu)
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{
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return GET_H_NBIT_MOVE_V32 ();
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}
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/* Set a value for h-nbit-move-v32. */
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void
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crisv32f_h_nbit_move_v32_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_NBIT_MOVE_V32 (newval);
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}
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/* Get the value of h-xbit. */
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BI
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crisv32f_h_xbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_xbit);
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}
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/* Set a value for h-xbit. */
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void
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crisv32f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_xbit) = newval;
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}
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/* Get the value of h-ibit. */
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BI
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crisv32f_h_ibit_get (SIM_CPU *current_cpu)
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{
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return GET_H_IBIT ();
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|
|
|
}
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|
|
|
|
|
|
|
/* Set a value for h-ibit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_IBIT (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-pbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_pbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_pbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-pbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
CPU (h_pbit) = newval;
|
|
|
|
}
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|
|
|
|
|
|
|
/* Get the value of h-rbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_rbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_rbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-rbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_rbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
CPU (h_rbit) = newval;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-ubit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_ubit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return GET_H_UBIT ();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-ubit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_UBIT (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-gbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_gbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_gbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-gbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_gbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
CPU (h_gbit) = newval;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-kernel-sp. */
|
|
|
|
|
|
|
|
SI
|
|
|
|
crisv32f_h_kernel_sp_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_kernel_sp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-kernel-sp. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_kernel_sp_set (SIM_CPU *current_cpu, SI newval)
|
|
|
|
{
|
|
|
|
CPU (h_kernel_sp) = newval;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-ubit-v32. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_ubit_v32_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_ubit_v32);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-ubit-v32. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_ubit_v32_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_UBIT_V32 (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-ibit-v32. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_ibit_v32_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_ibit_v32);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-ibit-v32. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_ibit_v32_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_IBIT_V32 (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-mbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_mbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_mbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-mbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_mbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_MBIT (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-qbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_qbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_qbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-qbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_qbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_QBIT (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-sbit. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_sbit_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return CPU (h_sbit);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-sbit. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_sbit_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_SBIT (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-insn-prefixed-p. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_insn_prefixed_p_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return GET_H_INSN_PREFIXED_P ();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-insn-prefixed-p. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_INSN_PREFIXED_P (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-insn-prefixed-p-v32. */
|
|
|
|
|
|
|
|
BI
|
|
|
|
crisv32f_h_insn_prefixed_p_v32_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return GET_H_INSN_PREFIXED_P_V32 ();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-insn-prefixed-p-v32. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_insn_prefixed_p_v32_set (SIM_CPU *current_cpu, BI newval)
|
|
|
|
{
|
|
|
|
SET_H_INSN_PREFIXED_P_V32 (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the value of h-prefixreg-v32. */
|
|
|
|
|
|
|
|
SI
|
|
|
|
crisv32f_h_prefixreg_v32_get (SIM_CPU *current_cpu)
|
|
|
|
{
|
|
|
|
return GET_H_PREFIXREG_V32 ();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set a value for h-prefixreg-v32. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_h_prefixreg_v32_set (SIM_CPU *current_cpu, SI newval)
|
|
|
|
{
|
|
|
|
SET_H_PREFIXREG_V32 (newval);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Record trace results for INSN. */
|
|
|
|
|
|
|
|
void
|
|
|
|
crisv32f_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
|
|
|
|
int *indices, TRACE_RECORD *tr)
|
|
|
|
{
|
|
|
|
}
|