old-cross-binutils/ld/testsuite/ld-i386/load4b.d

#source: load4.s
#as: --32
#ld: -melf_i386
#objdump: -dw

.*: +file format .*


Disassembly of section .text:

#...
[ 	]*[a-f0-9]+:	c7 c0 ([0-9a-f]{2} ){4} *	mov    \$0x[a-f0-9]+,%eax
#pass
Add R_386_GOT32X support to gas and ld This patch adds support for the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I to gas and ld. It updates gas to generate R_386_GOT32X relocation for memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax" with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be transformed to "lea foo, %eax". With the locally defined symbol, foo, we convert mov foo@GOT[(%reg1)], %reg2 to lea foo[@GOTOFF(%reg1)], %reg2 and convert call/jmp foo@GOT[(%reg)] to nop call foo/jmp foo nop When PIC is false, convert test %reg1, foo@GOT[(%reg2)] to test $foo, %reg1 and convert binop foo@GOT[(%reg1)], %reg2 to binop $foo, %reg2 where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ elf32-i386.c: Include opcode/i386.h. (elf_howto_table): Add R_386_GOT32X. (R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X. (elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_i386_check_relocs): Handle R_386_GOT32X. Replace need_convert_mov_to_lea with need_convert_load. (elf_i386_gc_sweep_hook): Handle R_386_GOT32X. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_convert_mov_to_lea): Renamed to ... (elf_i386_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_386_GOT32X transformations. * reloc.c (BFD_RELOC_386_GOT32X): New. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_GOT32X. (tc_gen_reloc): Likewise. (match_template): Force 0x8b encoding for "mov foo@GOT, %eax". (output_disp): Check for "call/jmp mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. Set fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if BFD_RELOC_386_GOT32X should be generated. (i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2 is set. gas/testsuite/ gas/i386/got.d: New file. * gas/i386/got.s: Likewise. * gas/i386/i386.exp: Run got. * gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X. * gas/i386/mixed-mode-reloc32.d: Likewise. * gas/i386/reloc32.d: Likewise. include/elf/ * i386.h (R_386_GOT32X): New relocation. ld/testsuite/ * ld-i386/branch1.d: New file. * ld-i386/branch1.s: Likewise. * ld-i386/call1.d: Likewise. * ld-i386/call1.s: Likewise. * ld-i386/call2.d: Likewise. * ld-i386/call2.s: Likewise. * ld-i386/got1.dd: Likewise. * ld-i386/got1.out: Likewise. * ld-i386/got1a.S: Likewise. * ld-i386/got1b.c: Likewise. * ld-i386/got1c.c: Likewise. * ld-i386/got1d.S: Likewise. * ld-i386/jmp1.d: Likewise. * ld-i386/jmp1.s: Likewise. * ld-i386/jmp2.d: Likewise. * ld-i386/jmp2.s: Likewise. * ld-i386/load1.d: Likewise. * ld-i386/load1.s: Likewise. * ld-i386/load2.d: Likewise. * ld-i386/load2.s: Likewise. * ld-i386/load3.d: Likewise. * ld-i386/load3.s: Likewise. * ld-i386/load4.s: Likewise. * ld-i386/load4a.d: Likewise. * ld-i386/load4b.d: Likewise. * ld-i386/load5.s: Likewise. * ld-i386/load5a.d: Likewise. * ld-i386/load5b.d: Likewise. * ld-i386/load6.d: Likewise. * ld-i386/load6.s: Likewise. * ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2, load1, load2, load3, load4a, load4b, load5a, load5b and load6 tests. Run got1 test. 2015-10-22 11:46:51 +00:00			`#source: load4.s`
			`#as: --32`
			`#ld: -melf_i386`
			`#objdump: -dw`

			`.: +file format .`


			`Disassembly of section .text:`

			`#...`
Optimize x86 GOT32X/GOTPCRELX relocations R_386_GOT32X, R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations retrieve the symbol address via its GOT slot. If the symbol address is known at the link-time, we can use it directly by changing instruction encoding. Indirect branch can only be converted to PC relative direct branch. MOV can be changed to LEA or encoded differently with signed address. The subset of binary operations can be encoded only with signed address. If undefined weak symbol is resolved to zero link-time, we can use it as address. Zero addresss can't used with PC relative direct branch when PIC is true since the current PC is unknown. In 64-bit, 32-bit relocation for PC relatiave direct branch to zero may also overflow. If this optimization causes relocation overflow, --no-relax can be used to work around it. bfd/ PR ld/19609 * elf32-i386.c (elf_i386_convert_load): Convert to R_386_32 for load with locally bound symbols if PIC is false or there is no base register. Optimize branch to 0 if PIC is false. (elf_i386_relocate_section): Don't generate dynamic relocations against undefined weak symbols if PIC is false. * elf64-x86-64.c (elf_x86_64_convert_load): Disable optimization if we can't estimate relocation overflow with --no-relax. Convert to R_X86_64_32S/R_X86_64_32 for load with locally bound symbols if PIC is false. Optimize branch to 0 if PIC is false. (elf_x86_64_relocate_section): Don't generate dynamic relocations against undefined weak symbols if PIC is false. ld/ PR ld/19609 * testsuite/ld-i386/got1.dd: Updated. * testsuite/ld-i386/lea1c.d: Likewise. * testsuite/ld-i386/load1-nacl.d: Likewise. * testsuite/ld-i386/load1.d: Likewise. * testsuite/ld-i386/load4b.d: Likewise. * testsuite/ld-i386/load5b.d: Likewise. * testsuite/ld-i386/mov1b.d: Likewise. * testsuite/ld-x86-64/mov1b.d: Likewise. * testsuite/ld-x86-64/mov1d.d: Likewise. * testsuite/ld-ifunc/ifunc-21-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-22-i386.d: Likewise. * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. * testsuite/ld-x86-64/gotpcrel1.dd: Likewise. * testsuite/ld-x86-64/lea1a.d: Likewise. * testsuite/ld-x86-64/lea1b.d: Likewise. * testsuite/ld-x86-64/lea1c.d: Likewise. * testsuite/ld-x86-64/lea1d.d: Likewise. * testsuite/ld-x86-64/lea1e.d: Likewise. * testsuite/ld-x86-64/lea1f.d: Likewise. * testsuite/ld-x86-64/mov1b.d: Likewise. * testsuite/ld-x86-64/mov1d.d: Likewise. * testsuite/ld-x86-64/pr13082-3b.d: Likewise. * testsuite/ld-x86-64/pr13082-4b.d: Likewise. * testsuite/ld-x86-64/lea1.s: Add tests for 32-bit registers. * testsuite/ld-i386/pr19609-1.s: New file. * testsuite/ld-i386/pr19609-1a.d: Likewise. * testsuite/ld-i386/pr19609-1b.d: Likewise. * testsuite/ld-i386/pr19609-1c.d: Likewise. * testsuite/ld-i386/pr19609-1d.d: Likewise. * testsuite/ld-i386/pr19609-1e.d: Likewise. * testsuite/ld-i386/pr19609-1f.d: Likewise. * testsuite/ld-i386/pr19609-1g.d: Likewise. * testsuite/ld-i386/pr19609-1h.d: Likewise. * testsuite/ld-i386/pr19609-1i.d: Likewise. * testsuite/ld-i386/pr19609-2.s: Likewise. * testsuite/ld-i386/pr19609-2a.d: Likewise. * testsuite/ld-i386/pr19609-2b.d: Likewise. * testsuite/ld-i386/pr19609-2c.d: Likewise. * testsuite/ld-i386/undefweak.s: Likewise. * testsuite/ld-i386/undefweaka.d: Likewise. * testsuite/ld-i386/undefweakb.d: Likewise. * testsuite/ld-x86-64/pr13082-3c.d: Likewise. * testsuite/ld-x86-64/pr13082-3d.d: Likewise. * testsuite/ld-x86-64/pr19609-1.s: Likewise. * testsuite/ld-x86-64/pr19609-1a.d: Likewise. * testsuite/ld-x86-64/pr19609-1b.d: Likewise. * testsuite/ld-x86-64/pr19609-1c.d: Likewise. * testsuite/ld-x86-64/pr19609-1d.d: Likewise. * testsuite/ld-x86-64/pr19609-1e.d: Likewise. * testsuite/ld-x86-64/pr19609-1f.d: Likewise. * testsuite/ld-x86-64/pr19609-1g.d: Likewise. * testsuite/ld-x86-64/pr19609-1h.d: Likewise. * testsuite/ld-x86-64/pr19609-1i.d: Likewise. * testsuite/ld-x86-64/pr19609-1j.d: Likewise. * testsuite/ld-x86-64/pr19609-1k.d: Likewise. * testsuite/ld-x86-64/pr19609-1l.d: Likewise. * testsuite/ld-x86-64/pr19609-1m.d: Likewise. * testsuite/ld-x86-64/pr19609-2.s: Likewise. * testsuite/ld-x86-64/pr19609-2a.d: Likewise. * testsuite/ld-x86-64/pr19609-2b.d: Likewise. * testsuite/ld-x86-64/pr19609-2c.d: Likewise. * testsuite/ld-x86-64/pr19609-2d.d: Likewise. * testsuite/ld-x86-64/pr19609-3.s: Likewise. * testsuite/ld-x86-64/pr19609-3a.d: Likewise. * testsuite/ld-x86-64/pr19609-3b.d: Likewise. * testsuite/ld-x86-64/pr19609-4.s: Likewise. * testsuite/ld-x86-64/pr19609-4a.d: Likewise. * testsuite/ld-x86-64/pr19609-4b.d: Likewise. * testsuite/ld-x86-64/pr19609-4c.d: Likewise. * testsuite/ld-x86-64/pr19609-4d.d: Likewise. * testsuite/ld-x86-64/pr19609-4e.d: Likewise. * testsuite/ld-x86-64/pr19609-5.s: Likewise. * testsuite/ld-x86-64/pr19609-5a.d: Likewise. * testsuite/ld-x86-64/pr19609-5b.d: Likewise. * testsuite/ld-x86-64/pr19609-5c.d: Likewise. * testsuite/ld-x86-64/pr19609-5d.d: Likewise. * testsuite/ld-x86-64/pr19609-5e.d: Likewise. * testsuite/ld-x86-64/pr19609-6.s: Likewise. * testsuite/ld-x86-64/pr19609-6a.d: Likewise. * testsuite/ld-x86-64/pr19609-6b.d: Likewise. * testsuite/ld-x86-64/pr19609-6c.d: Likewise. * testsuite/ld-x86-64/pr19609-6d.d: Likewise. * testsuite/ld-x86-64/pr19609-7.s: Likewise. * testsuite/ld-x86-64/pr19609-7a.d: Likewise. * testsuite/ld-x86-64/pr19609-7b.d: Likewise. * testsuite/ld-x86-64/pr19609-7c.d: Likewise. * testsuite/ld-x86-64/pr19609-7d.d: Likewise. * testsuite/ld-i386/i386.exp: Run undefweak tests and tests for PR ld/19609. * testsuite/ld-x86-64/x86-64.exp: Run pr13082-3c, pr13082-3d and tests for PR ld/19609. 2016-02-26 17:38:08 +00:00			`[ ][a-f0-9]+: c7 c0 ([0-9a-f]{2} ){4} mov \$0x[a-f0-9]+,%eax`
Add R_386_GOT32X support to gas and ld This patch adds support for the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I to gas and ld. It updates gas to generate R_386_GOT32X relocation for memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax" with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be transformed to "lea foo, %eax". With the locally defined symbol, foo, we convert mov foo@GOT[(%reg1)], %reg2 to lea foo[@GOTOFF(%reg1)], %reg2 and convert call/jmp foo@GOT[(%reg)] to nop call foo/jmp foo nop When PIC is false, convert test %reg1, foo@GOT[(%reg2)] to test $foo, %reg1 and convert binop foo@GOT[(%reg1)], %reg2 to binop $foo, %reg2 where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ elf32-i386.c: Include opcode/i386.h. (elf_howto_table): Add R_386_GOT32X. (R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X. (elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_i386_check_relocs): Handle R_386_GOT32X. Replace need_convert_mov_to_lea with need_convert_load. (elf_i386_gc_sweep_hook): Handle R_386_GOT32X. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_convert_mov_to_lea): Renamed to ... (elf_i386_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_386_GOT32X transformations. * reloc.c (BFD_RELOC_386_GOT32X): New. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_GOT32X. (tc_gen_reloc): Likewise. (match_template): Force 0x8b encoding for "mov foo@GOT, %eax". (output_disp): Check for "call/jmp mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. Set fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if BFD_RELOC_386_GOT32X should be generated. (i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2 is set. gas/testsuite/ gas/i386/got.d: New file. * gas/i386/got.s: Likewise. * gas/i386/i386.exp: Run got. * gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X. * gas/i386/mixed-mode-reloc32.d: Likewise. * gas/i386/reloc32.d: Likewise. include/elf/ * i386.h (R_386_GOT32X): New relocation. ld/testsuite/ * ld-i386/branch1.d: New file. * ld-i386/branch1.s: Likewise. * ld-i386/call1.d: Likewise. * ld-i386/call1.s: Likewise. * ld-i386/call2.d: Likewise. * ld-i386/call2.s: Likewise. * ld-i386/got1.dd: Likewise. * ld-i386/got1.out: Likewise. * ld-i386/got1a.S: Likewise. * ld-i386/got1b.c: Likewise. * ld-i386/got1c.c: Likewise. * ld-i386/got1d.S: Likewise. * ld-i386/jmp1.d: Likewise. * ld-i386/jmp1.s: Likewise. * ld-i386/jmp2.d: Likewise. * ld-i386/jmp2.s: Likewise. * ld-i386/load1.d: Likewise. * ld-i386/load1.s: Likewise. * ld-i386/load2.d: Likewise. * ld-i386/load2.s: Likewise. * ld-i386/load3.d: Likewise. * ld-i386/load3.s: Likewise. * ld-i386/load4.s: Likewise. * ld-i386/load4a.d: Likewise. * ld-i386/load4b.d: Likewise. * ld-i386/load5.s: Likewise. * ld-i386/load5a.d: Likewise. * ld-i386/load5b.d: Likewise. * ld-i386/load6.d: Likewise. * ld-i386/load6.s: Likewise. * ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2, load1, load2, load3, load4a, load4b, load5a, load5b and load6 tests. Run got1 test. 2015-10-22 11:46:51 +00:00			`#pass`