251 lines
5.3 KiB
C
251 lines
5.3 KiB
C
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/* Main simulator entry points for the M32R.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sim-main.h"
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#include "sim-options.h"
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#include "libiberty.h"
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#include "bfd.h"
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#include "sim-assert.h"
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static void free_state (SIM_DESC);
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/* Records simulator descriptor so utilities like m32r_dump_regs can be
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called from gdb. */
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SIM_DESC current_state;
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_MODULES (sd) != NULL)
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sim_module_uninstall (sd);
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sim_cpu_free_all (sd);
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sim_state_free (sd);
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}
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/* Create an instance of the simulator. */
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SIM_DESC
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sim_open (kind, callback, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *callback;
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struct _bfd *abfd;
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char **argv;
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{
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SIM_DESC sd = sim_state_alloc (kind, callback);
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sim_cpu_alloc_all (sd, 1, 0);
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Allocate core managed memory */
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sim_do_commandf (sd, "memory region 0,0x%lx", M32R_DEFAULT_MEM_SIZE);
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/* getopt will print the error message so we just have to exit if this fails.
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FIXME: Hmmm... in the case of gdb we need getopt to call
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print_filtered. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* check for/establish the reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Establish any remaining configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Store in a global so things like sparc32_dump_regs can be invoked
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from the gdb command line. */
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current_state = sd;
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sim_gx_read_block_list();
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return sd;
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}
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void
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sim_close (sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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sim_gx_write_block_list();
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sim_module_uninstall (sd);
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}
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USI
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m32r_h_pc_get (SIM_CPU *current_cpu)
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{
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return current_cpu->regs.h_pc;
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}
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/* Set a value for h-pc. */
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void
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m32r_h_pc_set (SIM_CPU *current_cpu, USI newval)
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{
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current_cpu->regs.h_pc = newval;
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}
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SIM_RC
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sim_create_inferior (sd, abfd, argv, envp)
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SIM_DESC sd;
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struct _bfd *abfd;
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char **argv;
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char **envp;
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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SIM_ADDR addr;
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CPU_PC_STORE (current_cpu) = m32r_h_pc_set;
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CPU_PC_FETCH (current_cpu) = m32r_h_pc_get;
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CPU_REG_STORE (current_cpu) = & abort;
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CPU_REG_FETCH (current_cpu) = & abort;
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if (abfd != NULL)
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addr = bfd_get_start_address (abfd);
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else
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addr = 0;
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sim_pc_set (current_cpu, addr);
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#if 0
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STATE_ARGV (sd) = sim_copy_argv (argv);
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STATE_ENVP (sd) = sim_copy_argv (envp);
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#endif
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return SIM_RC_OK;
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}
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int
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sim_stop (SIM_DESC sd)
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{
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sim_io_error(sd, "cannot sim_stop\n");
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}
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/* This isn't part of the official interface.
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This is just a good place to put this for now. */
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void
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sim_sync_stop (SIM_DESC sd, SIM_CPU *cpu, PCADDR pc, enum sim_stop reason, int sigrc)
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{
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sim_io_error(sd, "cannot sim_stop\n");
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}
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void
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sim_resume (sd, step, siggnal)
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SIM_DESC sd;
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int step, siggnal;
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{
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sim_engine *engine = STATE_ENGINE (sd);
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jmp_buf buf;
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int jmpval;
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sim_module_resume (sd);
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ASSERT(step == 0); /* XXX */
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engine->jmpbuf = &buf;
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jmpval = setjmp (buf);
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if(jmpval == 0)
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sim_engine_run(sd, 0, 1, siggnal);
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engine->jmpbuf = NULL;
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sim_module_suspend (sd);
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}
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/* The contents of BUF are in target byte order. */
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int
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sim_fetch_register (sd, rn, buf, length)
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SIM_DESC sd;
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int rn;
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unsigned char *buf;
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int length;
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
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}
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/* The contents of BUF are in target byte order. */
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int
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sim_store_register (sd, rn, buf, length)
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SIM_DESC sd;
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int rn;
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unsigned char *buf;
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int length;
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{
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SIM_CPU *cpu = STATE_CPU (sd, 0);
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return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
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}
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void
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sim_do_command (sd, cmd)
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SIM_DESC sd;
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char *cmd;
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{
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if (sim_args_command (sd, cmd) != SIM_RC_OK)
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sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
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}
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/* Utility fns to access registers, without knowing the current mach. */
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SI
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h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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SIM_DESC sd = CURRENT_STATE;
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sim_io_error(sd, "cannot h_gr_get\n");
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}
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void
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h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SIM_DESC sd = CURRENT_STATE;
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sim_io_error(sd, "cannot h_gr_set\n");
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}
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