2002-11-22 Andrew Cagney <ac131313@redhat.com>
* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
2002-11-23 01:12:05 +00:00
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/* The common simulator framework for GDB, the GNU Debugger.
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2008-01-01 22:53:26 +00:00
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Copyright 2002, 2007, 2008 Free Software Foundation, Inc.
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2002-11-22 Andrew Cagney <ac131313@redhat.com>
* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
2002-11-23 01:12:05 +00:00
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Contributed by Andrew Cagney and Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-08-24 14:30:15 +00:00
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the Free Software Foundation; either version 3 of the License, or
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2002-11-22 Andrew Cagney <ac131313@redhat.com>
* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
2002-11-23 01:12:05 +00:00
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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2007-08-24 14:30:15 +00:00
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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1999-04-16 01:35:26 +00:00
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#include "sim-main.h"
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#include "hw-main.h"
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/* DEVICE
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core - root of the device tree
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DESCRIPTION
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The core device, positioned at the root of the device tree appears
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to its child devices as a normal device just like every other
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device in the tree.
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Internally it is implemented using a core object. Requests to
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attach (or detach) address spaces are passed to that core object.
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Requests to transfer (DMA) data are reflected back down the device
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tree using the core_map data transfer methods.
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PROPERTIES
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None.
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*/
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static void
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dv_core_attach_address_callback (struct hw *me,
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int level,
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int space,
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address_word addr,
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address_word nr_bytes,
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struct hw *client)
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{
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HW_TRACE ((me, "attach - level=%d, space=%d, addr=0x%lx, nr_bytes=%ld, client=%s",
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level, space, (unsigned long) addr, (unsigned long) nr_bytes, hw_path (client)));
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/* NOTE: At preset the space is assumed to be zero. Perhaphs the
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space should be mapped onto something for instance: space0 -
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unified memory; space1 - IO memory; ... */
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sim_core_attach (hw_system (me),
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NULL, /*cpu*/
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level,
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access_read_write_exec,
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space, addr,
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nr_bytes,
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0, /* modulo */
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client,
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NULL);
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}
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static unsigned
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dv_core_dma_read_buffer_callback (struct hw *me,
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void *dest,
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int space,
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unsigned_word addr,
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unsigned nr_bytes)
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{
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return sim_core_read_buffer (hw_system (me),
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NULL, /*CPU*/
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space, /*???*/
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dest,
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addr,
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nr_bytes);
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}
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static unsigned
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dv_core_dma_write_buffer_callback (struct hw *me,
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const void *source,
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int space,
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unsigned_word addr,
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unsigned nr_bytes,
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int violate_read_only_section)
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{
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return sim_core_write_buffer (hw_system (me),
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NULL, /*cpu*/
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space, /*???*/
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source,
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addr,
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nr_bytes);
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}
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static void
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dv_core_finish (struct hw *me)
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{
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set_hw_attach_address (me, dv_core_attach_address_callback);
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set_hw_dma_write_buffer (me, dv_core_dma_write_buffer_callback);
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set_hw_dma_read_buffer (me, dv_core_dma_read_buffer_callback);
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}
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const struct hw_descriptor dv_core_descriptor[] = {
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{ "core", dv_core_finish, },
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{ NULL },
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};
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