old-cross-binutils/ld/testsuite/ld-tic6x/pcrel-reloc-local-r-rel.d

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bfd: * elf32-tic6x.h: New. * elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA. * elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata, elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel, elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject, elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p, bfd_elf32_mkobject, bfd_elf32_new_section_hook): New. (elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup, elf32_tic6x_relocate_section): Handle REL relocations. (elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel. gas: * config/tc-tic6x.c (OPTION_MGENERATE_REL): New. (md_longopts): Add -mgenerate-rel. (tic6x_generate_rela): New. (md_parse_option): Handle -mgenerate-rel. (md_show_usage): Add comment that -mgenerate-rel is undocumented. (tic6x_init_after_args): New. (md_apply_fix): Correct shift calculations for SB-relative relocations. (md_pcrel_from): Change to tic6x_pcrel_from_section. Do not adjust addresses for relocations referencing symbols in other sections. (tc_gen_reloc): Adjust addend calculations for REL relocations. * config/tc-tic6x.h (MD_PCREL_FROM_SECTION, tic6x_pcrel_from_section, tc_init_after_args, tic6x_init_after_args): New. ld/testsuite: * ld-tic6x/data-reloc-global-rel.d, ld-tic6x/data-reloc-global-rel.s, ld-tic6x/data-reloc-local-r-rel.d, ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d, ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s, ld-tic6x/mvk-reloc-local-2-rel.s, ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d, ld-tic6x/pcrel-reloc-global-rel.d, ld-tic6x/pcrel-reloc-local-r-rel.d, ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d, ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s, ld-tic6x/sbr-reloc-local-2-rel.s, ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d: New.
2010-04-20 22:03:00 +00:00
#name: C6X PC-relative relocations, local symbols, -r, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -r -melf32_tic6x_le
#source: pcrel-reloc-local-1.s
#source: pcrel-reloc-local-2.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
0+ <[^>]*>:
[ \t]*0:[ \t]+00000000[ \t]+nop 1
[ \t]*4:[ \t]+00800162[ \t]+addkpc \.S2 0 <[^>]*>,b1,0
[ \t]*4: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*8:[ \t]+00810162[ \t]+addkpc \.S2 4 <[^>]*>,b1,0
[ \t]*8: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*c:[ \t]+00000012[ \t]+b \.S2 0 <[^>]*>
[ \t]*c: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*10:[ \t]+00000092[ \t]+b \.S2 4 <[^>]*>
[ \t]*10: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*14:[ \t]+00801022[ \t]+bdec \.S2 0 <[^>]*>,b1
[ \t]*14: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*18:[ \t]+00803022[ \t]+bdec \.S2 4 <[^>]*>,b1
[ \t]*18: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*1c:[ \t]+00000122[ \t]+bnop \.S2 0 <[^>]*>,0
[ \t]*1c: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*20:[ \t]+00010122[ \t]+bnop \.S2 24 <[^>]*>,0
[ \t]*20: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*\.\.\.
[ \t]*44:[ \t]+00080122[ \t]+bnop \.S2 60 <[^>]*>,0
[ \t]*44: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*48:[ \t]+00090122[ \t]+bnop \.S2 64 <[^>]*>,0
[ \t]*48: R_C6000_PCR_S12[ \t]+\.text\.1
[ \t]*4c:[ \t]+00811022[ \t]+bdec \.S2 60 <[^>]*>,b1
[ \t]*4c: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*50:[ \t]+00813022[ \t]+bdec \.S2 64 <[^>]*>,b1
[ \t]*50: R_C6000_PCR_S10[ \t]+\.text\.1
[ \t]*54:[ \t]+00000412[ \t]+b \.S2 60 <[^>]*>
[ \t]*54: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*58:[ \t]+00000492[ \t]+b \.S2 64 <[^>]*>
[ \t]*58: R_C6000_PCR_S21[ \t]+\.text\.1
[ \t]*5c:[ \t]+00880162[ \t]+addkpc \.S2 60 <[^>]*>,b1,0
[ \t]*5c: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*60:[ \t]+00890162[ \t]+addkpc \.S2 84 <[^>]*>,b1,0
[ \t]*60: R_C6000_PCR_S7[ \t]+\.text\.1
[ \t]*\.\.\.
Disassembly of section \.text\.1:
0+ <[^>]*>:
[ \t]*0:[ \t]+00000000[ \t]+nop 1
0+4 <[^>]*>:
[ \t]*\.\.\.
0+20 <[^>]*>:
[ \t]*20:[ \t]+00000000[ \t]+nop 1
0+24 <[^>]*>:
[ \t]*\.\.\.