old-cross-binutils/gdb/regformats/rs6000/powerpc-e500.dat

# DO NOT EDIT: generated from rs6000/powerpc-e500.xml
name:powerpc_e500
expedite:r1,pc
32:r0
32:r1
32:r2
32:r3
32:r4
32:r5
32:r6
32:r7
32:r8
32:r9
32:r10
32:r11
32:r12
32:r13
32:r14
32:r15
32:r16
32:r17
32:r18
32:r19
32:r20
32:r21
32:r22
32:r23
32:r24
32:r25
32:r26
32:r27
32:r28
32:r29
32:r30
32:r31
32:ev0h
32:ev1h
32:ev2h
32:ev3h
32:ev4h
32:ev5h
32:ev6h
32:ev7h
32:ev8h
32:ev9h
32:ev10h
32:ev11h
32:ev12h
32:ev13h
32:ev14h
32:ev15h
32:ev16h
32:ev17h
32:ev18h
32:ev19h
32:ev20h
32:ev21h
32:ev22h
32:ev23h
32:ev24h
32:ev25h
32:ev26h
32:ev27h
32:ev28h
32:ev29h
32:ev30h
32:ev31h
32:pc
32:msr
32:cr
32:lr
32:ctr
32:xer
0:
64:acc
32:spefscr
* Makefile.in (clean): Remove new files. (powerpc-32.o, powerpc-32.c, powerpc-e500.o, powerpc-e500.c) (powerpc-64.o, powerpc-64.c): New rules. * configure.srv: Use alternate register sets for powerpc64--linux with AltiVec, powerpc--linux with AltiVec, and powerpc--linux with SPE. * linux-ppc-low.c (ppc_regmap): Do not fetch the FP registers for SPE targets. (ppc_cannot_store_register): Do not check for FPSCR for SPE targets. (PTRACE_GETVRREGS, PTRACE_SETVRREGS, SIZEOF_VRREGS, ppc_fill_vrregset) (ppc_store_vrregset, PTRACE_GETEVRREGS, PTRACE_SETEVRREGS) (struct gdb_evrregset_t, ppc_fill_evrregset, ppc_store_evrregset): New. (target_regsets): Add AltiVec and SPE register sets. * configure.ac: Check for AltiVec and SPE. * linux-ppc64-low.c (PTRACE_GETVRREGS, PTRACE_SETVRREGS, SIZEOF_VRREGS) (ppc_fill_vrregset, ppc_store_vrregset): New. (target_regsets): Add AltiVec register set. * configure: Regenerated. * features/Makefile (WHICH): Add PowerPC register definitions. (rs6000/powerpc-32-expedite, rs6000/powerpc-e500-expedite) (rs6000/powerpc-64-expedite): New macros. ($(outdir)/%.dat): Handle subdirectories. * regformats/rs6000/powerpc-32.dat, regformats/rs6000/powerpc-64.dat, regformats/rs6000/powerpc-e500.dat: New generated files. 2007-10-15 19:58:17 +00:00			`# DO NOT EDIT: generated from rs6000/powerpc-e500.xml`
			`name:powerpc_e500`
			`expedite:r1,pc`
			`32:r0`
			`32:r1`
			`32:r2`
			`32:r3`
			`32:r4`
			`32:r5`
			`32:r6`
			`32:r7`
			`32:r8`
			`32:r9`
			`32:r10`
			`32:r11`
			`32:r12`
			`32:r13`
			`32:r14`
			`32:r15`
			`32:r16`
			`32:r17`
			`32:r18`
			`32:r19`
			`32:r20`
			`32:r21`
			`32:r22`
			`32:r23`
			`32:r24`
			`32:r25`
			`32:r26`
			`32:r27`
			`32:r28`
			`32:r29`
			`32:r30`
			`32:r31`
			`32:ev0h`
			`32:ev1h`
			`32:ev2h`
			`32:ev3h`
			`32:ev4h`
			`32:ev5h`
			`32:ev6h`
			`32:ev7h`
			`32:ev8h`
			`32:ev9h`
			`32:ev10h`
			`32:ev11h`
			`32:ev12h`
			`32:ev13h`
			`32:ev14h`
			`32:ev15h`
			`32:ev16h`
			`32:ev17h`
			`32:ev18h`
			`32:ev19h`
			`32:ev20h`
			`32:ev21h`
			`32:ev22h`
			`32:ev23h`
			`32:ev24h`
			`32:ev25h`
			`32:ev26h`
			`32:ev27h`
			`32:ev28h`
			`32:ev29h`
			`32:ev30h`
			`32:ev31h`
			`32:pc`
			`32:msr`
			`32:cr`
			`32:lr`
			`32:ctr`
			`32:xer`
			`0:`
			`64:acc`
			`32:spefscr`