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old-cross-binutils/ld/testsuite/ld-powerpc/apuinfo.rd

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Fix the merging of .PPC.EMB.apuinfo sections. Add a test to make sure that the fix continues to work.
2002-12-03 18:24:33 +00:00
#source: apuinfo1.s
#source: apuinfo2.s
bfd/ * elf32-ppc.c (ppc_elf_begin_write_processing): Allow empty apuinfo sections, only scan input sections once and reuse the buffer. ld/testsuite/ * ld-powerpc/apuinfo-nul.s: New. * ld-powerpc/apuinfo.rd: Add it. * ld-powerpc/powerpc.exp: Likewise.
2010-02-08 07:09:39 +00:00
#source: apuinfo-nul.s
Fix the merging of .PPC.EMB.apuinfo sections. Add a test to make sure that the fix continues to work.
2002-12-03 18:24:33 +00:00
#as: -me500
bfd/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * elflink.c (elf_mark_used_section): New. (bfd_elf_gc_sections): Call elf_gc_mark_section for non-relocatable link if we don't do GC. include/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * bfdlink.h (bfd_link_info): Add gc_sections. ld/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove unused empty output sections for non-relocatable link. * ld.h (args_type): Remove gc_sections. * ldlang.c (lang_mark_used_section): New. (lang_gc_sections): Use link_info.gc_sections instead of command_line.gc_sections. * ldmain.c (main): Likewise. * lexsup.c (parse_args): Likewise. * ldlang.c (lang_process): Call lang_mark_used_section. * ldmain.c (main): Initialize link_info.gc_sections to FALSE. ld/testsuite/ 2005-03-16 H.J. Lu <hongjiu.lu@intel.com> * ld-alpha/tlsbin.rd: Updated for empty section removal. * ld-alpha/tlsbinr.rd: Likewise. * ld-alpha/tlspic.rd: Likewise. * ld-arm/mixed-lib.sym: Likewise. * ld-i386/tlsbin.rd: Likewise. * ld-i386/tlsnopic.rd: Likewise. * ld-i386/tlspic.rd: Likewise. * ld-ia64/tlsbin.rd: Likewise. * ld-ia64/tlspic.rd: Likewise. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/powerpc.exp: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-s390/tlsbin.rd: Likewise. * ld-s390/tlsbin_64.rd: Likewise. * ld-s390/tlspic.rd: Likewise. * ld-s390/tlspic_64.rd: Likewise. * ld-sh/tlsbin-2.d: Likewise. * ld-sh/tlspic-2.d: Likewise. * ld-sparc/tlssunbin32.rd: Likewise. * ld-sparc/tlssunnopic32.rd: Likewise. * ld-sparc/tlssunpic32.rd: Likewise. * ld-x86-64/tlsbin.rd: Likewise. * ld-x86-64/tlspic.rd: Likewise.
2005-03-16 21:52:48 +00:00
#readelf: -x2
Fix the merging of .PPC.EMB.apuinfo sections. Add a test to make sure that the fix continues to work.
2002-12-03 18:24:33 +00:00
#target: powerpc-eabi*
Hex dump of section '.PPC.EMB.apuinfo':
Power/GAS: Don't set VLE annotation for non-VLE processors/instructions Only set the VLE flag if the instruction has been pulled via the VLE instruction set. This way the flag is guaranteed to be set for VLE-only instructions or for VLE-only processors, however it'll remain clear for dual-mode instructions on dual-mode and, more importantly, standard-mode processors. gas/ * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE flag if both the processor and opcode flags match. ld/testsuite/ * ld-powerpc/apuinfo-vle.rd: New test. * ld-powerpc/apuinfo-vle.s: New test source. * ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE handling change. * ld-powerpc/powerpc.exp: Run the new test.
2014-08-22 15:52:20 +00:00
0x00000000 (00000008|08000000) (0000001c|1c000000) (00000002|02000000) 41505569 .*APUi
* ld-powerpc/powerpc.exp: Modify emulation option passed to ld when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
2012-10-29 09:25:53 +00:00
0x00000010 6e666f00 (00420001|01004200) (00430001|01004300) (00410001|01004100) nfo.*
Power/GAS: Don't set VLE annotation for non-VLE processors/instructions Only set the VLE flag if the instruction has been pulled via the VLE instruction set. This way the flag is guaranteed to be set for VLE-only instructions or for VLE-only processors, however it'll remain clear for dual-mode instructions on dual-mode and, more importantly, standard-mode processors. gas/ * config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE flag if both the processor and opcode flags match. ld/testsuite/ * ld-powerpc/apuinfo-vle.rd: New test. * ld-powerpc/apuinfo-vle.s: New test source. * ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE handling change. * ld-powerpc/powerpc.exp: Run the new test.
2014-08-22 15:52:20 +00:00
0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) 01000001 .*
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