1999-05-03 07:29:11 +00:00
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/* ppc-dis.c -- Disassemble PowerPC instructions
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* ppc-dis.c (powerpc_dialect): Handle power4 option.
* ppc-opc.c (insert_bdm): Correct description of "at" branch
hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
(PPCCOM32, PPCCOM64): Delete.
(NOPOWER4, POWER4): Define.
(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
are enabled for power4 rather than ppc64.
2002-02-25 03:43:46 +00:00
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Copyright 1994, 1995, 2000, 2001, 2002 Free Software Foundation, Inc.
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1999-05-03 07:29:11 +00:00
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Written by Ian Lance Taylor, Cygnus Support
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version
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2, or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/ppc.h"
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/* This file provides several disassembler functions, all of which use
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the disassembler interface defined in dis-asm.h. Several functions
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are provided because this file handles disassembly for the PowerPC
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in both big and little endian mode and also for the POWER (RS/6000)
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chip. */
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static int print_insn_powerpc PARAMS ((bfd_vma, struct disassemble_info *,
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int bigendian, int dialect));
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[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
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static int powerpc_dialect PARAMS ((struct disassemble_info *));
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/* Determine which set of machines to disassemble for. PPC403/601 or
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2002-02-19 15:20:26 +00:00
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BookE. For convenience, also disassemble instructions supported
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by the AltiVec vector unit. */
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[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
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int
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powerpc_dialect(info)
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struct disassemble_info *info;
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{
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int dialect = PPC_OPCODE_PPC | PPC_OPCODE_ALTIVEC;
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binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
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if (BFD_DEFAULT_TARGET_SIZE == 64)
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dialect |= PPC_OPCODE_64;
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if (info->disassembler_options
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&& (strcmp (info->disassembler_options, "booke") == 0
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|| strcmp (info->disassembler_options, "booke32") == 0
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|| strcmp (info->disassembler_options, "booke64") == 0))
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[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
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dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
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else
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2002-08-19 Elena Zannoni <ezannoni@redhat.com>
From matthew green <mrg@redhat.com>
* ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
`-mefs'. Turn off AltiVec for E500 and efs.
(print_insn_powerpc): Don't print an AltiVec instruction if the
dialect is not efs.
* ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
for extracting pmrn/evld/evstd/etc operands.
(CRB, CRFD, CRFS, DC, RD): New instruction fields.
(CT): Make this equal to RD + 1.
(PMRN): New operand.
(RA): Update.
(EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
(WS): Update.
(EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
(ISEL, ISEL_MASK): New instruction form and mask for ISEL.
(XISEL, XISEL_MASK): New instruction form and mask for ISEL.
(CTX, CTX_MASK): New instruction form and mask for context cache
instructions.
(UCTX, UCTX_MASK): New instruction form and mask for user context
cache instructions.
(XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
(CLASSIC): New define.
(PPCESPE): New define.
(PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
defines for integer select, cache control, branch
locking, power management, cache locking and machine check
APU instructions, respectively.
(efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
instructions.
(rfmci): New machine check APU instruction.
(isel): New integer select APU instructino.
(icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
dcbtstlse, dcblc, dcblce): New cache control APU instructions.
(mtspefscr, mfspefscr): New instructions.
(mfpmr, mtpmr): New performance monitor APU instructions.
(savecontext): New context cache APU instructions.
(bblels, bbelr): New branch locking APU instructions.
(bblels, bbelr): New instructions.
(mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-19 20:59:10 +00:00
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if ((info->mach == bfd_mach_ppc_e500)
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|| (info->disassembler_options
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&& ( strcmp (info->disassembler_options, "e500") == 0
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|| strcmp (info->disassembler_options, "e500x2") == 0)))
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{
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dialect |= PPC_OPCODE_BOOKE
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| PPC_OPCODE_SPE | PPC_OPCODE_ISEL
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| PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
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| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
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| PPC_OPCODE_RFMCI;
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/* efs* and AltiVec conflict. */
|
|
|
|
dialect &= ~PPC_OPCODE_ALTIVEC;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
if (info->disassembler_options
|
|
|
|
&& (strcmp (info->disassembler_options, "efs") == 0))
|
|
|
|
{
|
|
|
|
dialect |= PPC_OPCODE_EFS;
|
|
|
|
/* efs* and AltiVec conflict. */
|
|
|
|
dialect &= ~PPC_OPCODE_ALTIVEC;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
dialect |= PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_COMMON;
|
binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
|
|
|
|
* ppc-dis.c (powerpc_dialect): Handle power4 option.
* ppc-opc.c (insert_bdm): Correct description of "at" branch
hints. Test PPC_OPCODE_POWER4 to determine branch hint flavour.
(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
(PPCCOM32, PPCCOM64): Delete.
(NOPOWER4, POWER4): Define.
(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
are enabled for power4 rather than ppc64.
2002-02-25 03:43:46 +00:00
|
|
|
if (info->disassembler_options
|
|
|
|
&& strcmp (info->disassembler_options, "power4") == 0)
|
|
|
|
dialect |= PPC_OPCODE_POWER4;
|
|
|
|
|
binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
|
|
|
if (info->disassembler_options)
|
|
|
|
{
|
|
|
|
if (strstr (info->disassembler_options, "32") != NULL)
|
|
|
|
dialect &= ~PPC_OPCODE_64;
|
|
|
|
else if (strstr (info->disassembler_options, "64") != NULL)
|
|
|
|
dialect |= PPC_OPCODE_64;
|
|
|
|
}
|
|
|
|
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
return dialect;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a big endian PowerPC instruction. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
int
|
|
|
|
print_insn_big_powerpc (memaddr, info)
|
|
|
|
bfd_vma memaddr;
|
|
|
|
struct disassemble_info *info;
|
|
|
|
{
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
return print_insn_powerpc (memaddr, info, 1, powerpc_dialect(info));
|
1999-05-03 07:29:11 +00:00
|
|
|
}
|
|
|
|
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
/* Print a little endian PowerPC instruction. */
|
1999-05-03 07:29:11 +00:00
|
|
|
|
|
|
|
int
|
|
|
|
print_insn_little_powerpc (memaddr, info)
|
|
|
|
bfd_vma memaddr;
|
|
|
|
struct disassemble_info *info;
|
|
|
|
{
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 01:59:09 +00:00
|
|
|
return print_insn_powerpc (memaddr, info, 0, powerpc_dialect(info));
|
1999-05-03 07:29:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a POWER (RS/6000) instruction. */
|
|
|
|
|
|
|
|
int
|
|
|
|
print_insn_rs6000 (memaddr, info)
|
|
|
|
bfd_vma memaddr;
|
|
|
|
struct disassemble_info *info;
|
|
|
|
{
|
|
|
|
return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Print a PowerPC or POWER instruction. */
|
|
|
|
|
|
|
|
static int
|
|
|
|
print_insn_powerpc (memaddr, info, bigendian, dialect)
|
|
|
|
bfd_vma memaddr;
|
|
|
|
struct disassemble_info *info;
|
|
|
|
int bigendian;
|
|
|
|
int dialect;
|
|
|
|
{
|
|
|
|
bfd_byte buffer[4];
|
|
|
|
int status;
|
|
|
|
unsigned long insn;
|
|
|
|
const struct powerpc_opcode *opcode;
|
|
|
|
const struct powerpc_opcode *opcode_end;
|
|
|
|
unsigned long op;
|
|
|
|
|
|
|
|
status = (*info->read_memory_func) (memaddr, buffer, 4, info);
|
|
|
|
if (status != 0)
|
|
|
|
{
|
|
|
|
(*info->memory_error_func) (status, memaddr, info);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (bigendian)
|
|
|
|
insn = bfd_getb32 (buffer);
|
|
|
|
else
|
|
|
|
insn = bfd_getl32 (buffer);
|
|
|
|
|
|
|
|
/* Get the major opcode of the instruction. */
|
|
|
|
op = PPC_OP (insn);
|
|
|
|
|
|
|
|
/* Find the first match in the opcode table. We could speed this up
|
|
|
|
a bit by doing a binary search on the major opcode. */
|
|
|
|
opcode_end = powerpc_opcodes + powerpc_num_opcodes;
|
|
|
|
for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
|
|
|
|
{
|
|
|
|
unsigned long table_op;
|
|
|
|
const unsigned char *opindex;
|
|
|
|
const struct powerpc_operand *operand;
|
|
|
|
int invalid;
|
|
|
|
int need_comma;
|
|
|
|
int need_paren;
|
|
|
|
|
|
|
|
table_op = PPC_OP (opcode->opcode);
|
|
|
|
if (op < table_op)
|
|
|
|
break;
|
|
|
|
if (op > table_op)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if ((insn & opcode->mask) != opcode->opcode
|
|
|
|
|| (opcode->flags & dialect) == 0)
|
|
|
|
continue;
|
|
|
|
|
2002-08-19 Elena Zannoni <ezannoni@redhat.com>
From matthew green <mrg@redhat.com>
* ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
`-mefs'. Turn off AltiVec for E500 and efs.
(print_insn_powerpc): Don't print an AltiVec instruction if the
dialect is not efs.
* ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
for extracting pmrn/evld/evstd/etc operands.
(CRB, CRFD, CRFS, DC, RD): New instruction fields.
(CT): Make this equal to RD + 1.
(PMRN): New operand.
(RA): Update.
(EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
(WS): Update.
(EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
(ISEL, ISEL_MASK): New instruction form and mask for ISEL.
(XISEL, XISEL_MASK): New instruction form and mask for ISEL.
(CTX, CTX_MASK): New instruction form and mask for context cache
instructions.
(UCTX, UCTX_MASK): New instruction form and mask for user context
cache instructions.
(XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
(CLASSIC): New define.
(PPCESPE): New define.
(PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
defines for integer select, cache control, branch
locking, power management, cache locking and machine check
APU instructions, respectively.
(efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
instructions.
(rfmci): New machine check APU instruction.
(isel): New integer select APU instructino.
(icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
dcbtstlse, dcblc, dcblce): New cache control APU instructions.
(mtspefscr, mfspefscr): New instructions.
(mfpmr, mtpmr): New performance monitor APU instructions.
(savecontext): New context cache APU instructions.
(bblels, bbelr): New branch locking APU instructions.
(bblels, bbelr): New instructions.
(mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias.
2002-08-19 20:59:10 +00:00
|
|
|
if ((dialect & PPC_OPCODE_EFS) && (opcode->flags & PPC_OPCODE_ALTIVEC))
|
|
|
|
continue;
|
|
|
|
|
1999-05-03 07:29:11 +00:00
|
|
|
/* Make two passes over the operands. First see if any of them
|
|
|
|
have extraction functions, and, if they do, make sure the
|
|
|
|
instruction is valid. */
|
|
|
|
invalid = 0;
|
|
|
|
for (opindex = opcode->operands; *opindex != 0; opindex++)
|
|
|
|
{
|
|
|
|
operand = powerpc_operands + *opindex;
|
|
|
|
if (operand->extract)
|
binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
|
|
|
(*operand->extract) (insn, dialect, &invalid);
|
1999-05-03 07:29:11 +00:00
|
|
|
}
|
|
|
|
if (invalid)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* The instruction is valid. */
|
|
|
|
(*info->fprintf_func) (info->stream, "%s", opcode->name);
|
|
|
|
if (opcode->operands[0] != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "\t");
|
|
|
|
|
|
|
|
/* Now extract and print the operands. */
|
|
|
|
need_comma = 0;
|
|
|
|
need_paren = 0;
|
|
|
|
for (opindex = opcode->operands; *opindex != 0; opindex++)
|
|
|
|
{
|
|
|
|
long value;
|
|
|
|
|
|
|
|
operand = powerpc_operands + *opindex;
|
|
|
|
|
|
|
|
/* Operands that are marked FAKE are simply ignored. We
|
|
|
|
already made sure that the extract function considered
|
|
|
|
the instruction to be valid. */
|
|
|
|
if ((operand->flags & PPC_OPERAND_FAKE) != 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* Extract the value from the instruction. */
|
|
|
|
if (operand->extract)
|
binutils/ChangeLog
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
to operand->insert.
(md_assemble): Likewise.
gas/testsuite/ChangeLog
* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
(insert_bat, extract_bat, insert_bba, extract_bba,
insert_bd, extract_bd, insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo,
insert_bo, extract_bo, insert_boe, extract_boe,
insert_ds, extract_ds, insert_de, extract_de,
insert_des, extract_des, insert_li, extract_li,
insert_mbe, extract_mbe, insert_mb6, extract_mb6,
insert_nb, extract_nb, insert_nsi, extract_nsi,
insert_ral, insert_ram, insert_ras,
insert_rbs, extract_rbs, insert_sh6, extract_sh6,
insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
(extract_bd, extract_bdm, extract_bdp,
extract_ds, extract_des,
extract_li, extract_nsi): Implement sign extension without conditional.
(insert_bdm, extract_bdm,
insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
(extract_bdm, extract_bdp): Correct 32 bit validation.
(AT1_MASK, AT2_MASK): Define.
(BBOAT_MASK): Define.
(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
(BOFM64, BOFP64, BOTM64, BOTP64): Define.
(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
(PPCCOM32, PPCCOM64): Define.
(powerpc_opcodes): Modify existing 32 bit insns with branch hints
and add new patterns to implement 64 bit branches with hints. Move
booke instructions so they match before ppc64.
* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
64 bit default targets, and parse "32" and "64" in options.
Formatting fixes.
(print_insn_powerpc): Pass dialect to operand->extract.
2001-11-15 01:08:53 +00:00
|
|
|
value = (*operand->extract) (insn, dialect, (int *) NULL);
|
1999-05-03 07:29:11 +00:00
|
|
|
else
|
|
|
|
{
|
|
|
|
value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
|
|
|
|
if ((operand->flags & PPC_OPERAND_SIGNED) != 0
|
|
|
|
&& (value & (1 << (operand->bits - 1))) != 0)
|
|
|
|
value -= 1 << operand->bits;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the operand is optional, and the value is zero, don't
|
|
|
|
print anything. */
|
|
|
|
if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
|
|
|
|
&& (operand->flags & PPC_OPERAND_NEXT) == 0
|
|
|
|
&& value == 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (need_comma)
|
|
|
|
{
|
|
|
|
(*info->fprintf_func) (info->stream, ",");
|
|
|
|
need_comma = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Print the operand as directed by the flags. */
|
|
|
|
if ((operand->flags & PPC_OPERAND_GPR) != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "r%ld", value);
|
|
|
|
else if ((operand->flags & PPC_OPERAND_FPR) != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "f%ld", value);
|
* ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.
* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-03 22:25:08 +00:00
|
|
|
else if ((operand->flags & PPC_OPERAND_VR) != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "v%ld", value);
|
1999-05-03 07:29:11 +00:00
|
|
|
else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
|
|
|
|
(*info->print_address_func) (memaddr + value, info);
|
|
|
|
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
|
|
|
|
(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
|
|
|
|
else if ((operand->flags & PPC_OPERAND_CR) == 0
|
|
|
|
|| (dialect & PPC_OPCODE_PPC) == 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "%ld", value);
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (operand->bits == 3)
|
|
|
|
(*info->fprintf_func) (info->stream, "cr%d", value);
|
|
|
|
else
|
|
|
|
{
|
|
|
|
static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
|
|
|
|
int cr;
|
|
|
|
int cc;
|
|
|
|
|
|
|
|
cr = value >> 2;
|
|
|
|
if (cr != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "4*cr%d", cr);
|
|
|
|
cc = value & 3;
|
|
|
|
if (cc != 0)
|
|
|
|
{
|
|
|
|
if (cr != 0)
|
|
|
|
(*info->fprintf_func) (info->stream, "+");
|
|
|
|
(*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (need_paren)
|
|
|
|
{
|
|
|
|
(*info->fprintf_func) (info->stream, ")");
|
|
|
|
need_paren = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((operand->flags & PPC_OPERAND_PARENS) == 0)
|
|
|
|
need_comma = 1;
|
|
|
|
else
|
|
|
|
{
|
|
|
|
(*info->fprintf_func) (info->stream, "(");
|
|
|
|
need_paren = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We have found and printed an instruction; return. */
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We could not find a match. */
|
|
|
|
(*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
|
|
|
|
|
|
|
|
return 4;
|
|
|
|
}
|