old-cross-binutils/ld/testsuite/ld-tic6x/pcrel-reloc-local-rel.d

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bfd: * elf32-tic6x.h: New. * elf-bfd.h (enum elf_target_id): Define TIC6X_ELF_DATA. * elf32-tic6x.c (struct elf32_tic6x_obj_tdata, elf32_tic6x_tdata, elf32_tic6x_howto_table_rel, elf32_tic6x_info_to_howto_rel, elf32_tic6x_set_use_rela_p, elf32_tic6x_mkobject, elf32_tic6x_new_section_hook, elf32_tic6x_rel_relocation_p, bfd_elf32_mkobject, bfd_elf32_new_section_hook): New. (elf32_tic6x_reloc_type_lookup, elf32_tic6x_reloc_name_lookup, elf32_tic6x_relocate_section): Handle REL relocations. (elf_info_to_howto_rel): Define to elf32_tic6x_info_to_howto_rel. gas: * config/tc-tic6x.c (OPTION_MGENERATE_REL): New. (md_longopts): Add -mgenerate-rel. (tic6x_generate_rela): New. (md_parse_option): Handle -mgenerate-rel. (md_show_usage): Add comment that -mgenerate-rel is undocumented. (tic6x_init_after_args): New. (md_apply_fix): Correct shift calculations for SB-relative relocations. (md_pcrel_from): Change to tic6x_pcrel_from_section. Do not adjust addresses for relocations referencing symbols in other sections. (tc_gen_reloc): Adjust addend calculations for REL relocations. * config/tc-tic6x.h (MD_PCREL_FROM_SECTION, tic6x_pcrel_from_section, tc_init_after_args, tic6x_init_after_args): New. ld/testsuite: * ld-tic6x/data-reloc-global-rel.d, ld-tic6x/data-reloc-global-rel.s, ld-tic6x/data-reloc-local-r-rel.d, ld-tic6x/data-reloc-local-rel.d, ld-tic6x/mvk-reloc-global-rel.d, ld-tic6x/mvk-reloc-global-rel.s, ld-tic6x/mvk-reloc-local-1-rel.s, ld-tic6x/mvk-reloc-local-2-rel.s, ld-tic6x/mvk-reloc-local-r-rel.d, ld-tic6x/mvk-reloc-local-rel.d, ld-tic6x/pcrel-reloc-global-rel.d, ld-tic6x/pcrel-reloc-local-r-rel.d, ld-tic6x/pcrel-reloc-local-rel.d, ld-tic6x/sbr-reloc-global-rel.d, ld-tic6x/sbr-reloc-global-rel.s, ld-tic6x/sbr-reloc-local-1-rel.s, ld-tic6x/sbr-reloc-local-2-rel.s, ld-tic6x/sbr-reloc-local-r-rel.d, ld-tic6x/sbr-reloc-local-rel.d: New.
2010-04-20 22:03:00 +00:00
#name: C6X PC-relative relocations, local symbols, REL
#as: -mlittle-endian -mgenerate-rel
#ld: -melf32_tic6x_le -Tgeneric.ld
#source: pcrel-reloc-local-1.s
#source: pcrel-reloc-local-2.s
#objdump: -dr
.*: *file format elf32-tic6x-le
Disassembly of section \.text:
10000000 <[^>]*>:
10000000:[ \t]+00000000[ \t]+nop 1
10000004:[ \t]+00900162[ \t]+addkpc \.S2 10000040 <[^>]*>,b1,0
10000008:[ \t]+00910162[ \t]+addkpc \.S2 10000044 <[^>]*>,b1,0
1000000c:[ \t]+00000812[ \t]+b \.S2 10000040 <[^>]*>
10000010:[ \t]+00000892[ \t]+b \.S2 10000044 <[^>]*>
10000014:[ \t]+00821022[ \t]+bdec \.S2 10000040 <[^>]*>,b1
10000018:[ \t]+00823022[ \t]+bdec \.S2 10000044 <[^>]*>,b1
1000001c:[ \t]+00100122[ \t]+bnop \.S2 10000040 <[^>]*>,0
10000020:[ \t]+00090122[ \t]+bnop \.S2 10000044 <[^>]*>,0
[ \t]*\.\.\.
10000040 <[^>]*>:
10000040:[ \t]+00000000[ \t]+nop 1
10000044 <[^>]*>:
[ \t]*\.\.\.
10000064:[ \t]+00100122[ \t]+bnop \.S2 100000a0 <[^>]*>,0
10000068:[ \t]+00110122[ \t]+bnop \.S2 100000a4 <[^>]*>,0
1000006c:[ \t]+00821022[ \t]+bdec \.S2 100000a0 <[^>]*>,b1
10000070:[ \t]+00823022[ \t]+bdec \.S2 100000a4 <[^>]*>,b1
10000074:[ \t]+00000812[ \t]+b \.S2 100000a0 <[^>]*>
10000078:[ \t]+00000892[ \t]+b \.S2 100000a4 <[^>]*>
1000007c:[ \t]+00900162[ \t]+addkpc \.S2 100000a0 <[^>]*>,b1,0
10000080:[ \t]+00890162[ \t]+addkpc \.S2 100000a4 <[^>]*>,b1,0
[ \t]*\.\.\.
100000a0 <[^>]*>:
100000a0:[ \t]+00000000[ \t]+nop 1
100000a4 <[^>]*>:
[ \t]*\.\.\.