236 lines
7.3 KiB
D
236 lines
7.3 KiB
D
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#name: FRV TLS relocs with addends, shared linking with static TLS
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#source: tls-2.s
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#as: --defsym static_tls=1
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#objdump: -DR -j .text -j .got -j .plt
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#ld: -shared tmpdir/tls-1-dep.so --version-script tls-1-shared.lds
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.*: file format elf.*frv.*
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Disassembly of section \.plt:
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00000464 <\.plt>:
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464: 92 c8 f0 5c ldi @\(gr15,92\),gr9
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468: c0 3a 40 00 bralr
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46c: 90 cc ff e8 lddi @\(gr15,-24\),gr8
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470: 80 30 80 00 jmpl @\(gr8,gr0\)
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474: 92 c8 f0 78 ldi @\(gr15,120\),gr9
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478: c0 3a 40 00 bralr
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47c: 90 cc ff f8 lddi @\(gr15,-8\),gr8
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480: 80 30 80 00 jmpl @\(gr8,gr0\)
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Disassembly of section \.text:
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00000484 <_start>:
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484: 92 c8 f0 30 ldi @\(gr15,48\),gr9
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488: 92 c8 f0 78 ldi @\(gr15,120\),gr9
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48c: 92 c8 f0 4c ldi @\(gr15,76\),gr9
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490: 00 88 00 00 nop\.p
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494: 80 88 00 00 nop
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498: 92 c8 f0 70 ldi @\(gr15,112\),gr9
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49c: 80 88 00 00 nop
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4a0: 00 88 00 00 nop\.p
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4a4: 80 88 00 00 nop
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4a8: 92 c8 f0 7c ldi @\(gr15,124\),gr9
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4ac: 80 88 00 00 nop
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4b0: 00 88 00 00 nop\.p
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4b4: 80 88 00 00 nop
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4b8: 92 c8 f0 8c ldi @\(gr15,140\),gr9
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4bc: 80 88 00 00 nop
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4c0: 12 c8 f0 34 ldi\.p @\(gr15,52\),gr9
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4c4: 80 88 00 00 nop
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4c8: 80 88 00 00 nop
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4cc: 12 c8 f0 3c ldi\.p @\(gr15,60\),gr9
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4d0: 80 88 00 00 nop
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4d4: 80 88 00 00 nop
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4d8: 12 c8 f0 50 ldi\.p @\(gr15,80\),gr9
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4dc: 80 88 00 00 nop
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4e0: 80 88 00 00 nop
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4e4: 80 88 00 00 nop
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4e8: 92 fc f8 14 setlos 0xf*fffff814,gr9
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4ec: 80 88 00 00 nop
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4f0: 92 fc 08 14 setlos 0x814,gr9
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4f4: 92 f8 00 00 sethi hi\(0x0\),gr9
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4f8: 92 f4 f8 14 setlo 0xf814,gr9
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4fc: 92 c8 f0 54 ldi @\(gr15,84\),gr9
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500: 92 c8 f0 5c ldi @\(gr15,92\),gr9
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504: 92 c8 f0 18 ldi @\(gr15,24\),gr9
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508: 00 88 00 00 nop\.p
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50c: 80 88 00 00 nop
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510: 92 c8 f0 90 ldi @\(gr15,144\),gr9
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514: 80 88 00 00 nop
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518: 00 88 00 00 nop\.p
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51c: 80 88 00 00 nop
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520: 92 c8 f0 60 ldi @\(gr15,96\),gr9
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524: 80 88 00 00 nop
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528: 00 88 00 00 nop\.p
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52c: 80 88 00 00 nop
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530: 92 c8 f0 64 ldi @\(gr15,100\),gr9
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534: 80 88 00 00 nop
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538: 12 c8 f0 58 ldi\.p @\(gr15,88\),gr9
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53c: 80 88 00 00 nop
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540: 80 88 00 00 nop
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544: 12 c8 f0 0c ldi\.p @\(gr15,12\),gr9
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548: 80 88 00 00 nop
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54c: 80 88 00 00 nop
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550: 12 c8 f0 1c ldi\.p @\(gr15,28\),gr9
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554: 80 88 00 00 nop
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558: 80 88 00 00 nop
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55c: 80 88 00 00 nop
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560: 92 fc f8 24 setlos 0xf*fffff824,gr9
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564: 80 88 00 00 nop
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568: 92 fc 08 24 setlos 0x824,gr9
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56c: 92 f8 00 00 sethi hi\(0x0\),gr9
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570: 92 f4 f8 24 setlo 0xf824,gr9
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574: 92 c8 f0 24 ldi @\(gr15,36\),gr9
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578: fe 3f ff c1 call 47c <i\+0x46c>
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57c: 92 c8 f0 40 ldi @\(gr15,64\),gr9
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580: 00 88 00 00 nop\.p
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584: 80 88 00 00 nop
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588: 92 c8 f0 68 ldi @\(gr15,104\),gr9
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58c: 80 88 00 00 nop
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590: 00 88 00 00 nop\.p
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594: 80 88 00 00 nop
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598: 92 c8 f0 80 ldi @\(gr15,128\),gr9
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59c: 80 88 00 00 nop
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5a0: 00 88 00 00 nop\.p
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5a4: 80 88 00 00 nop
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5a8: 92 c8 f0 84 ldi @\(gr15,132\),gr9
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5ac: 80 88 00 00 nop
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5b0: 12 c8 f0 28 ldi\.p @\(gr15,40\),gr9
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5b4: 80 88 00 00 nop
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5b8: 80 88 00 00 nop
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5bc: 12 c8 f0 38 ldi\.p @\(gr15,56\),gr9
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5c0: 80 88 00 00 nop
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5c4: 80 88 00 00 nop
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5c8: 12 c8 f0 44 ldi\.p @\(gr15,68\),gr9
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5cc: 80 88 00 00 nop
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5d0: 80 88 00 00 nop
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5d4: 80 88 00 00 nop
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5d8: 92 fc 00 04 setlos 0x4,gr9
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5dc: 80 88 00 00 nop
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5e0: 92 fc 10 04 setlos 0x1004,gr9
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5e4: 92 f8 00 01 sethi 0x1,gr9
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5e8: 92 f4 00 04 setlo 0x4,gr9
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5ec: 92 c8 f0 2c ldi @\(gr15,44\),gr9
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5f0: fe 3f ff 9f call 46c <i\+0x45c>
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5f4: 92 c8 f0 48 ldi @\(gr15,72\),gr9
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5f8: 00 88 00 00 nop\.p
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5fc: 80 88 00 00 nop
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600: 92 c8 f0 6c ldi @\(gr15,108\),gr9
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604: 80 88 00 00 nop
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608: 00 88 00 00 nop\.p
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60c: 80 88 00 00 nop
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610: 92 c8 f0 74 ldi @\(gr15,116\),gr9
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614: 80 88 00 00 nop
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618: 00 88 00 00 nop\.p
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61c: 80 88 00 00 nop
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620: 92 c8 f0 88 ldi @\(gr15,136\),gr9
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624: 80 88 00 00 nop
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628: 12 c8 f0 10 ldi\.p @\(gr15,16\),gr9
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62c: 80 88 00 00 nop
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630: 80 88 00 00 nop
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634: 12 c8 f0 14 ldi\.p @\(gr15,20\),gr9
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638: 80 88 00 00 nop
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63c: 80 88 00 00 nop
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640: 12 c8 f0 20 ldi\.p @\(gr15,32\),gr9
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644: 80 88 00 00 nop
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648: 80 88 00 00 nop
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64c: 92 c8 f0 30 ldi @\(gr15,48\),gr9
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650: 92 c8 f0 4c ldi @\(gr15,76\),gr9
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654: 92 c8 f0 54 ldi @\(gr15,84\),gr9
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658: 92 c8 f0 18 ldi @\(gr15,24\),gr9
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65c: 92 c8 f0 24 ldi @\(gr15,36\),gr9
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660: 92 c8 f0 40 ldi @\(gr15,64\),gr9
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664: 92 c8 f0 2c ldi @\(gr15,44\),gr9
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668: 92 c8 f0 48 ldi @\(gr15,72\),gr9
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66c: 80 88 00 00 nop
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670: 92 c8 f0 78 ldi @\(gr15,120\),gr9
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674: 80 88 00 00 nop
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678: 80 88 00 00 nop
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67c: 92 c8 f0 5c ldi @\(gr15,92\),gr9
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Disassembly of section \.got:
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00004718 <_GLOBAL_OFFSET_TABLE_-0x20>:
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4718: 00 00 00 00 add\.p gr0,gr0,gr0
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4718: R_FRV_TLSDESC_VALUE \.tbss
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471c: 00 00 10 11 add\.p sp,gr17,gr0
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4720: 00 00 00 00 add\.p gr0,gr0,gr0
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4720: R_FRV_TLSDESC_VALUE x
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4724: 00 00 10 01 add\.p sp,sp,gr0
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4728: 00 00 00 00 add\.p gr0,gr0,gr0
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4728: R_FRV_TLSDESC_VALUE \.tbss
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472c: 00 00 10 01 add\.p sp,sp,gr0
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4730: 00 00 00 00 add\.p gr0,gr0,gr0
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4730: R_FRV_TLSDESC_VALUE \.tbss
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4734: 00 00 17 f1 \*unknown\*
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00004738 <_GLOBAL_OFFSET_TABLE_>:
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\.\.\.
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4744: 00 00 10 13 add\.p sp,gr19,gr0
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4744: R_FRV_TLSOFF \.tbss
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4748: 00 00 00 03 add\.p gr0,gr3,gr0
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4748: R_FRV_TLSOFF x
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474c: 00 00 10 03 add\.p sp,gr3,gr0
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474c: R_FRV_TLSOFF x
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4750: 00 01 00 11 add\.p gr16,gr17,gr0
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4750: R_FRV_TLSOFF \.tbss
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4754: 00 01 00 13 add\.p gr16,gr19,gr0
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4754: R_FRV_TLSOFF \.tbss
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4758: 00 01 00 03 add\.p gr16,gr3,gr0
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4758: R_FRV_TLSOFF x
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475c: 00 00 07 f1 \*unknown\*
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475c: R_FRV_TLSOFF \.tbss
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4760: 00 00 07 f3 \*unknown\*
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4760: R_FRV_TLSOFF \.tbss
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4764: 00 00 00 01 add\.p gr0,sp,gr0
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4764: R_FRV_TLSOFF x
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4768: 00 00 00 01 add\.p gr0,sp,gr0
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4768: R_FRV_TLSOFF \.tbss
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476c: 00 00 00 03 add\.p gr0,gr3,gr0
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476c: R_FRV_TLSOFF \.tbss
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4770: 00 00 17 f3 \*unknown\*
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4770: R_FRV_TLSOFF \.tbss
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4774: 00 00 10 03 add\.p sp,gr3,gr0
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4774: R_FRV_TLSOFF \.tbss
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4778: 00 01 07 f1 \*unknown\*
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4778: R_FRV_TLSOFF \.tbss
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477c: 00 01 07 f3 \*unknown\*
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477c: R_FRV_TLSOFF \.tbss
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4780: 00 01 00 01 add\.p gr16,sp,gr0
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4780: R_FRV_TLSOFF x
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4784: 00 01 00 01 add\.p gr16,sp,gr0
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4784: R_FRV_TLSOFF \.tbss
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4788: 00 01 00 03 add\.p gr16,gr3,gr0
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4788: R_FRV_TLSOFF \.tbss
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478c: 00 00 00 11 add\.p gr0,gr17,gr0
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478c: R_FRV_TLSOFF \.tbss
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4790: 00 00 00 13 add\.p gr0,gr19,gr0
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4790: R_FRV_TLSOFF \.tbss
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4794: 00 00 10 11 add\.p sp,gr17,gr0
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4794: R_FRV_TLSOFF \.tbss
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4798: 00 00 10 12 add\.p sp,gr18,gr0
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4798: R_FRV_TLSOFF \.tbss
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479c: 00 01 00 12 add\.p gr16,gr18,gr0
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479c: R_FRV_TLSOFF \.tbss
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47a0: 00 00 07 f2 \*unknown\*
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47a0: R_FRV_TLSOFF \.tbss
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47a4: 00 00 00 02 add\.p gr0,fp,gr0
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47a4: R_FRV_TLSOFF x
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47a8: 00 00 00 02 add\.p gr0,fp,gr0
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47a8: R_FRV_TLSOFF \.tbss
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47ac: 00 00 10 02 add\.p sp,fp,gr0
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47ac: R_FRV_TLSOFF x
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47b0: 00 00 10 01 add\.p sp,sp,gr0
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47b0: R_FRV_TLSOFF \.tbss
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47b4: 00 00 10 02 add\.p sp,fp,gr0
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47b4: R_FRV_TLSOFF \.tbss
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47b8: 00 00 17 f2 \*unknown\*
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47b8: R_FRV_TLSOFF \.tbss
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47bc: 00 01 07 f2 \*unknown\*
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47bc: R_FRV_TLSOFF \.tbss
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47c0: 00 01 00 02 add\.p gr16,fp,gr0
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47c0: R_FRV_TLSOFF x
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47c4: 00 01 00 02 add\.p gr16,fp,gr0
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47c4: R_FRV_TLSOFF \.tbss
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47c8: 00 00 00 12 add\.p gr0,gr18,gr0
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47c8: R_FRV_TLSOFF \.tbss
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