1999-08-09 21:36:23 +00:00
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/* Parameters for execution on a Motorola MCore.
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2001-03-06 08:22:02 +00:00
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Copyright 1995, 1999, 2000 Free Software Foundation, Inc.
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1999-08-09 21:36:23 +00:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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2001-03-14 23:23:16 +00:00
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#include "regcache.h"
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1999-11-09 01:23:30 +00:00
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/* The mcore is little endian (by default) */
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2001-12-15 16:53:24 +00:00
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#define TARGET_BYTE_ORDER_DEFAULT BFD_ENDIAN_LITTLE
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1999-08-09 21:36:23 +00:00
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/* All registers are 32 bits */
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#define REGISTER_SIZE 4
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#define MAX_REGISTER_RAW_SIZE 4
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#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
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#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
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#define REGISTER_VIRTUAL_SIZE(REG) 4
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#define REGISTER_RAW_SIZE(REG) 4
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#define MAX_REGISTER_VIRTUAL_SIZE 4
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#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
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extern char *mcore_register_names[];
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#define REGISTER_NAME(I) mcore_register_names[I]
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/* Registers. The Motorola MCore contains:
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16 32-bit general purpose registers (r0-r15)
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16 32-bit alternate file registers (ar0-ar15)
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32 32-bit control registers (cr0-cr31)
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+ 1 pc
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------
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65 registers */
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#define NUM_REGS 65
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#define PC_REGNUM 64
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#define SP_REGNUM 0
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#define FP_REGNUM (SP_REGNUM)
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#define PR_REGNUM 15
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#define FIRST_ARGREG 2
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#define LAST_ARGREG 7
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#define RETVAL_REGNUM 2
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/* Offset from address of function to start of its code.
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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#define DECR_PC_AFTER_BREAK 0
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/* BREAKPOINT_FROM_PC uses the program counter value to determine
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the breakpoint that should be used. */
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extern breakpoint_from_pc_fn mcore_breakpoint_from_pc;
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#define BREAKPOINT_FROM_PC(PCPTR, LENPTR) mcore_breakpoint_from_pc (PCPTR, LENPTR)
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#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
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#define SAVED_PC_AFTER_CALL(FRAME) read_register (PR_REGNUM)
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struct frame_info;
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struct type;
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struct value;
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extern void mcore_init_extra_frame_info (struct frame_info *fi);
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#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FI) mcore_init_extra_frame_info ((FI))
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#define INIT_FRAME_PC /* Not necessary */
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#define FRAME_INIT_SAVED_REGS(FI) /* handled by init_extra_frame_info */
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extern CORE_ADDR mcore_frame_chain (struct frame_info *fi);
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#define FRAME_CHAIN(FI) mcore_frame_chain ((FI))
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1999-12-14 01:06:04 +00:00
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#define FRAME_CHAIN_VALID(FP, FI) generic_file_frame_chain_valid ((FP), (FI))
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1999-08-09 21:36:23 +00:00
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extern CORE_ADDR mcore_frame_saved_pc (struct frame_info *);
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#define FRAME_SAVED_PC(FI) (mcore_frame_saved_pc ((FI)))
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/* Extracting/storing return values. */
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extern void mcore_store_return_value (struct type *type, char *valbuf);
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#define STORE_RETURN_VALUE(TYPE, VALBUF) mcore_store_return_value ((TYPE), (VALBUF))
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extern void mcore_extract_return_value (struct type *type, char *regbut, char *valbuf);
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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mcore_extract_return_value ((TYPE), (REGBUF), (VALBUF));
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#define STORE_STRUCT_RETURN(ADDR, SP) /* handled by mcore_push_arguments */
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extern CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
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mcore_extract_struct_value_address (REGBUF)
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extern CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
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2000-07-14 20:55:41 +00:00
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#define SKIP_PROLOGUE(PC) mcore_skip_prologue (PC)
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1999-08-09 21:36:23 +00:00
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#define FRAME_ARGS_SKIP 0
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extern CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
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#define FRAME_ARGS_ADDRESS(FI) mcore_frame_args_address ((FI))
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extern CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
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#define FRAME_LOCALS_ADDRESS(FI) mcore_frame_locals_address ((FI))
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#define FRAME_NUM_ARGS(FI) (-1)
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extern void mcore_pop_frame (struct frame_info *fi);
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#define POP_FRAME mcore_pop_frame (get_current_frame ())
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#define USE_GENERIC_DUMMY_FRAMES 1
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#define CALL_DUMMY {0}
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#define CALL_DUMMY_START_OFFSET (0)
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#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
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#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
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#define CALL_DUMMY_ADDRESS() entry_point_address ()
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#define SIZEOF_CALL_DUMMY_WORDS 0
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1999-08-16 19:57:19 +00:00
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#define SAVE_DUMMY_FRAME_TOS(SP) generic_save_dummy_frame_tos (SP)
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1999-08-09 21:36:23 +00:00
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2000-05-28 01:12:42 +00:00
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extern CORE_ADDR mcore_push_return_address (CORE_ADDR, CORE_ADDR);
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1999-08-09 21:36:23 +00:00
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#define PUSH_RETURN_ADDRESS(PC, SP) mcore_push_return_address (PC, SP)
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#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
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2000-05-28 01:12:42 +00:00
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extern CORE_ADDR mcore_push_arguments (int, struct value **, CORE_ADDR,
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unsigned char, CORE_ADDR);
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1999-08-09 21:36:23 +00:00
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#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
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(SP) = mcore_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
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#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
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/* MCore will never pass a sturcture by reference. It will always be split
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between registers and stack. */
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#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) 0
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extern use_struct_convention_fn mcore_use_struct_convention;
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#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mcore_use_struct_convention (GCC_P, TYPE)
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/* override the default get_saved_register function with
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one that takes account of generic CALL_DUMMY frames */
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#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
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generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
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/* Cons up virtual frame pointer for trace */
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2001-09-19 20:43:54 +00:00
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extern void mcore_virtual_frame_pointer (CORE_ADDR, int *, LONGEST *);
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1999-08-09 21:36:23 +00:00
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#define TARGET_VIRTUAL_FRAME_POINTER(PC, REGP, OFFP) \
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mcore_virtual_frame_pointer ((PC), (REGP), (OFFP))
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/* MCore can be bi-endian. */
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#define TARGET_BYTE_ORDER_SELECTABLE_P 1
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/* For PE, gcc will tell us what th real type of
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arguments are when it promotes arguments. */
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#define BELIEVE_PCC_PROMOTION 1
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