1996-08-29 00:35:11 +00:00
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#include <signal.h>
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1996-08-02 00:23:31 +00:00
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#include "sysdep.h"
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#include "bfd.h"
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#include "remote-sim.h"
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#include "d10v_sim.h"
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#define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
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#define DMEM_SIZE 16 /* Data memory */
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1996-09-04 15:41:43 +00:00
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enum _leftright { LEFT_FIRST, RIGHT_FIRST };
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1996-09-04 17:42:51 +00:00
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int d10v_debug;
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1996-09-04 15:41:43 +00:00
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host_callback *d10v_callback;
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1996-10-22 19:49:37 +00:00
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unsigned long ins_type_counters[ (int)INS_MAX ];
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1996-09-04 15:41:43 +00:00
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1996-08-02 00:23:31 +00:00
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uint16 OP[4];
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1996-10-22 19:49:37 +00:00
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static long hash PARAMS ((long insn, int format));
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1996-08-02 00:23:31 +00:00
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static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
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1996-10-22 19:49:37 +00:00
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static void get_operands PARAMS ((struct simops *s, uint32 ins));
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static void do_long PARAMS ((uint32 ins));
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static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
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static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
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static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
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extern void sim_size PARAMS ((int power));
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static void init_system PARAMS ((void));
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extern int sim_write PARAMS ((SIM_ADDR addr, unsigned char *buffer, int size));
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extern void sim_open PARAMS ((char *args));
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extern void sim_close PARAMS ((int quitting));
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extern void sim_set_profile PARAMS ((int n));
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extern void sim_set_profile_size PARAMS ((int n));
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extern void sim_resume PARAMS ((int step, int siggnal));
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extern void sim_info PARAMS ((int verbose));
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extern void sim_create_inferior PARAMS ((SIM_ADDR start_address, char **argv, char **env));
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extern void sim_kill PARAMS ((void));
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extern void sim_set_callbacks PARAMS ((host_callback *p));
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extern void sim_stop_reason PARAMS ((enum sim_stop *reason, int *sigrc));
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extern void sim_fetch_register PARAMS ((int rn, unsigned char *memory));
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extern void sim_store_register PARAMS ((int rn, unsigned char *memory));
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extern int sim_read PARAMS ((SIM_ADDR addr, unsigned char *buffer, int size));
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extern void sim_do_command PARAMS ((char *cmd));
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#ifndef INLINE
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#if defined(__GNUC__) && defined(__OPTIMIZE__)
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#define INLINE __inline__
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#else
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#define INLINE
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#endif
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#endif
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1996-08-02 00:23:31 +00:00
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#define MAX_HASH 63
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struct hash_entry
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{
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struct hash_entry *next;
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long opcode;
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long mask;
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struct simops *ops;
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};
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struct hash_entry hash_table[MAX_HASH+1];
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1996-10-22 19:49:37 +00:00
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INLINE static long
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1996-08-02 00:23:31 +00:00
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hash(insn, format)
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long insn;
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int format;
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{
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if (format & LONG_OPCODE)
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return ((insn & 0x3F000000) >> 24);
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else
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return((insn & 0x7E00) >> 9);
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}
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1996-10-22 19:49:37 +00:00
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INLINE static struct hash_entry *
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1996-08-02 00:23:31 +00:00
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lookup_hash (ins, size)
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uint32 ins;
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int size;
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{
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struct hash_entry *h;
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if (size)
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h = &hash_table[(ins & 0x3F000000) >> 24];
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else
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h = &hash_table[(ins & 0x7E00) >> 9];
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1996-10-22 19:49:37 +00:00
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while ((ins & h->mask) != h->opcode)
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1996-08-02 00:23:31 +00:00
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{
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if (h->next == NULL)
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{
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1996-09-04 17:42:51 +00:00
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(*d10v_callback->printf_filtered) (d10v_callback, "ERROR looking up hash for %x at PC %x\n",ins, PC);
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1996-10-22 19:49:37 +00:00
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exit (1);
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1996-08-02 00:23:31 +00:00
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}
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h = h->next;
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}
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return (h);
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}
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1996-10-22 19:49:37 +00:00
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INLINE static void
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1996-08-02 00:23:31 +00:00
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get_operands (struct simops *s, uint32 ins)
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{
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int i, shift, bits, flags;
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uint32 mask;
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for (i=0; i < s->numops; i++)
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{
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shift = s->operands[3*i];
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bits = s->operands[3*i+1];
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flags = s->operands[3*i+2];
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mask = 0x7FFFFFFF >> (31 - bits);
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OP[i] = (ins >> shift) & mask;
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}
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}
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static void
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do_long (ins)
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uint32 ins;
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{
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struct hash_entry *h;
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1996-09-04 17:42:51 +00:00
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
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#endif
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1996-08-02 00:23:31 +00:00
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h = lookup_hash (ins, 1);
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get_operands (h->ops, ins);
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1996-09-04 15:41:43 +00:00
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State.ins_type = INS_LONG;
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1996-09-04 17:42:51 +00:00
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-02 00:23:31 +00:00
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(h->ops->func)();
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}
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1996-09-15 03:46:52 +00:00
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1996-08-02 00:23:31 +00:00
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static void
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1996-09-04 15:41:43 +00:00
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do_2_short (ins1, ins2, leftright)
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1996-08-02 00:23:31 +00:00
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uint16 ins1, ins2;
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1996-09-04 15:41:43 +00:00
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enum _leftright leftright;
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1996-08-02 00:23:31 +00:00
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{
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struct hash_entry *h;
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1996-09-15 03:46:52 +00:00
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reg_t orig_pc = PC;
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1996-09-04 17:42:51 +00:00
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
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ins1, (leftright) ? "left" : "right", ins2);
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#endif
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1996-08-02 00:23:31 +00:00
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/* printf ("do_2_short %x -> %x\n",ins1,ins2); */
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h = lookup_hash (ins1, 0);
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get_operands (h->ops, ins1);
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1996-09-04 15:41:43 +00:00
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State.ins_type = (leftright == LEFT_FIRST) ? INS_LEFT : INS_RIGHT;
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1996-09-04 17:42:51 +00:00
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-02 00:23:31 +00:00
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(h->ops->func)();
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1996-09-15 03:46:52 +00:00
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/* If the PC has changed (ie, a jump), don't do the second instruction */
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1996-10-15 15:44:10 +00:00
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if (orig_pc == PC && !State.exception)
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1996-09-15 03:46:52 +00:00
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{
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h = lookup_hash (ins2, 0);
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get_operands (h->ops, ins2);
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State.ins_type = (leftright == LEFT_FIRST) ? INS_RIGHT : INS_LEFT;
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ins_type_counters[ (int)State.ins_type ]++;
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(h->ops->func)();
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}
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1996-08-02 00:23:31 +00:00
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}
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1996-09-15 03:46:52 +00:00
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1996-08-02 00:23:31 +00:00
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static void
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do_parallel (ins1, ins2)
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uint16 ins1, ins2;
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{
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struct hash_entry *h1, *h2;
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1996-09-04 17:42:51 +00:00
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
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#endif
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1996-08-02 00:23:31 +00:00
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h1 = lookup_hash (ins1, 0);
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h2 = lookup_hash (ins2, 0);
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1996-08-29 00:35:11 +00:00
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1996-08-02 00:23:31 +00:00
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if (h1->ops->exec_type == PARONLY)
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{
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1996-08-29 00:35:11 +00:00
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get_operands (h1->ops, ins1);
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1996-10-22 19:49:37 +00:00
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State.ins_type = INS_LEFT_COND_TEST;
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1996-09-04 17:42:51 +00:00
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-02 00:23:31 +00:00
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(h1->ops->func)();
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if (State.exe)
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1996-08-29 00:35:11 +00:00
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{
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1996-10-22 19:49:37 +00:00
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ins_type_counters[ (int)INS_COND_TRUE ]++;
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1996-08-29 00:35:11 +00:00
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get_operands (h2->ops, ins2);
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1996-10-22 19:49:37 +00:00
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State.ins_type = INS_RIGHT_COND_EXE;
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-29 00:35:11 +00:00
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(h2->ops->func)();
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}
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1996-10-22 19:49:37 +00:00
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else
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ins_type_counters[ (int)INS_COND_FALSE ]++;
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1996-08-02 00:23:31 +00:00
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}
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else if (h2->ops->exec_type == PARONLY)
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{
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1996-08-29 00:35:11 +00:00
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get_operands (h2->ops, ins2);
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1996-10-22 19:49:37 +00:00
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State.ins_type = INS_RIGHT_COND_TEST;
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1996-09-04 17:42:51 +00:00
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-02 00:23:31 +00:00
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(h2->ops->func)();
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if (State.exe)
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1996-08-29 00:35:11 +00:00
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{
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1996-10-22 19:49:37 +00:00
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ins_type_counters[ (int)INS_COND_TRUE ]++;
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1996-08-29 00:35:11 +00:00
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get_operands (h1->ops, ins1);
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1996-10-22 19:49:37 +00:00
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State.ins_type = INS_LEFT_COND_EXE;
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-29 00:35:11 +00:00
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(h1->ops->func)();
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}
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1996-10-22 19:49:37 +00:00
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else
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ins_type_counters[ (int)INS_COND_FALSE ]++;
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1996-08-02 00:23:31 +00:00
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}
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else
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{
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1996-08-29 00:35:11 +00:00
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get_operands (h1->ops, ins1);
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1996-09-04 15:41:43 +00:00
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State.ins_type = INS_LEFT_PARALLEL;
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1996-09-04 17:42:51 +00:00
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ins_type_counters[ (int)State.ins_type ]++;
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1996-08-02 00:23:31 +00:00
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(h1->ops->func)();
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1996-10-15 15:44:10 +00:00
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if (!State.exception)
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{
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get_operands (h2->ops, ins2);
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State.ins_type = INS_RIGHT_PARALLEL;
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ins_type_counters[ (int)State.ins_type ]++;
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(h2->ops->func)();
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}
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1996-08-02 00:23:31 +00:00
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}
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}
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1996-10-22 19:49:37 +00:00
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static char *
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add_commas(buf, sizeof_buf, value)
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char *buf;
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int sizeof_buf;
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unsigned long value;
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{
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int comma = 3;
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char *endbuf = buf + sizeof_buf - 1;
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*--endbuf = '\0';
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do {
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if (comma-- == 0)
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{
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*--endbuf = ',';
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comma = 2;
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}
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*--endbuf = (value % 10) + '0';
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} while ((value /= 10) != 0);
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return endbuf;
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}
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1996-08-02 00:23:31 +00:00
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void
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sim_size (power)
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int power;
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{
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if (State.imem)
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{
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free (State.imem);
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free (State.dmem);
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}
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State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
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State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
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if (!State.imem || !State.dmem )
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{
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1996-09-04 17:42:51 +00:00
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(*d10v_callback->printf_filtered) (d10v_callback, "Memory allocation failed.\n");
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1996-08-02 00:23:31 +00:00
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exit(1);
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}
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1996-09-04 17:42:51 +00:00
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1996-10-15 15:44:10 +00:00
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State.mem_min = 1<<IMEM_SIZE;
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State.mem_max = 0;
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1996-09-04 17:42:51 +00:00
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_MEMSIZE) != 0)
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{
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1996-10-22 19:49:37 +00:00
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char buffer[20];
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(*d10v_callback->printf_filtered) (d10v_callback,
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"Allocated %s bytes instruction memory and\n",
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add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
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(*d10v_callback->printf_filtered) (d10v_callback, " %s bytes data memory.\n",
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add_commas (buffer, sizeof (buffer), (1UL<<IMEM_SIZE)));
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1996-09-04 17:42:51 +00:00
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}
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1996-09-04 15:41:43 +00:00
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#endif
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1996-08-02 00:23:31 +00:00
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}
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static void
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init_system ()
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{
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if (!State.imem)
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sim_size(1);
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}
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int
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sim_write (addr, buffer, size)
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SIM_ADDR addr;
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unsigned char *buffer;
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int size;
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{
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init_system ();
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1996-10-15 15:44:10 +00:00
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#ifdef DEBUG
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if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
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(*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%x, min = 0x%x, max = 0x%x\n",
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size, addr, State.mem_min, State.mem_max);
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#endif
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if (State.mem_min > addr)
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State.mem_min = addr;
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if (State.mem_max < addr+size-1)
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State.mem_max = addr+size-1;
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|
|
|
|
memcpy (State.imem+addr, buffer, size);
|
1996-08-02 00:23:31 +00:00
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_open (args)
|
|
|
|
char *args;
|
|
|
|
{
|
|
|
|
struct simops *s;
|
1996-10-22 19:49:37 +00:00
|
|
|
struct hash_entry *h;
|
1996-09-04 18:50:13 +00:00
|
|
|
static int init_p = 0;
|
|
|
|
|
1996-08-02 00:23:31 +00:00
|
|
|
if (args != NULL)
|
1996-09-04 18:50:13 +00:00
|
|
|
{
|
|
|
|
#ifdef DEBUG
|
|
|
|
if (strcmp (args, "-t") == 0)
|
|
|
|
d10v_debug = DEBUG;
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",args);
|
|
|
|
}
|
1996-08-02 00:23:31 +00:00
|
|
|
|
|
|
|
/* put all the opcodes in the hash table */
|
1996-09-04 18:50:13 +00:00
|
|
|
if (!init_p++)
|
1996-08-02 00:23:31 +00:00
|
|
|
{
|
1996-09-04 18:50:13 +00:00
|
|
|
for (s = Simops; s->func; s++)
|
1996-08-02 00:23:31 +00:00
|
|
|
{
|
1996-09-04 18:50:13 +00:00
|
|
|
h = &hash_table[hash(s->opcode,s->format)];
|
|
|
|
|
|
|
|
/* go to the last entry in the chain */
|
|
|
|
while (h->next)
|
|
|
|
h = h->next;
|
|
|
|
|
|
|
|
if (h->ops)
|
|
|
|
{
|
|
|
|
h->next = calloc(1,sizeof(struct hash_entry));
|
|
|
|
h = h->next;
|
|
|
|
}
|
|
|
|
h->ops = s;
|
|
|
|
h->mask = s->mask;
|
|
|
|
h->opcode = s->opcode;
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_close (quitting)
|
|
|
|
int quitting;
|
|
|
|
{
|
|
|
|
/* nothing to do */
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_set_profile (n)
|
|
|
|
int n;
|
|
|
|
{
|
1996-09-04 17:42:51 +00:00
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_set_profile_size (n)
|
|
|
|
int n;
|
|
|
|
{
|
1996-09-04 17:42:51 +00:00
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_resume (step, siggnal)
|
|
|
|
int step, siggnal;
|
|
|
|
{
|
|
|
|
uint32 inst;
|
1996-10-22 19:49:37 +00:00
|
|
|
reg_t oldpc = 0;
|
1996-08-02 00:23:31 +00:00
|
|
|
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
|
1996-08-02 00:23:31 +00:00
|
|
|
|
1996-10-21 23:17:43 +00:00
|
|
|
State.exception = 0;
|
1996-10-22 19:49:37 +00:00
|
|
|
do
|
|
|
|
{
|
|
|
|
uint32 byte_pc = ((uint32)PC) << 2;
|
|
|
|
if ((byte_pc < State.mem_min) || (byte_pc > State.mem_max))
|
|
|
|
{
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
|
|
"PC (0x%lx) out of range, oldpc = 0x%lx, min = 0x%lx, max = 0x%lx\n",
|
|
|
|
(long)byte_pc, (long)oldpc, (long)State.mem_min, (long)State.mem_max);
|
|
|
|
State.exception = SIGILL;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
inst = RLW (byte_pc);
|
|
|
|
oldpc = PC;
|
|
|
|
ins_type_counters[ (int)INS_CYCLES ]++;
|
|
|
|
switch (inst & 0xC0000000)
|
|
|
|
{
|
|
|
|
case 0xC0000000:
|
|
|
|
/* long instruction */
|
|
|
|
do_long (inst & 0x3FFFFFFF);
|
|
|
|
break;
|
|
|
|
case 0x80000000:
|
|
|
|
/* R -> L */
|
|
|
|
do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, 0);
|
|
|
|
break;
|
|
|
|
case 0x40000000:
|
|
|
|
/* L -> R */
|
|
|
|
do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, 1);
|
|
|
|
break;
|
|
|
|
case 0:
|
|
|
|
do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
|
|
|
|
break;
|
|
|
|
}
|
1996-08-29 00:35:11 +00:00
|
|
|
|
1996-10-22 19:49:37 +00:00
|
|
|
if (State.RP && PC == RPT_E)
|
|
|
|
{
|
|
|
|
RPT_C -= 1;
|
|
|
|
if (RPT_C == 0)
|
|
|
|
State.RP = 0;
|
|
|
|
else
|
|
|
|
PC = RPT_S;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* FIXME */
|
|
|
|
if (PC == oldpc)
|
|
|
|
PC++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
while ( !State.exception && !step);
|
|
|
|
|
|
|
|
if (step && !State.exception)
|
|
|
|
State.exception = SIGTRAP;
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sim_trace ()
|
|
|
|
{
|
1996-09-04 17:42:51 +00:00
|
|
|
#ifdef DEBUG
|
|
|
|
d10v_debug = DEBUG;
|
|
|
|
#endif
|
|
|
|
sim_resume (0, 0);
|
|
|
|
return 1;
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_info (verbose)
|
|
|
|
int verbose;
|
|
|
|
{
|
1996-10-22 19:49:37 +00:00
|
|
|
char buf1[40];
|
|
|
|
char buf2[40];
|
|
|
|
char buf3[40];
|
|
|
|
char buf4[40];
|
|
|
|
char buf5[40];
|
|
|
|
unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
|
|
|
|
unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
|
|
|
|
unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
|
|
|
|
unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
|
|
|
|
unsigned long left_total = left + left_parallel + left_cond + left_nops;
|
|
|
|
|
|
|
|
unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
|
|
|
|
unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
|
|
|
|
unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
|
|
|
|
unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
|
|
|
|
unsigned long right_total = right + right_parallel + right_cond + right_nops;
|
|
|
|
|
|
|
|
unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
|
|
|
|
unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
|
|
|
|
unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
|
|
|
|
unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
|
|
|
|
unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
|
|
|
|
unsigned long total = (unknown + left_total + right_total + ins_long);
|
|
|
|
|
|
|
|
int size = strlen (add_commas (buf1, sizeof (buf1), total));
|
|
|
|
int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
|
|
|
|
(left_parallel > right_parallel) ? left_parallel : right_parallel));
|
|
|
|
int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
|
|
|
|
int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
|
|
|
|
int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
|
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
|
|
"executed %*s left instructions, %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), left_total),
|
|
|
|
normal_size, add_commas (buf2, sizeof (buf2), left),
|
|
|
|
parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
|
|
|
|
cond_size, add_commas (buf4, sizeof (buf4), left_cond),
|
|
|
|
nop_size, add_commas (buf5, sizeof (buf5), left_nops));
|
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
|
|
"executed %*s right instructions, %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), right_total),
|
|
|
|
normal_size, add_commas (buf2, sizeof (buf2), right),
|
|
|
|
parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
|
|
|
|
cond_size, add_commas (buf4, sizeof (buf4), right_cond),
|
|
|
|
nop_size, add_commas (buf5, sizeof (buf5), right_nops));
|
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
|
|
"executed %*s long instructions\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), ins_long));
|
1996-09-04 17:42:51 +00:00
|
|
|
|
1996-10-22 19:49:37 +00:00
|
|
|
if (unknown)
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
|
|
|
"executed %*s unknown instructions\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), unknown));
|
1996-09-04 17:42:51 +00:00
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
1996-10-22 19:49:37 +00:00
|
|
|
"executed %*s instructions conditionally\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), cond_true));
|
1996-09-04 17:42:51 +00:00
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
1996-10-22 19:49:37 +00:00
|
|
|
"skipped %*s instructions due to conditional failure\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), cond_false));
|
1996-09-04 17:42:51 +00:00
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
1996-10-22 19:49:37 +00:00
|
|
|
"executed %*s cycles\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), cycles));
|
1996-09-04 17:42:51 +00:00
|
|
|
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback,
|
1996-10-22 19:49:37 +00:00
|
|
|
"executed %*s total instructions\n",
|
|
|
|
size, add_commas (buf1, sizeof (buf1), total));
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_create_inferior (start_address, argv, env)
|
|
|
|
SIM_ADDR start_address;
|
|
|
|
char **argv;
|
|
|
|
char **env;
|
|
|
|
{
|
1996-10-15 15:44:10 +00:00
|
|
|
uint8 *imem, *dmem;
|
|
|
|
uint32 mem_min, mem_max;
|
1996-09-04 17:42:51 +00:00
|
|
|
#ifdef DEBUG
|
|
|
|
if (d10v_debug)
|
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%x\n", start_address);
|
|
|
|
#endif
|
1996-10-15 15:44:10 +00:00
|
|
|
/* save memory pointers */
|
|
|
|
imem = State.imem;
|
|
|
|
dmem = State.dmem;
|
|
|
|
mem_min = State.mem_min;
|
|
|
|
mem_max = State.mem_max;
|
|
|
|
/* reset all state information */
|
|
|
|
memset (&State, 0, sizeof(State));
|
|
|
|
/* restore memory pointers */
|
|
|
|
State.imem = imem;
|
|
|
|
State.dmem = dmem;
|
|
|
|
State.mem_min = mem_min;
|
|
|
|
State.mem_max = mem_max;
|
|
|
|
/* set PC */
|
1996-08-02 00:23:31 +00:00
|
|
|
PC = start_address >> 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_kill ()
|
|
|
|
{
|
|
|
|
/* nothing to do */
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_set_callbacks(p)
|
|
|
|
host_callback *p;
|
|
|
|
{
|
1996-09-04 15:41:43 +00:00
|
|
|
/* printf ("sim_set_callbacks\n"); */
|
|
|
|
d10v_callback = p;
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_stop_reason (reason, sigrc)
|
|
|
|
enum sim_stop *reason;
|
|
|
|
int *sigrc;
|
|
|
|
{
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
|
1996-08-29 00:35:11 +00:00
|
|
|
|
1996-09-18 13:23:31 +00:00
|
|
|
switch (State.exception)
|
1996-08-29 00:35:11 +00:00
|
|
|
{
|
1996-09-18 13:23:31 +00:00
|
|
|
case SIG_D10V_STOP: /* stop instruction */
|
1996-08-29 00:35:11 +00:00
|
|
|
*reason = sim_exited;
|
1996-09-18 13:23:31 +00:00
|
|
|
*sigrc = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIG_D10V_EXIT: /* exit trap */
|
|
|
|
*reason = sim_exited;
|
|
|
|
*sigrc = State.regs[2];
|
|
|
|
break;
|
|
|
|
|
|
|
|
default: /* some signal */
|
1996-08-29 00:35:11 +00:00
|
|
|
*reason = sim_stopped;
|
|
|
|
*sigrc = State.exception;
|
1996-09-18 13:23:31 +00:00
|
|
|
break;
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_fetch_register (rn, memory)
|
|
|
|
int rn;
|
|
|
|
unsigned char *memory;
|
|
|
|
{
|
|
|
|
if (rn > 31)
|
|
|
|
{
|
|
|
|
WRITE_64 (memory, State.a[rn-32]);
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_fetch_register %d 0x%llx\n",rn,State.a[rn-32]); */
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
WRITE_16 (memory, State.regs[rn]);
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_store_register (rn, memory)
|
|
|
|
int rn;
|
|
|
|
unsigned char *memory;
|
|
|
|
{
|
|
|
|
if (rn > 31)
|
|
|
|
{
|
|
|
|
State.a[rn-32] = READ_64 (memory) & MASK40;
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "store: a%d=0x%llx\n",rn-32,State.a[rn-32]); */
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
State.regs[rn]= READ_16 (memory);
|
1996-09-04 17:42:51 +00:00
|
|
|
/* (*d10v_callback->printf_filtered) (d10v_callback, "store: r%d=0x%x\n",rn,State.regs[rn]); */
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
1996-08-02 00:23:31 +00:00
|
|
|
}
|
1996-08-29 00:35:11 +00:00
|
|
|
|
1996-10-22 19:49:37 +00:00
|
|
|
int
|
1996-08-29 00:35:11 +00:00
|
|
|
sim_read (addr, buffer, size)
|
|
|
|
SIM_ADDR addr;
|
|
|
|
unsigned char *buffer;
|
|
|
|
int size;
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < size; i++)
|
|
|
|
{
|
|
|
|
buffer[i] = State.imem[addr + i];
|
|
|
|
}
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_do_command (cmd)
|
|
|
|
char *cmd;
|
|
|
|
{
|
1996-09-04 17:42:51 +00:00
|
|
|
(*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
|
1996-08-29 00:35:11 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sim_load (prog, from_tty)
|
|
|
|
char *prog;
|
|
|
|
int from_tty;
|
|
|
|
{
|
|
|
|
/* Return nonzero so GDB will handle it. */
|
|
|
|
return 1;
|
|
|
|
}
|