95 lines
2.1 KiB
C
95 lines
2.1 KiB
C
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/* Main header for the m32r. */
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#define USING_SIM_BASE_H /* FIXME: quick hack */
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struct _sim_cpu; /* FIXME: should be in sim-basics.h */
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typedef struct _sim_cpu SIM_CPU;
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/* sim-basics.h includes config.h but cgen-types.h must be included before
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sim-basics.h and cgen-types.h needs config.h. */
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#include "config.h"
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#include "ansidecl.h"
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#include "symcat.h"
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#include "cgen-types.h"
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#include "arch.h"
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#include "sim-basics.h"
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/* These must be defined before sim-base.h. */
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typedef USI sim_cia;
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#define CIA_GET(cpu) (cpu)->regs.h_pc
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#define CIA_SET(cpu,val) (cpu)->regs.h_pc = (val)
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#define TRAP_SYSCALL 0
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#include "sim-base.h"
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#include "cpu-sim.h"
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#ifdef WANT_CPU_M32R
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#include "cpu.h"
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#include "decode.h"
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#endif
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#include "cpuall.h"
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/* match with definition in gx-translate.c! */
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typedef struct tgx_cpu_regs
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{
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unsigned int h_pc; /* program counter */
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signed int h_gr[16]; /* general registers */
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unsigned int h_cr[16]; /* control registers */
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long long h_accum; /* accumulator */
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unsigned h_lock; /* lock */
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} tgx_cpu_regs;
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/* match with definition in gx-translate.c! */
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typedef struct tgx_syscall_data
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{
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unsigned pc;
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unsigned func;
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unsigned arg1;
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unsigned arg2;
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unsigned arg3;
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unsigned errcode;
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unsigned result;
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unsigned result2;
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} tgx_syscall_data;
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/* match with definition in gx-translate.c! */
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typedef struct tgx_callbacks
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{
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unsigned (*load)(unsigned pc, unsigned addr);
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void (*store)(unsigned pc, unsigned addr, unsigned data);
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signed char (*load1)(unsigned pc, unsigned addr);
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void (*store1)(unsigned pc, unsigned addr, signed char data);
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signed short (*load2)(unsigned pc, unsigned addr);
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void (*store2)(unsigned pc, unsigned addr, signed short data);
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void (*syscall)(tgx_syscall_data* data);
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} tgx_callbacks;
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struct _sim_cpu
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{
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sim_cpu_base base;
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tgx_cpu_regs regs;
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};
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struct sim_state {
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sim_cpu *cpu;
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#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
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sim_state_base base;
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};
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/* Default memory size. */
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#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
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/* Register access fns. These look up the current mach and call the
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appropriate handler. */
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SI h_gr_get (SIM_CPU *, UINT);
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void h_gr_set (SIM_CPU *, UINT, SI);
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