2009-11-24 19:22:45 +00:00
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/* cpu.h --- declarations for the RX core.
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2013-01-01 06:41:43 +00:00
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Copyright (C) 2005-2013 Free Software Foundation, Inc.
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2009-11-24 19:22:45 +00:00
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include <stdint.h>
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#include <setjmp.h>
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extern int verbose;
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extern int trace;
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extern int enable_counting;
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typedef uint8_t QI;
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typedef uint16_t HI;
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typedef uint32_t SI;
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typedef uint64_t DI;
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extern int rx_in_gdb;
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extern int rx_big_endian;
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typedef struct
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{
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SI r[16];
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SI r_psw;
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SI r_pc;
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SI r_usp;
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SI r_fpsw;
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SI r__reserved_cr_4;
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SI r__reserved_cr_5;
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SI r__reserved_cr_6;
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SI r__reserved_cr_7;
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SI r_bpsw;
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SI r_bpc;
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SI r_isp;
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SI r_fintv;
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SI r_intb;
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SI r__reserved_cr_13;
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SI r__reserved_cr_14;
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SI r__reserved_cr_15;
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SI r__reserved_cr_16;
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SI r__reserved_cr_17;
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SI r__reserved_cr_18;
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SI r__reserved_cr_19;
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SI r__reserved_cr_20;
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SI r__reserved_cr_21;
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SI r__reserved_cr_22;
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SI r__reserved_cr_23;
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SI r__reserved_cr_24;
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SI r__reserved_cr_25;
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SI r__reserved_cr_26;
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SI r__reserved_cr_27;
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SI r__reserved_cr_28;
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SI r__reserved_cr_29;
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SI r__reserved_cr_30;
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SI r__reserved_cr_31;
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SI r_temp;
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DI r_acc;
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2010-07-28 21:58:22 +00:00
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#ifdef CYCLE_ACCURATE
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/* If set, RTS/RTSD take 2 fewer cycles. */
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char fast_return;
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SI link_register;
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unsigned long long cycle_count;
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/* Bits saying what kind of memory operands the previous insn had. */
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int m2m;
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/* Target register for load. */
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int rt;
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#endif
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2009-11-24 19:22:45 +00:00
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} regs_type;
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2010-07-28 21:58:22 +00:00
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#define M2M_SRC 0x01
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#define M2M_DST 0x02
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#define M2M_BOTH 0x03
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2009-11-24 19:22:45 +00:00
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#define sp 0
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#define psw 16
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#define pc 17
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#define usp 18
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#define fpsw 19
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#define bpsw 24
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#define bpc 25
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#define isp 26
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#define fintv 27
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#define intb 28
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#define r_temp_idx 48
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#define acc64 49
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#define acchi 50
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#define accmi 51
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#define acclo 52
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extern regs_type regs;
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#define FLAGBIT_C 0x00000001
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#define FLAGBIT_Z 0x00000002
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#define FLAGBIT_S 0x00000004
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#define FLAGBIT_O 0x00000008
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#define FLAGBIT_I 0x00010000
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#define FLAGBIT_U 0x00020000
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#define FLAGBIT_PM 0x00100000
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#define FLAGBITS_IPL 0x0f000000
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#define FLAGSHIFT_IPL 24
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#define FPSWBITS_RM 0x00000003
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#define FPSWBITS_CV 0x00000004 /* invalid operation */
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#define FPSWBITS_CO 0x00000008 /* overflow */
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#define FPSWBITS_CZ 0x00000010 /* divide-by-zero */
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#define FPSWBITS_CU 0x00000020 /* underflow */
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#define FPSWBITS_CX 0x00000040 /* inexact */
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#define FPSWBITS_CE 0x00000080 /* unimplemented processing */
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#define FPSWBITS_CMASK 0x000000fc /* all the above */
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#define FPSWBITS_DN 0x00000100
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#define FPSW_CESH 8
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#define FPSWBITS_EV 0x00000400
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#define FPSWBITS_EO 0x00000800
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#define FPSWBITS_EZ 0x00001000
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#define FPSWBITS_EU 0x00002000
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#define FPSWBITS_EX 0x00004000
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#define FPSW_EFSH 16
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#define FPSW_CFSH 24
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#define FPSWBITS_FV 0x04000000
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#define FPSWBITS_FO 0x08000000
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#define FPSWBITS_FZ 0x10000000
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#define FPSWBITS_FU 0x20000000
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#define FPSWBITS_FX 0x40000000
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#define FPSWBITS_FSUM 0x80000000
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#define FPSWBITS_FMASK 0x7c000000
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#define FPSWBITS_CLEAR 0xffffff03 /* masked at start of any FP opcode */
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#define FPRM_NEAREST 0
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#define FPRM_ZERO 1
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#define FPRM_PINF 2
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#define FPRM_NINF 3
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extern char *reg_names[];
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extern int rx_flagmask;
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extern int rx_flagand;
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extern int rx_flagor;
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extern unsigned int b2mask[];
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extern unsigned int b2signbit[];
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extern int b2maxsigned[];
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extern int b2minsigned[];
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void init_regs (void);
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void stack_heap_stats (void);
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void set_pointer_width (int bytes);
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unsigned int get_reg (int id);
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unsigned long long get_reg64 (int id);
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void put_reg (int id, unsigned int value);
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void put_reg64 (int id, unsigned long long value);
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void set_flags (int mask, int newbits);
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void set_oszc (long long value, int bytes, int c);
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void set_szc (long long value, int bytes, int c);
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void set_osz (long long value, int bytes);
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void set_sz (long long value, int bytes);
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void set_zc (int z, int c);
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void set_c (int c);
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const char *bits (int v, int b);
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int condition_true (int cond_id);
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#define FLAG(f) ((regs.r_psw & f) ? 1 : 0)
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#define FLAG_C FLAG(FLAGBIT_C)
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#define FLAG_D FLAG(FLAGBIT_D)
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#define FLAG_Z FLAG(FLAGBIT_Z)
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#define FLAG_S FLAG(FLAGBIT_S)
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#define FLAG_B FLAG(FLAGBIT_B)
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#define FLAG_O FLAG(FLAGBIT_O)
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#define FLAG_I FLAG(FLAGBIT_I)
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#define FLAG_U FLAG(FLAGBIT_U)
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#define FLAG_PM FLAG(FLAGBIT_PM)
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/* Instruction step return codes.
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Suppose one of the decode_* functions below returns a value R:
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- If RX_STEPPED (R), then the single-step completed normally.
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- If RX_HIT_BREAK (R), then the program hit a breakpoint.
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- If RX_EXITED (R), then the program has done an 'exit' system
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call, and the exit code is RX_EXIT_STATUS (R).
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- If RX_STOPPED (R), then a signal (number RX_STOP_SIG (R)) was
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generated.
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For building step return codes:
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- RX_MAKE_STEPPED is the return code for finishing a normal step.
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- RX_MAKE_HIT_BREAK is the return code for hitting a breakpoint.
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- RX_MAKE_EXITED (C) is the return code for exiting with status C.
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- RX_MAKE_STOPPED (S) is the return code for stopping on signal S. */
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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#define RX_MAKE_STEPPED() (1)
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#define RX_MAKE_HIT_BREAK() (2)
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#define RX_MAKE_EXITED(c) (((int) (c) << 8) + 3)
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#define RX_MAKE_STOPPED(s) (((int) (s) << 8) + 4)
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2009-11-24 19:22:45 +00:00
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#define RX_STEPPED(r) ((r) == RX_MAKE_STEPPED ())
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#define RX_HIT_BREAK(r) ((r) == RX_MAKE_HIT_BREAK ())
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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#define RX_EXITED(r) (((r) & 0xff) == 3)
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2009-11-24 19:22:45 +00:00
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#define RX_EXIT_STATUS(r) ((r) >> 8)
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[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
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#define RX_STOPPED(r) (((r) & 0xff) == 4)
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2009-11-24 19:22:45 +00:00
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#define RX_STOP_SIG(r) ((r) >> 8)
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/* The step result for the current step. Global to allow
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communication between the stepping function and the system
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calls. */
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extern int step_result;
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extern unsigned int rx_cycles;
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/* Used to detect heap/stack collisions. */
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extern unsigned int heaptop;
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extern unsigned int heapbottom;
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extern int decode_opcode (void);
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2010-09-23 23:42:53 +00:00
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extern void reset_decoder (void);
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2010-07-28 21:58:22 +00:00
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extern void reset_pipeline_stats (void);
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extern void halt_pipeline_stats (void);
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extern void pipeline_stats (void);
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2009-11-24 19:22:45 +00:00
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extern void trace_register_changes ();
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extern void generate_access_exception (void);
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extern jmp_buf decode_jmp_buf;
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