old-cross-binutils/bfd/elf32-avr.c

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2000-03-27 08:39:14 +00:00
/* AVR-specific support for 32-bit ELF
Copyright (C) 1999-2015 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
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This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
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#include "sysdep.h"
#include "bfd.h"
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#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/avr.h"
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#include "elf32-avr.h"
#include "bfd_stdint.h"
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/* Enable debugging printout at stdout with this variable. */
static bfd_boolean debug_relax = FALSE;
/* Enable debugging printout at stdout with this variable. */
static bfd_boolean debug_stubs = FALSE;
static bfd_reloc_status_type
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
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bfd_elf_avr_diff_reloc (bfd *, arelent *, asymbol *, void *,
asection *, bfd *, char **);
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/* Hash table initialization and handling. Code is taken from the hppa port
and adapted to the needs of AVR. */
/* We use two hash tables to hold information for linking avr objects.
* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
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The first is the elf32_avr_link_hash_table which is derived from the
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stanard ELF linker hash table. We use this as a place to attach the other
hash table and some static information.
The second is the stub hash table which is derived from the base BFD
hash table. The stub hash table holds the information on the linker
stubs. */
struct elf32_avr_stub_hash_entry
{
/* Base hash table entry structure. */
struct bfd_hash_entry bh_root;
/* Offset within stub_sec of the beginning of this stub. */
bfd_vma stub_offset;
/* Given the symbol's value and its section we can determine its final
value when building the stubs (so the stub knows where to jump). */
bfd_vma target_value;
/* This way we could mark stubs to be no longer necessary. */
bfd_boolean is_actually_needed;
};
struct elf32_avr_link_hash_table
{
/* The main hash table. */
struct elf_link_hash_table etab;
/* The stub hash table. */
struct bfd_hash_table bstab;
bfd_boolean no_stubs;
/* Linker stub bfd. */
bfd *stub_bfd;
/* The stub section. */
asection *stub_sec;
/* Usually 0, unless we are generating code for a bootloader. Will
be initialized by elf32_avr_size_stubs to the vma offset of the
output section associated with the stub section. */
bfd_vma vector_base;
/* Assorted information used by elf32_avr_size_stubs. */
unsigned int bfd_count;
int top_index;
asection ** input_list;
Elf_Internal_Sym ** all_local_syms;
/* Tables for mapping vma beyond the 128k boundary to the address of the
corresponding stub. (AMT)
"amt_max_entry_cnt" reflects the number of entries that memory is allocated
for in the "amt_stub_offsets" and "amt_destination_addr" arrays.
"amt_entry_cnt" informs how many of these entries actually contain
useful data. */
unsigned int amt_entry_cnt;
unsigned int amt_max_entry_cnt;
bfd_vma * amt_stub_offsets;
bfd_vma * amt_destination_addr;
};
/* Various hash macros and functions. */
#define avr_link_hash_table(p) \
/* PR 3874: Check that we have an AVR style hash table before using it. */\
* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
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(elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
== AVR_ELF_DATA ? ((struct elf32_avr_link_hash_table *) ((p)->hash)) : NULL)
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#define avr_stub_hash_entry(ent) \
((struct elf32_avr_stub_hash_entry *)(ent))
#define avr_stub_hash_lookup(table, string, create, copy) \
((struct elf32_avr_stub_hash_entry *) \
bfd_hash_lookup ((table), (string), (create), (copy)))
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static reloc_howto_type elf_avr_howto_table[] =
{
HOWTO (R_AVR_NONE, /* type */
0, /* rightshift */
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
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3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
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0, /* bitpos */
Fallout from recent bfd_reloc_outofrange changes Commit ec93045b and cd21f5da introduced a large number of tic4x and tic54x regressions, due to the new checks being wrong for targets with octets_per_byte != 1. To fix that I introduced a new bfd_get_section_limit_octets and performed the check on octets rather than byte adresses, reducing the number of bfd_octets_per_byte calls. bfd_octets_per_byte is rather expensive.. I then wondered why the same bfd_reloc_outofrange check added to bfd_perform_relocation wasn't also added to bfd_install_relocation. The two functions are virtually identical and ought to remain that way. However, adding the same check to bfd_install_relocation resulted in ld-elf "FAIL Link eh-group.o to eh-group" on many ELF targets, including x64_64-linux. The reason being that eh-group.o has NONE relocs at the end of a section, and most targets give NONE relocs a non-zero size. So if we are to keep the new outofrange check it appears that NONE relocs must have a zero size. * bfd-in.h (bfd_get_section_limit_octets): New define, extracted from.. (bfd_get_section_limit): ..here. * reloc.c (bfd_perform_relocation): Correct bfd_reloc_outofrange check. (bfd_install_relocation, _bfd_final_link_relocate): Add same check here. * elf32-sh.c (sh_elf_reloc): Correct bfd_reloc_outofrange check. * elf32-ppc.c (ppc_elf_addr16_ha_reloc): Remove duplicated bfd_reloc_outofrange check. * bfd-in2.h: Regenerate. * cpu-ns32k.c (_bfd_do_ns32k_reloc_contents): Return bfd_reloc_ok on zero size relocs. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf32-nds32.c (nds32_relocate_contents): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. * reloc.c (_bfd_relocate_contents): Don't bomb on zero size relocs. (_bfd_clear_contents): Likewise. * elfxx-mips.c (mips_elf_obtain_contents): Likewise. (mips_elf_perform_relocation): Likewise. * aoutx.h (aout_link_reloc_link_order): Allow for NULL return from malloc on zero size alloc. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (aout_link_reloc_link_order): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * aoutx.h (howto_table_ext): Ensure NONE relocs have size 3, bitsize 0, and complain_overflow_dont. * coff-sparc.c (coff_sparc_howto_table): Likewise. * elf-hppa.h (elf_hppa_howto_table): Likewise. * elf-m10200.c (elf_mn10200_howto_table): Likewise. * elf-m10300.c (elf_mn10300_howto_table): Likewise. * elf32-arc.c (elf_arc_howto_table): Likewise. * elf32-arm.c (elf32_arm_howto_table_1): Likewise. * elf32-avr.c (elf_avr_howto_table): Likewise. * elf32-bfin.c (bfin_howto_table): Likewise. * elf32-cr16.c (cr16_elf_howto_table): Likewise. * elf32-cris.c (cris_elf_howto_table): Likewise. * elf32-crx.c (crx_elf_howto_table): Likewise. * elf32-d10v.c (elf_d10v_howto_table): Likewise. * elf32-d30v.c (elf_d30v_howto_table): Likewise. * elf32-dlx.c (dlx_elf_howto_table): Likewise. * elf32-epiphany.c (epiphany_elf_howto_table): Likewise. * elf32-fr30.c (fr30_elf_howto_table): Likewise. * elf32-frv.c (elf32_frv_howto_table): Likewise. * elf32-h8300.c (h8_elf_howto_table): Likewise. * elf32-i370.c (i370_elf_howto_raw): Likewise. * elf32-i386.c (elf_howto_table): Likewise. * elf32-i860.c (elf32_i860_howto_table): Likewise. * elf32-i960.c (elf32_i960_relocate): Likewise. * elf32-ip2k.c (ip2k_elf_howto_table): Likewise. * elf32-iq2000.c (iq2000_elf_howto_table): Likewise. * elf32-lm32.c (lm32_elf_howto_table): Likewise. * elf32-m32c.c (m32c_elf_howto_table): Likewise. * elf32-m32r.c (m32r_elf_howto_table): Likewise. * elf32-m68hc11.c (elf_m68hc11_howto_table): Likewise. * elf32-m68hc12.c (elf_m68hc11_howto_table): Likewise. * elf32-m68k.c (howto_table): Likewise. * elf32-mcore.c (mcore_elf_howto_raw): Likewise. * elf32-mep.c (mep_elf_howto_table): Likewise. * elf32-metag.c (elf_metag_howto_table): Likewise. * elf32-microblaze.c (microblaze_elf_howto_raw): Likewise. * elf32-mips.c (elf_mips_howto_table_rel): Likewise. * elf32-moxie.c (moxie_elf_howto_table): Likewise. * elf32-msp430.c (elf_msp430_howto_table): Likewise. * elf32-mt.c (mt_elf_howto_table): Likewise. * elf32-nds32.c (nds32_elf_howto_table): Likewise. * elf32-nios2.c (elf_nios2_howto_table_rel): Likewise. * elf32-or1k.c (or1k_elf_howto_table): Likewise. * elf32-pj.c (pj_elf_howto_table): Likewise. * elf32-ppc.c (ppc_elf_howto_raw): Likewise. * elf32-rl78.c (rl78_elf_howto_table): Likewise. * elf32-rx.c (rx_elf_howto_table): Likewise. * elf32-s390.c (elf_howto_table): Likewise. * elf32-score.c (elf32_score_howto_table): Likewise. * elf32-score7.c (elf32_score_howto_table): Likewise. * elf32-sh-relocs.h (R_SH_NONE): Likewise. * elf32-spu.c (elf_howto_table): Likewise. * elf32-tic6x.c (elf32_tic6x_howto_table): Likewise. * elf32-tilepro.c (tilepro_elf_howto_table): Likewise. * elf32-v850.c (v850_elf_howto_table): Likewise. * elf32-vax.c (howto_table): Likewise. * elf32-visium.c (visium_elf_howto_table): Likewise. * elf32-xc16x.c (xc16x_elf_howto_table): Likewise. * elf32-xgate.c (elf_xgate_howto_table): Likewise. * elf32-xstormy16.c (xstormy16_elf_howto_table): Likewise. * elf32-xtensa.c (elf_howto_table): Likewise. * elf64-alpha.c (elf64_alpha_howto_table): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Likewise. * elf64-mmix.c (elf_mmix_howto_table): Likewise. * elf64-ppc.c (ppc64_elf_howto_raw): Likewise. * elf64-s390.c (elf_howto_table): Likewise. * elf64-sh64.c (sh_elf64_howto_table): Likewise. * elf64-x86-64.c (x86_64_elf_howto_table): Likewise. * elfn32-mips.c (elf_mips_howto_table_rel): Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. (elfNN_aarch64_howto_none): Likewise. * elfxx-ia64.c (ia64_howto_table): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_howto_table): Likewise. * elfxx-tilegx.c (tilegx_elf_howto_table): Likewise. * nlm32-sparc.c (nlm32_sparc_howto_table): Likewise.
2015-01-19 00:06:26 +00:00
complain_overflow_dont, /* complain_on_overflow */
2000-03-27 08:39:14 +00:00
bfd_elf_generic_reloc, /* special_function */
"R_AVR_NONE", /* name */
FALSE, /* partial_inplace */
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0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_32", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A 7 bit PC relative relocation. */
HOWTO (R_AVR_7_PCREL, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
7, /* bitsize */
TRUE, /* pc_relative */
2000-03-27 08:39:14 +00:00
3, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_7_PCREL", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
TRUE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A 13 bit PC relative relocation. */
HOWTO (R_AVR_13_PCREL, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
13, /* bitsize */
TRUE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_13_PCREL", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xfff, /* src_mask */
0xfff, /* dst_mask */
TRUE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A 16 bit absolute relocation. */
HOWTO (R_AVR_16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_16", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
2006-05-24 07:36:12 +00:00
/* A 16 bit absolute relocation for command address
Will be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_16_PM, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_16_PM", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A low 8 bit absolute relocation of 16 bit address.
For LDI command. */
HOWTO (R_AVR_LO8_LDI, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LO8_LDI", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A high 8 bit absolute relocation of 16 bit address.
For LDI command. */
HOWTO (R_AVR_HI8_LDI, /* type */
8, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HI8_LDI", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A high 6 bit absolute relocation of 22 bit address.
2006-03-03 15:54:23 +00:00
For LDI command. As well second most significant 8 bit value of
a 32 bit link-time constant. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_HH8_LDI, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HH8_LDI", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A negative low 8 bit absolute relocation of 16 bit address.
For LDI command. */
HOWTO (R_AVR_LO8_LDI_NEG, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LO8_LDI_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A negative high 8 bit absolute relocation of 16 bit address.
2000-03-27 08:39:14 +00:00
For LDI command. */
HOWTO (R_AVR_HI8_LDI_NEG, /* type */
8, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HI8_LDI_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A negative high 6 bit absolute relocation of 22 bit address.
2000-03-27 08:39:14 +00:00
For LDI command. */
HOWTO (R_AVR_HH8_LDI_NEG, /* type */
16, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HH8_LDI_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
2006-05-24 07:36:12 +00:00
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_LO8_LDI_PM, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LO8_LDI_PM", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2006-05-24 07:36:12 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_HI8_LDI_PM, /* type */
9, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HI8_LDI_PM", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2006-05-24 07:36:12 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_HH8_LDI_PM, /* type */
17, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HH8_LDI_PM", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2006-05-24 07:36:12 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_LO8_LDI_PM_NEG, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LO8_LDI_PM_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2006-05-24 07:36:12 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_HI8_LDI_PM_NEG, /* type */
9, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HI8_LDI_PM_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2006-05-24 07:36:12 +00:00
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will not be changed when linker stubs are needed. */
2000-03-27 08:39:14 +00:00
HOWTO (R_AVR_HH8_LDI_PM_NEG, /* type */
17, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HH8_LDI_PM_NEG", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
2000-03-27 08:39:14 +00:00
/* Relocation for CALL command in ATmega. */
HOWTO (R_AVR_CALL, /* type */
1, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
23, /* bitsize */
FALSE, /* pc_relative */
2000-03-27 08:39:14 +00:00
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
2000-03-27 08:39:14 +00:00
bfd_elf_generic_reloc, /* special_function */
"R_AVR_CALL", /* name */
FALSE, /* partial_inplace */
2000-03-27 08:39:14 +00:00
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 16 bit absolute relocation of 16 bit address.
For LDI command. */
HOWTO (R_AVR_LDI, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LDI", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 6 bit absolute relocation of 6 bit offset.
For ldd/sdd command. */
HOWTO (R_AVR_6, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
6, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_6", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A 6 bit absolute relocation of 6 bit offset.
For sbiw/adiw command. */
HOWTO (R_AVR_6_ADIW, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
6, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_6_ADIW", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Most significant 8 bit value of a 32 bit link-time constant. */
HOWTO (R_AVR_MS8_LDI, /* type */
24, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_MS8_LDI", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Negative most significant 8 bit value of a 32 bit link-time constant. */
HOWTO (R_AVR_MS8_LDI_NEG, /* type */
24, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_MS8_LDI_NEG", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
2006-05-24 07:36:12 +00:00
FALSE), /* pcrel_offset */
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will be changed when linker stubs are needed. */
2006-05-24 07:36:12 +00:00
HOWTO (R_AVR_LO8_LDI_GS, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LO8_LDI_GS", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* A low 8 bit absolute relocation of 24 bit program memory address.
For LDI command. Will be changed when linker stubs are needed. */
2006-05-24 07:36:12 +00:00
HOWTO (R_AVR_HI8_LDI_GS, /* type */
9, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_HI8_LDI_GS", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* 8 bit offset. */
HOWTO (R_AVR_8, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_8", /* name */
FALSE, /* partial_inplace */
0x000000ff, /* src_mask */
0x000000ff, /* dst_mask */
FALSE), /* pcrel_offset */
/* lo8-part to use in .byte lo8(sym). */
HOWTO (R_AVR_8_LO8, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_8_LO8", /* name */
FALSE, /* partial_inplace */
0xffffff, /* src_mask */
0xffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* hi8-part to use in .byte hi8(sym). */
HOWTO (R_AVR_8_HI8, /* type */
8, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_8_HI8", /* name */
FALSE, /* partial_inplace */
0xffffff, /* src_mask */
0xffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* hlo8-part to use in .byte hlo8(sym). */
HOWTO (R_AVR_8_HLO8, /* type */
16, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_8_HLO8", /* name */
FALSE, /* partial_inplace */
0xffffff, /* src_mask */
0xffffff, /* dst_mask */
FALSE), /* pcrel_offset */
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
HOWTO (R_AVR_DIFF8, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
8, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_avr_diff_reloc, /* special_function */
"R_AVR_DIFF8", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0xff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_AVR_DIFF16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_avr_diff_reloc,/* special_function */
"R_AVR_DIFF16", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_AVR_DIFF32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_avr_diff_reloc,/* special_function */
"R_AVR_DIFF32", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
/* 7 bit immediate for LDS/STS in Tiny core. */
HOWTO (R_AVR_LDS_STS_16, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
7, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_LDS_STS_16", /* name */
FALSE, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_AVR_PORT6, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
6, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_PORT6", /* name */
FALSE, /* partial_inplace */
0xffffff, /* src_mask */
0xffffff, /* dst_mask */
FALSE), /* pcrel_offset */
HOWTO (R_AVR_PORT5, /* type */
0, /* rightshift */
0, /* size (0 = byte, 1 = short, 2 = long) */
5, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_AVR_PORT5", /* name */
FALSE, /* partial_inplace */
0xffffff, /* src_mask */
0xffffff, /* dst_mask */
FALSE) /* pcrel_offset */
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};
/* Map BFD reloc types to AVR ELF reloc types. */
struct avr_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned int elf_reloc_val;
};
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static const struct avr_reloc_map avr_reloc_map[] =
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{
{ BFD_RELOC_NONE, R_AVR_NONE },
{ BFD_RELOC_32, R_AVR_32 },
{ BFD_RELOC_AVR_7_PCREL, R_AVR_7_PCREL },
{ BFD_RELOC_AVR_13_PCREL, R_AVR_13_PCREL },
{ BFD_RELOC_16, R_AVR_16 },
{ BFD_RELOC_AVR_16_PM, R_AVR_16_PM },
{ BFD_RELOC_AVR_LO8_LDI, R_AVR_LO8_LDI},
{ BFD_RELOC_AVR_HI8_LDI, R_AVR_HI8_LDI },
{ BFD_RELOC_AVR_HH8_LDI, R_AVR_HH8_LDI },
{ BFD_RELOC_AVR_MS8_LDI, R_AVR_MS8_LDI },
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{ BFD_RELOC_AVR_LO8_LDI_NEG, R_AVR_LO8_LDI_NEG },
{ BFD_RELOC_AVR_HI8_LDI_NEG, R_AVR_HI8_LDI_NEG },
{ BFD_RELOC_AVR_HH8_LDI_NEG, R_AVR_HH8_LDI_NEG },
{ BFD_RELOC_AVR_MS8_LDI_NEG, R_AVR_MS8_LDI_NEG },
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{ BFD_RELOC_AVR_LO8_LDI_PM, R_AVR_LO8_LDI_PM },
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{ BFD_RELOC_AVR_LO8_LDI_GS, R_AVR_LO8_LDI_GS },
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{ BFD_RELOC_AVR_HI8_LDI_PM, R_AVR_HI8_LDI_PM },
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{ BFD_RELOC_AVR_HI8_LDI_GS, R_AVR_HI8_LDI_GS },
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{ BFD_RELOC_AVR_HH8_LDI_PM, R_AVR_HH8_LDI_PM },
{ BFD_RELOC_AVR_LO8_LDI_PM_NEG, R_AVR_LO8_LDI_PM_NEG },
{ BFD_RELOC_AVR_HI8_LDI_PM_NEG, R_AVR_HI8_LDI_PM_NEG },
{ BFD_RELOC_AVR_HH8_LDI_PM_NEG, R_AVR_HH8_LDI_PM_NEG },
{ BFD_RELOC_AVR_CALL, R_AVR_CALL },
{ BFD_RELOC_AVR_LDI, R_AVR_LDI },
{ BFD_RELOC_AVR_6, R_AVR_6 },
{ BFD_RELOC_AVR_6_ADIW, R_AVR_6_ADIW },
{ BFD_RELOC_8, R_AVR_8 },
{ BFD_RELOC_AVR_8_LO, R_AVR_8_LO8 },
{ BFD_RELOC_AVR_8_HI, R_AVR_8_HI8 },
{ BFD_RELOC_AVR_8_HLO, R_AVR_8_HLO8 },
{ BFD_RELOC_AVR_DIFF8, R_AVR_DIFF8 },
{ BFD_RELOC_AVR_DIFF16, R_AVR_DIFF16 },
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
{ BFD_RELOC_AVR_DIFF32, R_AVR_DIFF32 },
{ BFD_RELOC_AVR_LDS_STS_16, R_AVR_LDS_STS_16},
{ BFD_RELOC_AVR_PORT6, R_AVR_PORT6},
{ BFD_RELOC_AVR_PORT5, R_AVR_PORT5}
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};
/* Meant to be filled one day with the wrap around address for the
2006-03-03 15:54:23 +00:00
specific device. I.e. should get the value 0x4000 for 16k devices,
0x8000 for 32k devices and so on.
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We initialize it here with a value of 0x1000000 resulting in
2006-03-03 15:54:23 +00:00
that we will never suggest a wrap-around jump during relaxation.
The logic of the source code later on assumes that in
avr_pc_wrap_around one single bit is set. */
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static bfd_vma avr_pc_wrap_around = 0x10000000;
/* If this variable holds a value different from zero, the linker relaxation
machine will try to optimize call/ret sequences by a single jump
instruction. This option could be switched off by a linker switch. */
static int avr_replace_call_ret_sequences = 1;
/* Per-section relaxation related information for avr. */
struct avr_relax_info
{
/* Track the avr property records that apply to this section. */
struct
{
/* Number of records in the list. */
unsigned count;
/* How many records worth of space have we allocated. */
unsigned allocated;
/* The records, only COUNT records are initialised. */
struct avr_property_record *items;
} records;
};
/* Per section data, specialised for avr. */
struct elf_avr_section_data
{
/* The standard data must appear first. */
struct bfd_elf_section_data elf;
/* Relaxation related information. */
struct avr_relax_info relax_info;
};
/* Possibly initialise avr specific data for new section SEC from ABFD. */
static bfd_boolean
elf_avr_new_section_hook (bfd *abfd, asection *sec)
{
if (!sec->used_by_bfd)
{
struct elf_avr_section_data *sdata;
bfd_size_type amt = sizeof (*sdata);
sdata = bfd_zalloc (abfd, amt);
if (sdata == NULL)
return FALSE;
sec->used_by_bfd = sdata;
}
return _bfd_elf_new_section_hook (abfd, sec);
}
/* Return a pointer to the relaxation information for SEC. */
static struct avr_relax_info *
get_avr_relax_info (asection *sec)
{
struct elf_avr_section_data *section_data;
/* No info available if no section or if it is an output section. */
if (!sec || sec == sec->output_section)
return NULL;
section_data = (struct elf_avr_section_data *) elf_section_data (sec);
return &section_data->relax_info;
}
/* Initialise the per section relaxation information for SEC. */
static void
init_avr_relax_info (asection *sec)
{
struct avr_relax_info *relax_info = get_avr_relax_info (sec);
relax_info->records.count = 0;
relax_info->records.allocated = 0;
relax_info->records.items = NULL;
}
2006-05-24 07:36:12 +00:00
/* Initialize an entry in the stub hash table. */
static struct bfd_hash_entry *
stub_hash_newfunc (struct bfd_hash_entry *entry,
struct bfd_hash_table *table,
const char *string)
{
/* Allocate the structure if it has not already been allocated by a
subclass. */
if (entry == NULL)
{
entry = bfd_hash_allocate (table,
sizeof (struct elf32_avr_stub_hash_entry));
if (entry == NULL)
return entry;
}
/* Call the allocation method of the superclass. */
entry = bfd_hash_newfunc (entry, table, string);
if (entry != NULL)
{
struct elf32_avr_stub_hash_entry *hsh;
/* Initialize the local fields. */
hsh = avr_stub_hash_entry (entry);
hsh->stub_offset = 0;
hsh->target_value = 0;
}
return entry;
}
/* This function is just a straight passthrough to the real
function in linker.c. Its prupose is so that its address
can be compared inside the avr_link_hash_table macro. */
static struct bfd_hash_entry *
elf32_avr_link_hash_newfunc (struct bfd_hash_entry * entry,
struct bfd_hash_table * table,
const char * string)
{
return _bfd_elf_link_hash_newfunc (entry, table, string);
}
/* Free the derived linker hash table. */
static void
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 09:41:39 +00:00
elf32_avr_link_hash_table_free (bfd *obfd)
{
struct elf32_avr_link_hash_table *htab
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 09:41:39 +00:00
= (struct elf32_avr_link_hash_table *) obfd->link.hash;
/* Free the address mapping table. */
if (htab->amt_stub_offsets != NULL)
free (htab->amt_stub_offsets);
if (htab->amt_destination_addr != NULL)
free (htab->amt_destination_addr);
bfd_hash_table_free (&htab->bstab);
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 09:41:39 +00:00
_bfd_elf_link_hash_table_free (obfd);
}
2006-05-24 07:36:12 +00:00
/* Create the derived linker hash table. The AVR ELF port uses the derived
hash table to keep information specific to the AVR ELF linker (without
using static variables). */
static struct bfd_link_hash_table *
elf32_avr_link_hash_table_create (bfd *abfd)
{
struct elf32_avr_link_hash_table *htab;
bfd_size_type amt = sizeof (*htab);
* coff-arm.c (coff_arm_link_hash_table_create): Use bfd_zmalloc. * coff-h8300.c (h8300_coff_link_hash_table_create): Likewise. * m68klinux.c (linux_link_hash_table_create): Likewise. * sparclinux.c (linux_link_hash_table_create): Likewise. * sunos.c (sunos_link_hash_table_create): Likewise. * xcofflink.c (_bfd_xcoff_bfd_link_hash_table_create): Likewise. * elf-m10300.c (elf32_mn10300_link_hash_table_create): Likewise. * elf32-arm.c (elf32_arm_link_hash_table_create): Likewise. * elf32-avr.c (elf32_avr_link_hash_table_create): Likewise. * elf32-cr16.c (elf32_cr16_link_hash_table_create): Likewise. * elf32-cris.c (elf_cris_link_hash_table_create): Likewise. * elf32-hppa.c (elf32_hppa_link_hash_table_create): Likewise. * elf32-i386.c (elf_i386_link_hash_table_create): Likewise. * elf32-lm32.c (lm32_elf_link_hash_table_create): Likewise. * elf32-m32r.c (m32r_elf_link_hash_table_create): Likewise. * elf32-m68hc1x.c (m68hc11_elf_hash_table_create): Likewise. * elf32-m68k.c (elf_m68k_link_hash_table_create): Likewise. * elf32-metag.c (elf_metag_link_hash_table_create): Likewise. * elf32-nios2.c (nios2_elf32_link_hash_table_create): Likewise. * elf32-s390.c (elf_s390_link_hash_table_create): Likewise. * elf32-score.c (elf32_score_link_hash_table_create): Likewise. * elf32-spu.c (spu_elf_link_hash_table_create): Likewise. * elf32-tic6x.c (elf32_tic6x_link_hash_table_create): Likewise. * elf32-vax.c (elf_vax_link_hash_table_create): Likewise. * elf32-xgate.c (xgate_elf_bfd_link_hash_table_create): Likewise. * elf32-xtensa.c (elf_xtensa_link_hash_table_create): Likewise. * elf64-aarch64.c (elf64_aarch64_link_hash_table_create): Likewise. * elf64-s390.c (elf_s390_link_hash_table_create): Likewise. * elf64-sh64.c (sh64_elf64_link_hash_table_create): Likewise. * elf64-x86-64.c (elf_x86_64_link_hash_table_create): Likewise. * elfxx-mips.c (_bfd_mips_elf_link_hash_table_create): Likewise. * elflink.c (_bfd_elf_link_hash_table_create): Likewise. (_bfd_elf_link_hash_table_init): Assume zero fill table on entry.
2013-02-10 04:36:33 +00:00
htab = bfd_zmalloc (amt);
2006-05-24 07:36:12 +00:00
if (htab == NULL)
return NULL;
if (!_bfd_elf_link_hash_table_init (&htab->etab, abfd,
elf32_avr_link_hash_newfunc,
* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
2010-02-04 09:16:43 +00:00
sizeof (struct elf_link_hash_entry),
AVR_ELF_DATA))
2006-05-24 07:36:12 +00:00
{
free (htab);
return NULL;
}
/* Init the stub hash table too. */
if (!bfd_hash_table_init (&htab->bstab, stub_hash_newfunc,
sizeof (struct elf32_avr_stub_hash_entry)))
Free linker hash table from bfd_close. Also tidies numerous error exit paths in various link_hash_table_create functions that failed to free memory. include/ * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. bfd/ * archive.c: Include bfdlink.h. (_bfd_archive_close_and_cleanup): Call linker hash_table_free. * bfd.c (struct bfd): Add is_linker_output field. * elf-bfd.h (_bfd_elf_link_hash_table_free): Update prototype. * linker.c (_bfd_link_hash_table_init): Set up hash_table_free, link.hash and is_linker_output. (_bfd_generic_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Assert is_linker_output and link.hash, and clear them before exit. * elf-m10300.c (elf32_mn10300_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. Hack is_linker_output and link.hash so we can free two linker hash tables. (elf32_mn10300_link_hash_table_create): Create static_hash_table first. Clean up on errors. Set hash_table_free pointer. * elf32-arm.c (elf32_arm_link_hash_table_free): Replace bfd_link_hash_table* param with bfd*. (elf32_arm_link_hash_table_create): Clean up on errors. Set hash_table_free pointer. * elf32-avr.c, * elf32-hppa.c, * elf32-i386.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nios2.c, * elf32-xgate.c, * elf64-ia64-vms.c, * elf64-ppc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-sparc.c, * xcofflink.c: Similarly. * simple.c (bfd_simple_get_relocated_section_contents): Save and clear link.next before creating linker hash table. Clean up on errors, and restore link.next on exit. * elf32-m68hc1x.h (m68hc11_elf_bfd_link_hash_table_free): Delete. * elf32-xgate.h (xgate_elf_bfd_link_hash_table_free): Delete. * elfxx-sparc.h (_bfd_sparc_elf_link_hash_table_free): Delete. * libcoff-in.h (_bfd_xcoff_bfd_link_hash_table_free): Delete. * hash.c (bfd_hash_table_init_n): Free table on error. * libbfd-in.h (_bfd_generic_link_hash_table_free): Update proto. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
2014-06-13 09:41:39 +00:00
{
_bfd_elf_link_hash_table_free (abfd);
return NULL;
}
htab->etab.root.hash_table_free = elf32_avr_link_hash_table_free;
2006-03-03 15:54:23 +00:00
2006-05-24 07:36:12 +00:00
return &htab->etab.root;
}
/* Calculates the effective distance of a pc relative jump/call. */
static int
avr_relative_distance_considering_wrap_around (unsigned int distance)
2006-03-03 15:54:23 +00:00
{
unsigned int wrap_around_mask = avr_pc_wrap_around - 1;
int dist_with_wrap_around = distance & wrap_around_mask;
2006-03-03 15:54:23 +00:00
if (dist_with_wrap_around > ((int) (avr_pc_wrap_around >> 1)))
dist_with_wrap_around -= avr_pc_wrap_around;
return dist_with_wrap_around;
}
2000-03-27 08:39:14 +00:00
static reloc_howto_type *
2006-03-03 15:54:23 +00:00
bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
2000-03-27 08:39:14 +00:00
{
unsigned int i;
for (i = 0;
i < sizeof (avr_reloc_map) / sizeof (struct avr_reloc_map);
i++)
if (avr_reloc_map[i].bfd_reloc_val == code)
return &elf_avr_howto_table[avr_reloc_map[i].elf_reloc_val];
2000-03-27 08:39:14 +00:00
return NULL;
}
* aout-adobe.c (aout_32_bfd_reloc_name_lookup): Define. * aout-arm.c (MY_bfd_reloc_name_lookup): Define. (MY (bfd_reloc_name_lookup)): New function. * aout-ns32k.c (MY (bfd_reloc_name_lookup)): New function. * aout-target.h (NAME (aout, reloc_name_lookup)): Declare. (MY_bfd_reloc_name_lookup): Define. * aout-tic30.c (tic30_aout_reloc_name_lookup): New function. (MY_bfd_reloc_name_lookup): Define. * aoutx.h (NAME (aout, reloc_type_lookup)): Don't declare. (NAME (aout, reloc_name_lookup)): New function. * bout.c (b_out_bfd_reloc_name_lookup): New function. * coff-alpha.c (alpha_bfd_reloc_name_lookup): New function. (_bfd_ecoff_bfd_reloc_name_lookup): Define. * coff-arm.c (coff_arm_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-i386.c (coff_bfd_reloc_name_lookup): Define. (coff_i386_reloc_name_lookup): New function. * coff-i860.c (coff_i860_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-i960.c (coff_i960_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-m68k.c (m68k_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-maxq.c (maxq_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-mcore.c (mcore_coff_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-mips.c (mips_bfd_reloc_name_lookup): New function. (_bfd_ecoff_bfd_reloc_name_lookup): Define. * coff-ppc.c (ppc_coff_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-rs6000.c (coff_bfd_reloc_name_lookup): Define. (_bfd_xcoff_reloc_name_lookup): New function. (rs6000coff_vec, pmac_xcoff_vec): Init new field. * coff-sh.c (coff_bfd_reloc_name_lookup): Define. (sh_coff_reloc_name_lookup): New function. * coff-sparc.c (coff_sparc_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-tic30.c (coff_bfd_reloc_name_lookup): Define. (tic30_coff_reloc_name_lookup): New function. * coff-tic4x.c (coff_bfd_reloc_name_lookup): Define. (tic4x_coff_reloc_name_lookup): New function. * coff-tic54x.c (coff_bfd_reloc_name_lookup): Define. (tic54x_coff_reloc_name_lookup): New function. * coff-x86_64.c (coff_bfd_reloc_name_lookup): Define. (coff_amd64_reloc_name_lookup): New function. * coff-z80.c (coff_z80_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff-z8k.c (coff_z8k_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * coff64-rs6000.c (coff_bfd_reloc_name_lookup): Define. (xcoff64_reloc_name_lookup): New function. (rs6000coff64_vec, aix5coff64_vec): Init new field. * coffcode.h (coff_bfd_reloc_name_lookup): Define. * elf-hppa.h (elf_hppa_reloc_name_lookup): New function. * elf-m10200.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf-m10300.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-arc.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-arm.c (elf32_arm_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-avr.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-bfin.c (bfin_bfd_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-cr16c.c (elf_cr16c_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-cris.c (cris_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-crx.c (elf_crx_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-d10v.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-d30v.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-dlx.c (elf32_dlx_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-fr30.c (fr30_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-frv.c (frv_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-gen.c (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-h8300.c (elf32_h8_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-hppa.c (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-i370.c (i370_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-i386.c (elf_i386_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-i860.c (elf32_i860_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-i960.c (elf32_i960_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-ip2k.c (ip2k_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-iq2000.c (iq2000_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-m32c.c (m32c_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-m32r.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-m68hc11.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-m68hc12.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-m68k.c (reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-m88k.c (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-mcore.c (mcore_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-mep.c (mep_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-mips.c (bfd_elf32_bfd_reloc_name_lookup): New function. (mips_vxworks_bfd_reloc_name_lookup): Likewise. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-msp430.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-mt.c (mt_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-openrisc.c (openrisc_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-or32.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elf32-pj.c (pj_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-ppc.c (ppc_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-s390.c (elf_s390_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-score.c (elf32_score_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-sh.c (sh_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-sparc.c (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-spu.c (spu_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-v850.c (v850_elf_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-vax.c (reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-xc16x.c (xc16x_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-xstormy16.c (xstormy16_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf32-xtensa.c (elf_xtensa_reloc_name_lookup): New function. (bfd_elf32_bfd_reloc_name_lookup): Define. * elf64-alpha.c (elf64_alpha_bfd_reloc_name_lookup): New function. (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-gen.c (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-hppa.c (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-mips.c (bfd_elf64_bfd_reloc_name_lookup): New function. * elf64-mmix.c (bfd_elf64_bfd_reloc_name_lookup): New function. * elf64-ppc.c (ppc64_elf_reloc_name_lookup): New function. (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-s390.c (elf_s390_reloc_name_lookup): New function. (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-sh64.c (sh_elf64_reloc_name_lookup): New function. (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-sparc.c (bfd_elf64_bfd_reloc_name_lookup): Define. * elf64-x86-64.c (elf64_x86_64_reloc_name_lookup): New function. (bfd_elf64_bfd_reloc_name_lookup): Define. * elfn32-mips.c (bfd_elf32_bfd_reloc_name_lookup): New function. * elfxx-ia64.c (elfNN_ia64_reloc_name_lookup): New function. (bfd_elfNN_bfd_reloc_name_lookup): Define. * elfxx-sparc.c (_bfd_sparc_elf_reloc_name_lookup): New function. * elfxx-sparc.h (_bfd_sparc_elf_reloc_name_lookup): Declare. * i386msdos.c (msdos_bfd_reloc_name_lookup): Define. * i386os9k.c (aout_32_bfd_reloc_name_lookup): Define. * ieee.c (ieee_bfd_reloc_name_lookup): Define. * libaout.h (NAME (aout, reloc_name_lookup)): Declare. * libbfd-in.h (_bfd_norelocs_bfd_reloc_name_lookup): Declare. * mipsbsd.c (MY_bfd_reloc_name_lookup): Define. (MY(reloc_type_lookup)): Rename from MY(reloc_howto_type_lookup). (MY(reloc_name_lookup)): New function. * nlm-target.h (nlm_bfd_reloc_name_lookup): Define. * oasys.c (oasys_bfd_reloc_name_lookup): Define. * pdp11.c (NAME (aout, reloc_name_lookup)): New function. * pe-mips.c (coff_mips_reloc_name_lookup): New function. (coff_bfd_reloc_name_lookup): Define. * reloc.c (bfd_reloc_name_lookup): New function. * riscix.c (riscix_reloc_name_lookup): New function. (MY_bfd_reloc_name_lookup): Define. * som.c (som_bfd_reloc_name_lookup): New function. * targets.c (struct bfd_target): Add reloc_name_lookup. (BFD_JUMP_TABLE_RELOCS): Add NAME##_bfd_reloc_name_lookup. * versados.c (versados_bfd_reloc_name_lookup): Define. * vms.c (vms_bfd_reloc_name_lookup): New function. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
2007-03-26 12:23:03 +00:00
static reloc_howto_type *
bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0;
i < sizeof (elf_avr_howto_table) / sizeof (elf_avr_howto_table[0]);
i++)
if (elf_avr_howto_table[i].name != NULL
&& strcasecmp (elf_avr_howto_table[i].name, r_name) == 0)
return &elf_avr_howto_table[i];
return NULL;
}
2000-03-27 08:39:14 +00:00
/* Set the howto pointer for an AVR ELF reloc. */
static void
2006-03-03 15:54:23 +00:00
avr_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
arelent *cache_ptr,
Elf_Internal_Rela *dst)
2000-03-27 08:39:14 +00:00
{
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 20:59:00 +00:00
if (r_type >= (unsigned int) R_AVR_max)
{
More fixes for illegal memory accesses triggered by running objdump on fuzzed binaries. PR binutils/17512 * objdump.c (display_any_bfd): Fail if archives nest too deeply. * ecoff.c: Use bfd_alloc2 to allocate space for structure arrays. (_bfd_ecoff_slurp_symbol_table): Check for a negative symbol index or an out of range fdr index. * elf-m10300.c (mn10300_info_to_howto): Fix typo in error message. * elf32-arc.c (arc_info_to_howto_rel): Likewise. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16.c (elf_cr16_info_to_howto): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-crx.c (elf_crx_info_to_howto): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i370.c (i370_elf_info_to_howto): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mcore.c (mcore_elf_info_to_howto): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-microblaze.c (microblaze_elf_info_to_howto): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-pj.c (pj_elf_info_to_howto): Likewise. * elf32-ppc.c (ppc_elf_info_to_howto): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-sh.c (sh_elf_info_to_howto): Likewise. * elf32-spu.c (spu_elf_info_to_howto): Likewise. * elf32-v850.c (v850_elf_perform_relocation): Likewise. * elf32-vax.c (rtype_to_howto): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-alpha.c (elf64_alpha_info_to_howto): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * mach-o.c: Use bfd_alloc2 to allocate space for structure arrays. (bfd_mach_o_canonicalize_one_reloc): Fix check on out of range symbol indicies. (bfd_mach_o_canonicalize_relocs): Check for out of range alloc. (bfd_mach_o_canonicalize_dynamic_reloc): Likewise. (bfd_mach_o_build_dysymtab): Likewise. (bfd_mach_o_write_symtab_content): Set the string table size to zero upon error. (bfd_mach_o_read_symtab_symbols): Reset the nsyms value if the read fails. * peXXigen.c (pe_print_edata): Check for numeric overflow in edt fields. * tekhex.c (first_phase): Check for src pointer reaching end of buffer.
2015-02-03 14:34:54 +00:00
_bfd_error_handler (_("%B: invalid AVR reloc number: %d"), abfd, r_type);
More fixes for memory access violations exposed by fuzzed binaries. PR binutils/17512 * archive.c (do_slurp_bsd_armap): Return if the parsed_size is zero. (bfd_slurp_armap): Zero terminate the name. (bfd_generic_stat_arch_elt): If there is no header, fail. * elf32-arc.c (arc_info_to_howto_rel): Replace BFD_ASSERT with error message. * elf32-avr.c (avr_info_to_howto_rela): Likewise. * elf32-cr16c.c (elf_cr16c_info_to_howto_rel): Likewise. * elf32-cris.c (cris_info_to_howto_rela): Likewise. * elf32-d10v.c (d10v_info_to_howto_rel): Likewise. * elf32-d30v.c (d30v_info_to_howto_rel): Likewise. * elf32-dlx.c (dlx_rtype_to_howto): Likewise. * elf32-epiphany.c (epiphany_info_to_howto_rela): Likewise. * elf32-fr30.c (fr30_info_to_howto_rela): Likewise. * elf32-frv.c (frv_info_to_howto_rela): Likewise. * elf32-i960.c (elf32_i960_info_to_howto_rel): Likewise. * elf32-ip2k.c (ip2k_info_to_howto_rela): Likewise. * elf32-iq2000.c (iq2000_info_to_howto_rela): Likewise. * elf32-lm32.c (lm32_info_to_howto_rela): Likewise. * elf32-m32c.c (m32c_info_to_howto_rela): Likewise. * elf32-m32r.c (m32r_info_to_howto_rel): Likewise. * elf32-m68hc11.c (m68hc11_info_to_howto_rel): Likewise. * elf32-m68hc12.c (m68hc11_info_to_howto_rel): Likewise. * elf32-mep.c (mep_info_to_howto_rela): Likewise. * elf32-metag.c (metag_info_to_howto_rela): Likewise. * elf32-moxie.c (moxie_info_to_howto_rela): Likewise. * elf32-msp430.c (msp430_info_to_howto_rela): Likewise. * elf32-mt.c (mt_info_to_howto_rela): Likewise. * elf32-nds32.c (nds32_info_to_howto_rel): Likewise. * elf32-or1k.c (or1k_info_to_howto_rela): Likewise. * elf32-rl78.c (rl78_info_to_howto_rela): Likewise. * elf32-rx.c (rx_info_to_howto_rela): Likewise. * elf32-v850.c (v850_elf_info_to_howto_rel): Likewise. * elf32-visium.c (visium_info_to_howto_rela): Likewise. * elf32-xgate.c (xgate_info_to_howto_rel): Likewise. * elf32-xtensa.c (elf_xtensa_info_to_howto_rela): Likewise. * elf64-mmix.c (mmix_info_to_howto_rela): Likewise. * elf64-x86-64.c (elf_x86_64_reloc_type_lookup): Likewise. * elfnn-aarch64.c (elfNN_aarch64_bfd_reloc_from_type): Likewise. * elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Add range checking of reloc symbol index. * mach-o.c (bfd_mach_o_canonicalize_one_reloc): If no symbols have been provided then set the reloc's symbol to undefined. * reloc.c (bfd_generic_get_relocated_section_contents): Add range checking of the reloc to be applied. * versados.c (process_otr): Add more range checks. (versados_canonicalize_reloc): If the section is unknown, set the symbol to undefined. * vms-alpha.c (_bfd_vms_slurp_eisd): Add range checks. (alpha_vms_object_p): Likewise.
2014-12-22 20:59:00 +00:00
r_type = 0;
}
2000-03-27 08:39:14 +00:00
cache_ptr->howto = &elf_avr_howto_table[r_type];
}
2006-05-24 07:36:12 +00:00
static bfd_boolean
avr_stub_is_required_for_16_bit_reloc (bfd_vma relocation)
{
return (relocation >= 0x020000);
}
/* Returns the address of the corresponding stub if there is one.
Returns otherwise an address above 0x020000. This function
could also be used, if there is no knowledge on the section where
the destination is found. */
static bfd_vma
avr_get_stub_addr (bfd_vma srel,
struct elf32_avr_link_hash_table *htab)
{
unsigned int sindex;
2006-05-24 07:36:12 +00:00
bfd_vma stub_sec_addr =
(htab->stub_sec->output_section->vma +
htab->stub_sec->output_offset);
for (sindex = 0; sindex < htab->amt_max_entry_cnt; sindex ++)
if (htab->amt_destination_addr[sindex] == srel)
return htab->amt_stub_offsets[sindex] + stub_sec_addr;
2006-05-24 07:36:12 +00:00
/* Return an address that could not be reached by 16 bit relocs. */
return 0x020000;
}
/* Perform a diff relocation. Nothing to do, as the difference value is already
written into the section's contents. */
static bfd_reloc_status_type
bfd_elf_avr_diff_reloc (bfd *abfd ATTRIBUTE_UNUSED,
arelent *reloc_entry ATTRIBUTE_UNUSED,
asymbol *symbol ATTRIBUTE_UNUSED,
void *data ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd ATTRIBUTE_UNUSED,
char **error_message ATTRIBUTE_UNUSED)
{
return bfd_reloc_ok;
}
2000-03-27 08:39:14 +00:00
/* Perform a single relocation. By default we use the standard BFD
routines, but a few relocs, we have to do them ourselves. */
static bfd_reloc_status_type
2006-05-24 07:36:12 +00:00
avr_final_link_relocate (reloc_howto_type * howto,
bfd * input_bfd,
asection * input_section,
bfd_byte * contents,
Elf_Internal_Rela * rel,
bfd_vma relocation,
struct elf32_avr_link_hash_table * htab)
2000-03-27 08:39:14 +00:00
{
bfd_reloc_status_type r = bfd_reloc_ok;
bfd_vma x;
bfd_signed_vma srel;
2006-05-24 07:36:12 +00:00
bfd_signed_vma reloc_addr;
bfd_boolean use_stubs = FALSE;
/* Usually is 0, unless we are generating code for a bootloader. */
bfd_signed_vma base_addr = htab->vector_base;
/* Absolute addr of the reloc in the final excecutable. */
reloc_addr = rel->r_offset + input_section->output_section->vma
+ input_section->output_offset;
2000-03-27 08:39:14 +00:00
switch (howto->type)
{
case R_AVR_7_PCREL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
2000-03-27 08:39:14 +00:00
srel -= (input_section->output_section->vma +
input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
if (srel > ((1 << 7) - 1) || (srel < - (1 << 7)))
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xfc07) | (((srel >> 1) << 3) & 0x3f8);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_13_PCREL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
2000-03-27 08:39:14 +00:00
srel -= (input_section->output_section->vma +
input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
srel = avr_relative_distance_considering_wrap_around (srel);
2000-03-27 08:39:14 +00:00
/* AVR addresses commands as words. */
srel >>= 1;
/* Check for overflow. */
if (srel < -2048 || srel > 2047)
{
/* Relative distance is too large. */
/* Always apply WRAPAROUND for avr2, avr25, and avr4. */
switch (bfd_get_mach (input_bfd))
2000-03-27 08:39:14 +00:00
{
case bfd_mach_avr2:
case bfd_mach_avr25:
case bfd_mach_avr4:
break;
default:
return bfd_reloc_overflow;
2000-03-27 08:39:14 +00:00
}
}
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf000) | (srel & 0xfff);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_LO8_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
2006-03-03 15:54:23 +00:00
if (((srel > 0) && (srel & 0xffff) > 255)
|| ((srel < 0) && ((-srel) & 0xffff) > 128))
/* Remove offset for data/eeprom section. */
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_6:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if (((srel & 0xffff) > 63) || (srel < 0))
/* Remove offset for data/eeprom section. */
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
2006-03-03 15:54:23 +00:00
x = (x & 0xd3f8) | ((srel & 7) | ((srel & (3 << 3)) << 7)
| ((srel & (1 << 5)) << 8));
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_6_ADIW:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if (((srel & 0xffff) > 63) || (srel < 0))
/* Remove offset for data/eeprom section. */
return bfd_reloc_overflow;
x = bfd_get_16 (input_bfd, contents);
2006-03-03 15:54:23 +00:00
x = (x & 0xff30) | (srel & 0xf) | ((srel & 0x30) << 2);
bfd_put_16 (input_bfd, x, contents);
break;
2000-03-27 08:39:14 +00:00
case R_AVR_HI8_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = (srel >> 8) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HH8_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = (srel >> 16) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_MS8_LDI:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = (srel >> 24) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
2000-03-27 08:39:14 +00:00
case R_AVR_LO8_LDI_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HI8_LDI_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
srel = (srel >> 8) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HH8_LDI_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
srel = (srel >> 16) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_MS8_LDI_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
srel = (srel >> 24) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
2006-05-24 07:36:12 +00:00
case R_AVR_LO8_LDI_GS:
use_stubs = (!htab->no_stubs);
/* Fall through. */
2000-03-27 08:39:14 +00:00
case R_AVR_LO8_LDI_PM:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
2006-05-24 07:36:12 +00:00
if (use_stubs
&& avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
{
bfd_vma old_srel = srel;
/* We need to use the address of the stub instead. */
srel = avr_get_stub_addr (srel, htab);
if (debug_stubs)
printf ("LD: Using jump stub (at 0x%x) with destination 0x%x for "
"reloc at address 0x%x.\n",
(unsigned int) srel,
(unsigned int) old_srel,
(unsigned int) reloc_addr);
if (avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
return bfd_reloc_outofrange;
}
2000-03-27 08:39:14 +00:00
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
2006-05-24 07:36:12 +00:00
case R_AVR_HI8_LDI_GS:
use_stubs = (!htab->no_stubs);
/* Fall through. */
2000-03-27 08:39:14 +00:00
case R_AVR_HI8_LDI_PM:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
2006-05-24 07:36:12 +00:00
if (use_stubs
&& avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
{
bfd_vma old_srel = srel;
/* We need to use the address of the stub instead. */
srel = avr_get_stub_addr (srel, htab);
if (debug_stubs)
printf ("LD: Using jump stub (at 0x%x) with destination 0x%x for "
"reloc at address 0x%x.\n",
(unsigned int) srel,
(unsigned int) old_srel,
(unsigned int) reloc_addr);
if (avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
return bfd_reloc_outofrange;
}
2000-03-27 08:39:14 +00:00
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
srel = (srel >> 8) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HH8_LDI_PM:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
srel = (srel >> 16) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_LO8_LDI_PM_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HI8_LDI_PM_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
srel = (srel >> 8) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_HH8_LDI_PM_NEG:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
srel = -srel;
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
srel = (srel >> 16) & 0xff;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_CALL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
x = bfd_get_16 (input_bfd, contents);
x |= ((srel & 0x10000) | ((srel << 3) & 0x1f00000)) >> 16;
bfd_put_16 (input_bfd, x, contents);
bfd_put_16 (input_bfd, (bfd_vma) srel & 0xffff, contents+2);
2000-03-27 08:39:14 +00:00
break;
2006-05-24 07:36:12 +00:00
case R_AVR_16_PM:
use_stubs = (!htab->no_stubs);
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if (use_stubs
&& avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
{
bfd_vma old_srel = srel;
/* We need to use the address of the stub instead. */
srel = avr_get_stub_addr (srel,htab);
if (debug_stubs)
printf ("LD: Using jump stub (at 0x%x) with destination 0x%x for "
"reloc at address 0x%x.\n",
(unsigned int) srel,
(unsigned int) old_srel,
(unsigned int) reloc_addr);
if (avr_stub_is_required_for_16_bit_reloc (srel - base_addr))
return bfd_reloc_outofrange;
}
if (srel & 1)
return bfd_reloc_outofrange;
srel = srel >> 1;
bfd_put_16 (input_bfd, (bfd_vma) srel &0x00ffff, contents);
break;
case R_AVR_DIFF8:
case R_AVR_DIFF16:
case R_AVR_DIFF32:
/* Nothing to do here, as contents already contains the diff value. */
r = bfd_reloc_ok;
break;
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
case R_AVR_LDS_STS_16:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if ((srel & 0xFFFF) < 0x40 || (srel & 0xFFFF) > 0xbf)
return bfd_reloc_outofrange;
srel = srel & 0x7f;
x = bfd_get_16 (input_bfd, contents);
x |= (srel & 0x0f) | ((srel & 0x30) << 5) | ((srel & 0x40) << 2);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_PORT6:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if ((srel & 0xffff) > 0x3f)
return bfd_reloc_outofrange;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xf9f0) | ((srel & 0x30) << 5) | (srel & 0x0f);
bfd_put_16 (input_bfd, x, contents);
break;
case R_AVR_PORT5:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation + rel->r_addend;
if ((srel & 0xffff) > 0x1f)
return bfd_reloc_outofrange;
x = bfd_get_16 (input_bfd, contents);
x = (x & 0xff07) | ((srel & 0x1f) << 3);
bfd_put_16 (input_bfd, x, contents);
break;
2000-03-27 08:39:14 +00:00
default:
r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
relocation, rel->r_addend);
}
return r;
}
/* Relocate an AVR ELF section. */
2006-03-03 15:54:23 +00:00
static bfd_boolean
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elf32_avr_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info,
bfd *input_bfd,
asection *input_section,
bfd_byte *contents,
Elf_Internal_Rela *relocs,
Elf_Internal_Sym *local_syms,
asection **local_sections)
2000-03-27 08:39:14 +00:00
{
Elf_Internal_Shdr * symtab_hdr;
struct elf_link_hash_entry ** sym_hashes;
Elf_Internal_Rela * rel;
Elf_Internal_Rela * relend;
2006-05-24 07:36:12 +00:00
struct elf32_avr_link_hash_table * htab = avr_link_hash_table (info);
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* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
2010-02-04 09:16:43 +00:00
if (htab == NULL)
return FALSE;
2000-03-27 08:39:14 +00:00
symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
relend = relocs + input_section->reloc_count;
for (rel = relocs; rel < relend; rel ++)
{
reloc_howto_type * howto;
unsigned long r_symndx;
Elf_Internal_Sym * sym;
asection * sec;
struct elf_link_hash_entry * h;
bfd_vma relocation;
bfd_reloc_status_type r;
bfd/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * aoutx.h (aout_link_input_section_std): Pass proper hash entry to linker reloc_overflow callback. (aout_link_input_section_ext): Likewise. (aout_link_reloc_link_order): Likewise. * coff-a29k.c (coff_a29k_relocate_section): Likewise. * coff-alpha.c (alpha_ecoff_get_relocated_section_contents): Likewise. (alpha_relocate_section): Likewise. * coff-arm.c (coff_arm_relocate_section): Likewise. * coff-h8300.c (h8300_reloc16_extra_cases): Likewise. * coff-h8500.c (extra_case): Likewise. * coff-i960.c (coff_i960_relocate_section): Likewise. * coff-mcore.c (coff_mcore_relocate_section): Likewise. * coff-mips.c (mips_relocate_section): Likewise. * coff-or32.c (coff_or32_relocate_section): Likewise. * coff-ppc.c (coff_ppc_relocate_section): Likewise. * coff-rs6000.c (xcoff_ppc_relocate_section): Likewise. * coff-sh.c (sh_relocate_section): Likewise. * coff-tic80.c (coff_tic80_relocate_section): Likewise. * coff-w65.c (w65_reloc16_extra_cases): Likewise. * coff-z8k.c (extra_case): Likewise. * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. (_bfd_coff_generic_relocate_section): Likewise. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf-hppa.h (elf_hppa_relocate_section): Likewise. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.h (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise. (_bfd_elf_mips_get_relocated_section_contents): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (pdp11_aout_link_input_section): Likewise. (aout_link_reloc_link_order): Likewise. * reloc.c (bfd_generic_get_relocated_section_contents): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * simple.c (simple_dummy_reloc_overflow): Updated. include/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * bfdlink.h (bfd_link_callbacks): Add a pointer to struct bfd_link_hash_entry to reloc_overflow. ld/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * ldmain.c (reloc_overflow): Accept a pointer to struct bfd_link_hash_entry. Report symbol location for relocation overflow.
2004-10-21 15:28:33 +00:00
const char * name;
2000-03-27 08:39:14 +00:00
int r_type;
r_type = ELF32_R_TYPE (rel->r_info);
r_symndx = ELF32_R_SYM (rel->r_info);
2010-06-27 04:07:55 +00:00
howto = elf_avr_howto_table + r_type;
2000-03-27 08:39:14 +00:00
h = NULL;
sym = NULL;
sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections [r_symndx];
* elf.c (_bfd_elf_rela_local_sym): Accept asection **, and return updated section in case of merged section. * elf-bfd.h (_bfd_elf_rela_local_sym): Update declaration. * elf-hppa.h (elf_hppa_relocate_section): Adjust call. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.h (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section) Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Don't recalculate symbol section for reloc output. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Don't recalculate everything for R_PPC_RELAX32 reloc. Don't bother checking ppc_elf_install_value return value. * elf64-ppc.c (ppc64_elf_relocate_section <R_PPC64_TOC>): Sanity check sec->id.
2003-11-05 13:17:09 +00:00
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
2000-03-27 08:39:14 +00:00
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 18:29:44 +00:00
bfd_boolean unresolved_reloc, warned, ignored;
2000-03-27 08:39:14 +00:00
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h, sec, relocation,
Pass ignored unresolved relocations to ld backend bfd/ PR ld/4409 * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): Add an argument for error ignored. * elf-m10200.c (mn10200_elf_relocate_section): Updated. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-metag.c (elf_metag_relocate_section): Likewise. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-nios2.c (nios2_elf32_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-ia64-vms.c (elf64_ia64_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Skip if error from RELOC_FOR_GLOBAL_SYMBOL in executable is ignored. ld/testsuite/ PR ld/4409 * ld-ia64/error1.d: New file. * ld-ia64/error1.s: Likewise. * ld-ia64/error2.d: Likewise. * ld-ia64/error3.d: Likewise.
2013-11-05 18:29:44 +00:00
unresolved_reloc, warned, ignored);
bfd/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * aoutx.h (aout_link_input_section_std): Pass proper hash entry to linker reloc_overflow callback. (aout_link_input_section_ext): Likewise. (aout_link_reloc_link_order): Likewise. * coff-a29k.c (coff_a29k_relocate_section): Likewise. * coff-alpha.c (alpha_ecoff_get_relocated_section_contents): Likewise. (alpha_relocate_section): Likewise. * coff-arm.c (coff_arm_relocate_section): Likewise. * coff-h8300.c (h8300_reloc16_extra_cases): Likewise. * coff-h8500.c (extra_case): Likewise. * coff-i960.c (coff_i960_relocate_section): Likewise. * coff-mcore.c (coff_mcore_relocate_section): Likewise. * coff-mips.c (mips_relocate_section): Likewise. * coff-or32.c (coff_or32_relocate_section): Likewise. * coff-ppc.c (coff_ppc_relocate_section): Likewise. * coff-rs6000.c (xcoff_ppc_relocate_section): Likewise. * coff-sh.c (sh_relocate_section): Likewise. * coff-tic80.c (coff_tic80_relocate_section): Likewise. * coff-w65.c (w65_reloc16_extra_cases): Likewise. * coff-z8k.c (extra_case): Likewise. * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. (_bfd_coff_generic_relocate_section): Likewise. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf-hppa.h (elf_hppa_relocate_section): Likewise. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.h (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise. (_bfd_elf_mips_get_relocated_section_contents): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (pdp11_aout_link_input_section): Likewise. (aout_link_reloc_link_order): Likewise. * reloc.c (bfd_generic_get_relocated_section_contents): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * simple.c (simple_dummy_reloc_overflow): Updated. include/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * bfdlink.h (bfd_link_callbacks): Add a pointer to struct bfd_link_hash_entry to reloc_overflow. ld/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * ldmain.c (reloc_overflow): Accept a pointer to struct bfd_link_hash_entry. Report symbol location for relocation overflow.
2004-10-21 15:28:33 +00:00
name = h->root.root.string;
2000-03-27 08:39:14 +00:00
}
PR ld/13991 bfd/ * bfd/elf-bfd.h (_bfd_elf_link_just_syms): Define as _bfd_generic_link_just_syms. * bfd/elflink.c (_bfd_elf_link_just_syms): Delete. * bfd/linker.c (_bfd_generic_link_just_syms): Set sec_info_type. * bfd/bfd-in.h (discarded_section): Renamed from elf_discarded_section. * bfd/section.c (SEC_INFO_TYPE_NONE, SEC_INFO_TYPE_STABS, SEC_INFO_TYPE_MERGE, SEC_INFO_TYPE_EH_FRAME, SEC_INFO_TYPE_JUST_SYMS): Renamed from corresponding ELF_INFO_TYPE. * bfd/elf-eh-frame.c, * bfd/elf-m10200.c, * bfd/elf-m10300.c, * bfd/elf.c, * bfd/elf32-arm.c, * bfd/elf32-avr.c, * bfd/elf32-bfin.c, * bfd/elf32-cr16.c, * bfd/elf32-cr16c.c, * bfd/elf32-cris.c, * bfd/elf32-crx.c, * bfd/elf32-d10v.c, * bfd/elf32-epiphany.c, * bfd/elf32-fr30.c, * bfd/elf32-frv.c, * bfd/elf32-h8300.c, * bfd/elf32-hppa.c, * bfd/elf32-i370.c, * bfd/elf32-i386.c, * bfd/elf32-i860.c, * bfd/elf32-ip2k.c, * bfd/elf32-iq2000.c, * bfd/elf32-lm32.c, * bfd/elf32-m32c.c, * bfd/elf32-m32r.c, * bfd/elf32-m68hc1x.c, * bfd/elf32-m68k.c, * bfd/elf32-mcore.c, * bfd/elf32-mep.c, * bfd/elf32-moxie.c, * bfd/elf32-msp430.c, * bfd/elf32-mt.c, * bfd/elf32-openrisc.c, * bfd/elf32-ppc.c, * bfd/elf32-rl78.c, * bfd/elf32-rx.c, * bfd/elf32-s390.c, * bfd/elf32-score.c, * bfd/elf32-score7.c, * bfd/elf32-sh.c, * bfd/elf32-spu.c, * bfd/elf32-tic6x.c, * bfd/elf32-tilepro.c, * bfd/elf32-v850.c, * bfd/elf32-vax.c, * bfd/elf32-xc16x.c, * bfd/elf32-xstormy16.c, * bfd/elf32-xtensa.c, * bfd/elf64-alpha.c, * bfd/elf64-hppa.c, * bfd/elf64-ia64-vms.c, * bfd/elf64-mmix.c, * bfd/elf64-ppc.c, * bfd/elf64-s390.c, * bfd/elf64-sh64.c, * bfd/elf64-x86-64.c, * bfd/elflink.c, * bfd/elfnn-ia64.c, * bfd/elfxx-mips.c, * bfd/elfxx-sparc.c, * bfd/elfxx-tilegx.c, * bfd/reloc.c: Update all references. * bfd/bfd-in2.h: Regenerate. ld/ * ld/ldlang.c (size_input_section): Use sec_info_type rather than usrdata->flags.just_syms. * ld/ldwrite.c (build_link_order): Likewise. * ld/emultempl/hppaelf.em (build_section_lists): Likewise. * ld/emultempl/ppc64elf.em (build_toc_list): Likewise. * ld/emultempl/armelf.em (build_section_lists): Likewise. (after_allocation): Update for renamed sec_info_type value. * ld/emultempl/tic6xdsbt.em: Likewise.
2012-04-24 05:12:40 +00:00
if (sec != NULL && discarded_section (sec))
bfd/ * elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Always call _bfd_clear_contents. Pass it the input section. * libbfd-in.h (_bfd_clear_contents): Add input_section argument. * libbfd.h: Regenerate. * reloc.c (_bfd_clear_contents): Take input_section argument. Use non-zero for .debug_ranges. (bfd_generic_get_relocated_section_conten): Update _bfd_clear_contents call. * elf32-arm.c (elf32_arm_relocate_section): Use RELOC_AGAINST_DISCARDED_SECTION. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfin_relocate_section): Likewise. (bfinfdpic_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section_r): Likewise. (elf64_alpha_relocate_section): Likewise. * elf64-hppa.c (elf64_hppa_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. ld/testsuite/ * ld-discard/zero-range.d, ld-discard/zero-range.s: New files.
2010-10-25 15:54:16 +00:00
RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
* elf-bfd.h (RELOC_AGAINST_DISCARDED_SECTION): Handle compound relocations. * elfxx-mips.c (mips_reloc_against_discarded_section): New function. (_bfd_mips_elf_relocate_section): Call it, in place of RELOC_AGAINST_DISCARDED_SECTION. * elf-m10200.c (mn10200_elf_relocate_section): Update arguments to RELOC_AGAINST_DISCARDED_SECTION. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfin_relocate_section): Likewise. (bfinfdpic_relocate_section): Likewise. * elf32-cr16.c (elf32_cr16_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-epiphany.c (epiphany_elf_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-lm32.c (lm32_elf_relocate_section): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-moxie.c (moxie_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-rl78.c (rl78_elf_relocate_section): Likewise. * elf32-rx.c (rx_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-tic6x.c (elf32_tic6x_relocate_section): Likewise. * elf32-tilepro.c (tilepro_elf_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section_r): Likewise. (elf64_alpha_relocate_section): Likewise. * elf64-hppa.c (elf64_hppa_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. * elfnn-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elfxx-tilegx.c (tilegx_elf_relocate_section): Likewise.
2012-05-07 03:27:52 +00:00
rel, 1, relend, howto, 0, contents);
PR 3958 bfd/ * elf-bfd.h (RELOC_FOR_GLOBAL_SYMBOL): No error on relocatable link. (elf_discarded_section): Move.. * bfd-in.h: ..to here. * bfd-in2.h: Regenerate. * elflink.c (elf_link_input_bfd): Don't zap relocs against symbols from discarded sections before relocate_section has done its job. * reloc.c (bfd_generic_get_relocated_section_contents): Handle relocs against symbols from discarded sections. * elf-hppa.h (elf_hppa_howto_table): Set size. Set dst_mask on SECREL32. (elf_hppa_relocate_section): Handle relocatable link after setting sec, sym, h etc. for final link. Squash error messages for relocatable link. Clear section contents for relocs against symbols in discarded sections, and zero reloc. Remove existing zero r_symndx code. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. (bfin_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-m32c.c (m32c_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_check_relocs): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-mep.c (mep_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-mt.c (mt_elf_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-score.c (_bfd_score_elf_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xc16x.c (elf32_xc16x_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf32-xtensa.c (elf_xtensa_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section_r): Likewise. (elf64_alpha_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. * elf32-arm.c (elf32_arm_relocate_section): Always adjust section symbols for relocatable link. Don't use always-zero st_value. (elf_backend_rela_normal): Don't define. * elf32-bfin.c (bfinfdpic_relocate_section): Use RELOC_FOR_GLOBAL_SYMBOL. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Combine SEC_MERGE section symbol adjustments with same for relocatable link. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-m68hc1x.c (m68hc11_get_relocation_value): Move.. (elf32_m68hc11_check_relocs): ..to here. * elf32-score.c (score_elf_final_link_relocate): Remove zero r_symndx code. * elfxx-mips.c (mips_elf_calculate_relocation): Likewise. ld/testsuite/ * ld-elf/linkonce1.d: New. * ld-elf/linkonce1a.s: New. * ld-elf/linkonce1b.s: New. * ld-elf/linkonce2.d: New. * ld-i386/pcrel16abs.d: New. * ld-i386/pcrel16abs.s: New. * ld-i386/i386.exp: Run it.
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if (info->relocatable)
continue;
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r = avr_final_link_relocate (howto, input_bfd, input_section,
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contents, rel, relocation, htab);
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if (r != bfd_reloc_ok)
{
const char * msg = (const char *) NULL;
switch (r)
{
case bfd_reloc_overflow:
r = info->callbacks->reloc_overflow
bfd/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * aoutx.h (aout_link_input_section_std): Pass proper hash entry to linker reloc_overflow callback. (aout_link_input_section_ext): Likewise. (aout_link_reloc_link_order): Likewise. * coff-a29k.c (coff_a29k_relocate_section): Likewise. * coff-alpha.c (alpha_ecoff_get_relocated_section_contents): Likewise. (alpha_relocate_section): Likewise. * coff-arm.c (coff_arm_relocate_section): Likewise. * coff-h8300.c (h8300_reloc16_extra_cases): Likewise. * coff-h8500.c (extra_case): Likewise. * coff-i960.c (coff_i960_relocate_section): Likewise. * coff-mcore.c (coff_mcore_relocate_section): Likewise. * coff-mips.c (mips_relocate_section): Likewise. * coff-or32.c (coff_or32_relocate_section): Likewise. * coff-ppc.c (coff_ppc_relocate_section): Likewise. * coff-rs6000.c (xcoff_ppc_relocate_section): Likewise. * coff-sh.c (sh_relocate_section): Likewise. * coff-tic80.c (coff_tic80_relocate_section): Likewise. * coff-w65.c (w65_reloc16_extra_cases): Likewise. * coff-z8k.c (extra_case): Likewise. * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise. * cofflink.c (_bfd_coff_reloc_link_order): Likewise. (_bfd_coff_generic_relocate_section): Likewise. * ecoff.c (ecoff_reloc_link_order): Likewise. * elf-hppa.h (elf_hppa_relocate_section): Likewise. * elf-m10200.c (mn10200_elf_relocate_section): Likewise. * elf-m10300.c (mn10300_elf_relocate_section): Likewise. * elf32-arm.h (elf32_arm_relocate_section): Likewise. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-cr16c.c (elf32_cr16c_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-crx.c (elf32_crx_relocate_section): Likewise. * elf32-d10v.c (elf32_d10v_relocate_section): Likewise. * elf32-fr30.c (fr30_elf_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-i370.c (i370_elf_relocate_section): Likewise. * elf32-i386.c (elf_i386_relocate_section): Likewise. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-iq2000.c (iq2000_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_relocate_section): Likewise. * elf32-m68k.c (elf_m68k_relocate_section): Likewise. * elf32-mcore.c (mcore_elf_relocate_section): Likewise. * elf32-msp430.c (elf32_msp430_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf64-alpha.c (elf64_alpha_relocate_section): Likewise. * elf64-mmix.c (mmix_elf_relocate_section): Likewise. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. * elf64-s390.c (elf_s390_relocate_section): Likewise. * elf64-sh64.c (sh_elf64_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise. * elflink.c (elf_reloc_link_order): Likewise. * elfxx-ia64.c (elfNN_ia64_relocate_section): Likewise. * elfxx-mips.c (_bfd_mips_elf_relocate_section): Likewise. (_bfd_elf_mips_get_relocated_section_contents): Likewise. * linker.c (_bfd_generic_reloc_link_order): Likewise. * pdp11.c (pdp11_aout_link_input_section): Likewise. (aout_link_reloc_link_order): Likewise. * reloc.c (bfd_generic_get_relocated_section_contents): Likewise. * xcofflink.c (xcoff_reloc_link_order): Likewise. * simple.c (simple_dummy_reloc_overflow): Updated. include/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * bfdlink.h (bfd_link_callbacks): Add a pointer to struct bfd_link_hash_entry to reloc_overflow. ld/ 2004-10-21 H.J. Lu <hongjiu.lu@intel.com> PR 463 * ldmain.c (reloc_overflow): Accept a pointer to struct bfd_link_hash_entry. Report symbol location for relocation overflow.
2004-10-21 15:28:33 +00:00
(info, (h ? &h->root : NULL),
name, howto->name, (bfd_vma) 0,
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input_bfd, input_section, rel->r_offset);
break;
case bfd_reloc_undefined:
r = info->callbacks->undefined_symbol
(info, name, input_bfd, input_section, rel->r_offset, TRUE);
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break;
case bfd_reloc_outofrange:
msg = _("internal error: out of range error");
break;
case bfd_reloc_notsupported:
msg = _("internal error: unsupported relocation error");
break;
case bfd_reloc_dangerous:
msg = _("internal error: dangerous relocation");
break;
default:
msg = _("internal error: unknown error");
break;
}
if (msg)
r = info->callbacks->warning
(info, msg, name, input_bfd, input_section, rel->r_offset);
if (! r)
return FALSE;
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}
}
return TRUE;
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}
/* The final processing done just before writing out a AVR ELF object
file. This gets the AVR architecture right based on the machine
number. */
static void
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bfd_elf_avr_final_write_processing (bfd *abfd,
bfd_boolean linker ATTRIBUTE_UNUSED)
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{
unsigned long val;
switch (bfd_get_mach (abfd))
{
default:
case bfd_mach_avr2:
val = E_AVR_MACH_AVR2;
break;
case bfd_mach_avr1:
val = E_AVR_MACH_AVR1;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
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case bfd_mach_avr25:
val = E_AVR_MACH_AVR25;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
2000-03-27 08:39:14 +00:00
case bfd_mach_avr3:
val = E_AVR_MACH_AVR3;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case bfd_mach_avr31:
val = E_AVR_MACH_AVR31;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case bfd_mach_avr35:
val = E_AVR_MACH_AVR35;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
2000-03-27 08:39:14 +00:00
case bfd_mach_avr4:
val = E_AVR_MACH_AVR4;
break;
case bfd_mach_avr5:
val = E_AVR_MACH_AVR5;
break;
2006-05-24 07:36:12 +00:00
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case bfd_mach_avr51:
val = E_AVR_MACH_AVR51;
break;
2006-05-24 07:36:12 +00:00
case bfd_mach_avr6:
val = E_AVR_MACH_AVR6;
break;
/bfd: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * archures.c: Add AVR XMEGA architecture information. * cpu-avr.c (arch_info_struct): Likewise. * elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise. (elf32_avr_object_p): Likewise. /gas: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (struct avr_opcodes_s): Add opcode field. (AVR_INSN): Change definition to match. (avr_opcodes): Likewise, change to match. (mcu_types): Add XMEGA architecture names and new XMEGA device names. (md_show_usage): Add XMEGA architecture names. (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices. Add support for SPM Z+ instruction. * doc/c-avr.texi: Add documentation for XMEGA architectures and devices. /include/opcode: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA): New instruction set flags. (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA. /ld: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures. (eavrxmega?.c): Likewise. * configure.tgt (targ_extra_emuls): Likewise. * emulparams/avrxmega1.sh: New file. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation): Add avrxmega6, avrxmega7 to list of architectures for no stubs. /opcodes: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-22 18:10:48 +00:00
case bfd_mach_avrxmega1:
val = E_AVR_MACH_XMEGA1;
break;
case bfd_mach_avrxmega2:
val = E_AVR_MACH_XMEGA2;
break;
case bfd_mach_avrxmega3:
val = E_AVR_MACH_XMEGA3;
break;
case bfd_mach_avrxmega4:
val = E_AVR_MACH_XMEGA4;
break;
case bfd_mach_avrxmega5:
val = E_AVR_MACH_XMEGA5;
break;
case bfd_mach_avrxmega6:
val = E_AVR_MACH_XMEGA6;
break;
case bfd_mach_avrxmega7:
val = E_AVR_MACH_XMEGA7;
break;
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
case bfd_mach_avrtiny:
val = E_AVR_MACH_AVRTINY;
break;
2000-03-27 08:39:14 +00:00
}
elf_elfheader (abfd)->e_machine = EM_AVR;
elf_elfheader (abfd)->e_flags &= ~ EF_AVR_MACH;
elf_elfheader (abfd)->e_flags |= val;
}
/* Set the right machine number. */
static bfd_boolean
2006-03-03 15:54:23 +00:00
elf32_avr_object_p (bfd *abfd)
2000-03-27 08:39:14 +00:00
{
unsigned int e_set = bfd_mach_avr2;
2006-03-03 15:54:23 +00:00
if (elf_elfheader (abfd)->e_machine == EM_AVR
|| elf_elfheader (abfd)->e_machine == EM_AVR_OLD)
2000-03-27 08:39:14 +00:00
{
int e_mach = elf_elfheader (abfd)->e_flags & EF_AVR_MACH;
2006-03-03 15:54:23 +00:00
2000-03-27 08:39:14 +00:00
switch (e_mach)
{
default:
case E_AVR_MACH_AVR2:
e_set = bfd_mach_avr2;
break;
case E_AVR_MACH_AVR1:
e_set = bfd_mach_avr1;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case E_AVR_MACH_AVR25:
e_set = bfd_mach_avr25;
break;
2000-03-27 08:39:14 +00:00
case E_AVR_MACH_AVR3:
e_set = bfd_mach_avr3;
break;
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case E_AVR_MACH_AVR31:
e_set = bfd_mach_avr31;
break;
case E_AVR_MACH_AVR35:
e_set = bfd_mach_avr35;
break;
2000-03-27 08:39:14 +00:00
case E_AVR_MACH_AVR4:
e_set = bfd_mach_avr4;
break;
case E_AVR_MACH_AVR5:
e_set = bfd_mach_avr5;
break;
2006-05-24 07:36:12 +00:00
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. bfd/ * archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35, bfd_mach_avr51): New. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51 architectures. Change comments to match architecture comments in GCC. (compatible): Add test for new AVR architectures. * elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51. (elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51. gas/ * config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51 architectures. Reorganize list to put mcu types in correct architectures and to order list same as in GCC. Use new ISA definitions in include/opcode/avr.h. * doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture descriptions. Reorganize descriptions to put mcu types in correct architectures and to order lists same as in GCC. include/ * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. (EF_AVR_MACH): Redefine to 0x7F. * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. (AVR_ISA_AVR3): Redefine. (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, AVR_ISA_AVR6): Define. ld/ * Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o, and eavr51.o. Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c. * Makefile.in: Regenerate. * configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35 and avr51. * emulparams/avr25.sh: New file. * emulparams/avr31.sh: New file. * emulparams/avr35.sh: New file. * emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
case E_AVR_MACH_AVR51:
e_set = bfd_mach_avr51;
break;
2006-05-24 07:36:12 +00:00
case E_AVR_MACH_AVR6:
e_set = bfd_mach_avr6;
break;
/bfd: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * archures.c: Add AVR XMEGA architecture information. * cpu-avr.c (arch_info_struct): Likewise. * elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise. (elf32_avr_object_p): Likewise. /gas: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (struct avr_opcodes_s): Add opcode field. (AVR_INSN): Change definition to match. (avr_opcodes): Likewise, change to match. (mcu_types): Add XMEGA architecture names and new XMEGA device names. (md_show_usage): Add XMEGA architecture names. (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices. Add support for SPM Z+ instruction. * doc/c-avr.texi: Add documentation for XMEGA architectures and devices. /include/opcode: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA): New instruction set flags. (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA. /ld: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures. (eavrxmega?.c): Likewise. * configure.tgt (targ_extra_emuls): Likewise. * emulparams/avrxmega1.sh: New file. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation): Add avrxmega6, avrxmega7 to list of architectures for no stubs. /opcodes: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-22 18:10:48 +00:00
case E_AVR_MACH_XMEGA1:
e_set = bfd_mach_avrxmega1;
break;
case E_AVR_MACH_XMEGA2:
e_set = bfd_mach_avrxmega2;
break;
case E_AVR_MACH_XMEGA3:
e_set = bfd_mach_avrxmega3;
break;
case E_AVR_MACH_XMEGA4:
e_set = bfd_mach_avrxmega4;
break;
case E_AVR_MACH_XMEGA5:
e_set = bfd_mach_avrxmega5;
break;
case E_AVR_MACH_XMEGA6:
e_set = bfd_mach_avrxmega6;
break;
case E_AVR_MACH_XMEGA7:
e_set = bfd_mach_avrxmega7;
break;
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
case E_AVR_MACH_AVRTINY:
e_set = bfd_mach_avrtiny;
break;
2000-03-27 08:39:14 +00:00
}
}
return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
e_set);
}
/* Returns whether the relocation type passed is a diff reloc. */
static bfd_boolean
elf32_avr_is_diff_reloc (Elf_Internal_Rela *irel)
{
return (ELF32_R_TYPE (irel->r_info) == R_AVR_DIFF8
||ELF32_R_TYPE (irel->r_info) == R_AVR_DIFF16
|| ELF32_R_TYPE (irel->r_info) == R_AVR_DIFF32);
}
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
/* Reduce the diff value written in the section by count if the shrinked
insn address happens to fall between the two symbols for which this
diff reloc was emitted. */
static void
elf32_avr_adjust_diff_reloc_value (bfd *abfd,
struct bfd_section *isec,
Elf_Internal_Rela *irel,
bfd_vma symval,
bfd_vma shrinked_insn_address,
int count)
{
unsigned char *reloc_contents = NULL;
unsigned char *isec_contents = elf_section_data (isec)->this_hdr.contents;
if (isec_contents == NULL)
{
if (! bfd_malloc_and_get_section (abfd, isec, &isec_contents))
return;
elf_section_data (isec)->this_hdr.contents = isec_contents;
}
reloc_contents = isec_contents + irel->r_offset;
/* Read value written in object file. */
bfd_vma x = 0;
switch (ELF32_R_TYPE (irel->r_info))
{
case R_AVR_DIFF8:
{
x = *reloc_contents;
break;
}
case R_AVR_DIFF16:
{
x = bfd_get_16 (abfd, reloc_contents);
break;
}
case R_AVR_DIFF32:
{
x = bfd_get_32 (abfd, reloc_contents);
break;
}
default:
{
BFD_FAIL();
}
}
/* For a diff reloc sym1 - sym2 the diff at assembly time (x) is written
into the object file at the reloc offset. sym2's logical value is
symval (<start_of_section>) + reloc addend. Compute the start and end
addresses and check if the shrinked insn falls between sym1 and sym2. */
bfd_vma end_address = symval + irel->r_addend;
bfd_vma start_address = end_address - x;
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
/* Reduce the diff value by count bytes and write it back into section
contents. */
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
if (shrinked_insn_address >= start_address
&& shrinked_insn_address <= end_address)
{
switch (ELF32_R_TYPE (irel->r_info))
{
case R_AVR_DIFF8:
{
*reloc_contents = (x - count);
break;
}
case R_AVR_DIFF16:
{
bfd_put_16 (abfd, (x - count) & 0xFFFF, reloc_contents);
break;
}
case R_AVR_DIFF32:
{
bfd_put_32 (abfd, (x - count) & 0xFFFFFFFF, reloc_contents);
break;
}
default:
{
BFD_FAIL();
}
}
}
}
2006-03-03 15:54:23 +00:00
/* Delete some bytes from a section while changing the size of an instruction.
The parameter "addr" denotes the section-relative offset pointing just
behind the shrinked instruction. "addr+count" point at the first
byte just behind the original unshrinked instruction. */
static bfd_boolean
elf32_avr_relax_delete_bytes (bfd *abfd,
asection *sec,
2006-03-03 15:54:23 +00:00
bfd_vma addr,
int count)
2006-03-03 15:54:23 +00:00
{
Elf_Internal_Shdr *symtab_hdr;
unsigned int sec_shndx;
bfd_byte *contents;
Elf_Internal_Rela *irel, *irelend;
Elf_Internal_Sym *isym;
Elf_Internal_Sym *isymbuf = NULL;
bfd_vma toaddr;
struct elf_link_hash_entry **sym_hashes;
struct elf_link_hash_entry **end_hashes;
unsigned int symcount;
struct avr_relax_info *relax_info;
struct avr_property_record *prop_record = NULL;
2006-03-03 15:54:23 +00:00
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
contents = elf_section_data (sec)->this_hdr.contents;
relax_info = get_avr_relax_info (sec);
2006-03-03 15:54:23 +00:00
toaddr = sec->size;
if (relax_info->records.count > 0)
{
/* There should be no property record within the range of deleted
bytes, however, there might be a property record for ADDR, this is
how we handle alignment directives.
Find the next (if any) property record after the deleted bytes. */
unsigned int i;
for (i = 0; i < relax_info->records.count; ++i)
{
bfd_vma offset = relax_info->records.items [i].offset;
BFD_ASSERT (offset <= addr || offset >= (addr + count));
if (offset >= (addr + count))
{
prop_record = &relax_info->records.items [i];
toaddr = offset;
break;
}
}
}
2006-03-03 15:54:23 +00:00
irel = elf_section_data (sec)->relocs;
irelend = irel + sec->reloc_count;
/* Actually delete the bytes. */
if (toaddr - addr - count > 0)
memmove (contents + addr, contents + addr + count,
(size_t) (toaddr - addr - count));
if (prop_record == NULL)
sec->size -= count;
else
{
/* Use the property record to fill in the bytes we've opened up. */
int fill = 0;
switch (prop_record->type)
{
case RECORD_ORG_AND_FILL:
fill = prop_record->data.org.fill;
/* Fall through. */
case RECORD_ORG:
break;
case RECORD_ALIGN_AND_FILL:
fill = prop_record->data.align.fill;
/* Fall through. */
case RECORD_ALIGN:
prop_record->data.align.preceding_deleted += count;
break;
};
memset (contents + toaddr - count, fill, count);
/* Adjust the TOADDR to avoid moving symbols located at the address
of the property record, which has not moved. */
toaddr -= count;
}
2006-03-03 15:54:23 +00:00
/* Adjust all the reloc addresses. */
2006-03-03 15:54:23 +00:00
for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
{
bfd_vma old_reloc_address;
old_reloc_address = (sec->output_section->vma
+ sec->output_offset + irel->r_offset);
/* Get the new reloc address. */
if ((irel->r_offset > addr
&& irel->r_offset < toaddr))
{
2006-05-24 07:36:12 +00:00
if (debug_relax)
2006-03-03 15:54:23 +00:00
printf ("Relocation at address 0x%x needs to be moved.\n"
"Old section offset: 0x%x, New section offset: 0x%x \n",
(unsigned int) old_reloc_address,
(unsigned int) irel->r_offset,
(unsigned int) ((irel->r_offset) - count));
irel->r_offset -= count;
}
}
2006-03-03 15:54:23 +00:00
/* The reloc's own addresses are now ok. However, we need to readjust
the reloc's addend, i.e. the reloc's value if two conditions are met:
1.) the reloc is relative to a symbol in this section that
is located in front of the shrinked instruction
2006-05-24 07:36:12 +00:00
2.) symbol plus addend end up behind the shrinked instruction.
The most common case where this happens are relocs relative to
the section-start symbol.
2006-05-24 07:36:12 +00:00
This step needs to be done for all of the sections of the bfd. */
{
struct bfd_section *isec;
for (isec = abfd->sections; isec; isec = isec->next)
{
bfd_vma symval;
bfd_vma shrinked_insn_address;
if (isec->reloc_count == 0)
continue;
shrinked_insn_address = (sec->output_section->vma
+ sec->output_offset + addr - count);
irel = elf_section_data (isec)->relocs;
/* PR 12161: Read in the relocs for this section if necessary. */
if (irel == NULL)
irel = _bfd_elf_link_read_relocs (abfd, isec, NULL, NULL, TRUE);
for (irelend = irel + isec->reloc_count;
irel < irelend;
irel++)
{
2006-05-24 07:36:12 +00:00
/* Read this BFD's local symbols if we haven't done
so already. */
if (isymbuf == NULL && symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
return FALSE;
}
/* Get the value of the symbol referred to by the reloc. */
if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
{
/* A local symbol. */
asection *sym_sec;
isym = isymbuf + ELF32_R_SYM (irel->r_info);
sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
symval = isym->st_value;
/* If the reloc is absolute, it will not have
a symbol or section associated with it. */
if (sym_sec == sec)
2006-05-24 07:36:12 +00:00
{
symval += sym_sec->output_section->vma
+ sym_sec->output_offset;
2006-03-03 15:54:23 +00:00
2006-05-24 07:36:12 +00:00
if (debug_relax)
printf ("Checking if the relocation's "
"addend needs corrections.\n"
"Address of anchor symbol: 0x%x \n"
"Address of relocation target: 0x%x \n"
"Address of relaxed insn: 0x%x \n",
(unsigned int) symval,
(unsigned int) (symval + irel->r_addend),
(unsigned int) shrinked_insn_address);
if (symval <= shrinked_insn_address
&& (symval + irel->r_addend) > shrinked_insn_address)
{
if (elf32_avr_is_diff_reloc (irel))
{
elf32_avr_adjust_diff_reloc_value (abfd, isec, irel,
symval,
shrinked_insn_address,
count);
}
irel->r_addend -= count;
2006-05-24 07:36:12 +00:00
if (debug_relax)
printf ("Relocation's addend needed to be fixed \n");
}
2006-03-03 15:54:23 +00:00
}
/* else...Reference symbol is absolute. No adjustment needed. */
2006-05-24 07:36:12 +00:00
}
/* else...Reference symbol is extern. No need for adjusting
the addend. */
2006-05-24 07:36:12 +00:00
}
}
}
2006-03-03 15:54:23 +00:00
/* Adjust the local symbols defined in this section. */
isym = (Elf_Internal_Sym *) symtab_hdr->contents;
/* Fix PR 9841, there may be no local symbols. */
if (isym != NULL)
2006-03-03 15:54:23 +00:00
{
Elf_Internal_Sym *isymend;
isymend = isym + symtab_hdr->sh_info;
for (; isym < isymend; isym++)
{
if (isym->st_shndx == sec_shndx)
{
if (isym->st_value > addr
&& isym->st_value <= toaddr)
isym->st_value -= count;
if (isym->st_value <= addr
&& isym->st_value + isym->st_size > addr)
{
/* If this assert fires then we have a symbol that ends
part way through an instruction. Does that make
sense? */
BFD_ASSERT (isym->st_value + isym->st_size >= addr + count);
isym->st_size -= count;
}
}
}
2006-03-03 15:54:23 +00:00
}
/* Now adjust the global symbols defined in this section. */
symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info);
sym_hashes = elf_sym_hashes (abfd);
end_hashes = sym_hashes + symcount;
for (; sym_hashes < end_hashes; sym_hashes++)
{
struct elf_link_hash_entry *sym_hash = *sym_hashes;
if ((sym_hash->root.type == bfd_link_hash_defined
|| sym_hash->root.type == bfd_link_hash_defweak)
&& sym_hash->root.u.def.section == sec)
2006-03-03 15:54:23 +00:00
{
if (sym_hash->root.u.def.value > addr
&& sym_hash->root.u.def.value <= toaddr)
sym_hash->root.u.def.value -= count;
if (sym_hash->root.u.def.value <= addr
&& (sym_hash->root.u.def.value + sym_hash->size > addr))
{
/* If this assert fires then we have a symbol that ends
part way through an instruction. Does that make
sense? */
BFD_ASSERT (sym_hash->root.u.def.value + sym_hash->size
>= addr + count);
sym_hash->size -= count;
}
2006-03-03 15:54:23 +00:00
}
}
return TRUE;
}
static Elf_Internal_Sym *
retrieve_local_syms (bfd *input_bfd)
{
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Sym *isymbuf;
size_t locsymcount;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
locsymcount = symtab_hdr->sh_info;
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL && locsymcount != 0)
isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, locsymcount, 0,
NULL, NULL, NULL);
/* Save the symbols for this input file so they won't be read again. */
if (isymbuf && isymbuf != (Elf_Internal_Sym *) symtab_hdr->contents)
symtab_hdr->contents = (unsigned char *) isymbuf;
return isymbuf;
}
/* Get the input section for a given symbol index.
If the symbol is:
. a section symbol, return the section;
. a common symbol, return the common section;
. an undefined symbol, return the undefined section;
. an indirect symbol, follow the links;
. an absolute value, return the absolute section. */
static asection *
get_elf_r_symndx_section (bfd *abfd, unsigned long r_symndx)
{
Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
asection *target_sec = NULL;
if (r_symndx < symtab_hdr->sh_info)
{
Elf_Internal_Sym *isymbuf;
unsigned int section_index;
isymbuf = retrieve_local_syms (abfd);
section_index = isymbuf[r_symndx].st_shndx;
if (section_index == SHN_UNDEF)
target_sec = bfd_und_section_ptr;
else if (section_index == SHN_ABS)
target_sec = bfd_abs_section_ptr;
else if (section_index == SHN_COMMON)
target_sec = bfd_com_section_ptr;
else
target_sec = bfd_section_from_elf_index (abfd, section_index);
}
else
{
unsigned long indx = r_symndx - symtab_hdr->sh_info;
struct elf_link_hash_entry *h = elf_sym_hashes (abfd)[indx];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
switch (h->root.type)
{
case bfd_link_hash_defined:
case bfd_link_hash_defweak:
target_sec = h->root.u.def.section;
break;
case bfd_link_hash_common:
target_sec = bfd_com_section_ptr;
break;
case bfd_link_hash_undefined:
case bfd_link_hash_undefweak:
target_sec = bfd_und_section_ptr;
break;
default: /* New indirect warning. */
target_sec = bfd_und_section_ptr;
break;
}
}
return target_sec;
}
/* Get the section-relative offset for a symbol number. */
static bfd_vma
get_elf_r_symndx_offset (bfd *abfd, unsigned long r_symndx)
{
Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
bfd_vma offset = 0;
if (r_symndx < symtab_hdr->sh_info)
{
Elf_Internal_Sym *isymbuf;
isymbuf = retrieve_local_syms (abfd);
offset = isymbuf[r_symndx].st_value;
}
else
{
unsigned long indx = r_symndx - symtab_hdr->sh_info;
struct elf_link_hash_entry *h =
elf_sym_hashes (abfd)[indx];
while (h->root.type == bfd_link_hash_indirect
|| h->root.type == bfd_link_hash_warning)
h = (struct elf_link_hash_entry *) h->root.u.i.link;
if (h->root.type == bfd_link_hash_defined
|| h->root.type == bfd_link_hash_defweak)
offset = h->root.u.def.value;
}
return offset;
}
/* Iterate over the property records in R_LIST, and copy each record into
the list of records within the relaxation information for the section to
which the record applies. */
static void
avr_elf32_assign_records_to_sections (struct avr_property_record_list *r_list)
{
unsigned int i;
for (i = 0; i < r_list->record_count; ++i)
{
struct avr_relax_info *relax_info;
relax_info = get_avr_relax_info (r_list->records [i].section);
BFD_ASSERT (relax_info != NULL);
if (relax_info->records.count
== relax_info->records.allocated)
{
/* Allocate more space. */
bfd_size_type size;
relax_info->records.allocated += 10;
size = (sizeof (struct avr_property_record)
* relax_info->records.allocated);
relax_info->records.items
= bfd_realloc (relax_info->records.items, size);
}
memcpy (&relax_info->records.items [relax_info->records.count],
&r_list->records [i],
sizeof (struct avr_property_record));
relax_info->records.count++;
}
}
/* Compare two STRUCT AVR_PROPERTY_RECORD in AP and BP, used as the
ordering callback from QSORT. */
static int
avr_property_record_compare (const void *ap, const void *bp)
{
const struct avr_property_record *a
= (struct avr_property_record *) ap;
const struct avr_property_record *b
= (struct avr_property_record *) bp;
if (a->offset != b->offset)
return (a->offset - b->offset);
if (a->section != b->section)
return (bfd_get_section_vma (a->section->owner, a->section)
- bfd_get_section_vma (b->section->owner, b->section));
return (a->type - b->type);
}
/* Load all of the avr property sections from all of the bfd objects
referenced from LINK_INFO. All of the records within each property
section are assigned to the STRUCT AVR_RELAX_INFO within the section
specific data of the appropriate section. */
static void
avr_load_all_property_sections (struct bfd_link_info *link_info)
{
bfd *abfd;
asection *sec;
/* Initialize the per-section relaxation info. */
for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
for (sec = abfd->sections; sec != NULL; sec = sec->next)
{
init_avr_relax_info (sec);
}
/* Load the descriptor tables from .avr.prop sections. */
for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
{
struct avr_property_record_list *r_list;
r_list = avr_elf32_load_property_records (abfd);
if (r_list != NULL)
avr_elf32_assign_records_to_sections (r_list);
free (r_list);
}
/* Now, for every section, ensure that the descriptor list in the
relaxation data is sorted by ascending offset within the section. */
for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
for (sec = abfd->sections; sec != NULL; sec = sec->next)
{
struct avr_relax_info *relax_info = get_avr_relax_info (sec);
if (relax_info && relax_info->records.count > 0)
{
unsigned int i;
qsort (relax_info->records.items,
relax_info->records.count,
sizeof (struct avr_property_record),
avr_property_record_compare);
/* For debug purposes, list all the descriptors. */
for (i = 0; i < relax_info->records.count; ++i)
{
switch (relax_info->records.items [i].type)
{
case RECORD_ORG:
break;
case RECORD_ORG_AND_FILL:
break;
case RECORD_ALIGN:
break;
case RECORD_ALIGN_AND_FILL:
break;
};
}
}
}
}
/* This function handles relaxing for the avr.
Many important relaxing opportunities within functions are already
realized by the compiler itself.
Here we try to replace call (4 bytes) -> rcall (2 bytes)
2006-03-03 15:54:23 +00:00
and jump -> rjmp (safes also 2 bytes).
As well we now optimize seqences of
- call/rcall function
- ret
to yield
- jmp/rjmp function
- ret
. In case that within a sequence
- jmp/rjmp label
- ret
the ret could no longer be reached it is optimized away. In order
to check if the ret is no longer needed, it is checked that the ret's address
is not the target of a branch or jump within the same section, it is checked
that there is no skip instruction before the jmp/rjmp and that there
is no local or global label place at the address of the ret.
2006-03-03 15:54:23 +00:00
We refrain from relaxing within sections ".vectors" and
2006-03-03 15:54:23 +00:00
".jumptables" in order to maintain the position of the instructions.
There, however, we substitute jmp/call by a sequence rjmp,nop/rcall,nop
2006-03-03 15:54:23 +00:00
if possible. (In future one could possibly use the space of the nop
for the first instruction of the irq service function.
The .jumptables sections is meant to be used for a future tablejump variant
for the devices with 3-byte program counter where the table itself
2006-03-03 15:54:23 +00:00
contains 4-byte jump instructions whose relative offset must not
be changed. */
2006-03-03 15:54:23 +00:00
2006-05-24 07:36:12 +00:00
static bfd_boolean
2006-03-03 15:54:23 +00:00
elf32_avr_relax_section (bfd *abfd,
asection *sec,
struct bfd_link_info *link_info,
bfd_boolean *again)
{
Elf_Internal_Shdr *symtab_hdr;
Elf_Internal_Rela *internal_relocs;
Elf_Internal_Rela *irel, *irelend;
bfd_byte *contents = NULL;
Elf_Internal_Sym *isymbuf = NULL;
2006-05-24 07:36:12 +00:00
struct elf32_avr_link_hash_table *htab;
static bfd_boolean relaxation_initialised = FALSE;
if (!relaxation_initialised)
{
relaxation_initialised = TRUE;
/* Load entries from the .avr.prop sections. */
avr_load_all_property_sections (link_info);
}
2006-05-24 07:36:12 +00:00
/* If 'shrinkable' is FALSE, do not shrink by deleting bytes while
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 20:03:55 +00:00
relaxing. Such shrinking can cause issues for the sections such
as .vectors and .jumptables. Instead the unused bytes should be
filled with nop instructions. */
bfd_boolean shrinkable = TRUE;
if (!strcmp (sec->name,".vectors")
|| !strcmp (sec->name,".jumptables"))
shrinkable = FALSE;
if (link_info->relocatable)
(*link_info->callbacks->einfo)
(_("%P%F: --relax and -r may not be used together\n"));
2006-05-24 07:36:12 +00:00
htab = avr_link_hash_table (link_info);
if (htab == NULL)
return FALSE;
/* Assume nothing changes. */
*again = FALSE;
2006-05-24 07:36:12 +00:00
if ((!htab->no_stubs) && (sec == htab->stub_sec))
{
/* We are just relaxing the stub section.
Let's calculate the size needed again. */
bfd_size_type last_estimated_stub_section_size = htab->stub_sec->size;
if (debug_relax)
printf ("Relaxing the stub section. Size prior to this pass: %i\n",
(int) last_estimated_stub_section_size);
elf32_avr_size_stubs (htab->stub_sec->output_section->owner,
link_info, FALSE);
/* Check if the number of trampolines changed. */
if (last_estimated_stub_section_size != htab->stub_sec->size)
*again = TRUE;
if (debug_relax)
printf ("Size of stub section after this pass: %i\n",
(int) htab->stub_sec->size);
return TRUE;
}
/* We don't have to do anything for a relocatable link, if
this section does not have relocs, or if this is not a
code section. */
if (link_info->relocatable
|| (sec->flags & SEC_RELOC) == 0
|| sec->reloc_count == 0
|| (sec->flags & SEC_CODE) == 0)
return TRUE;
2006-03-03 15:54:23 +00:00
/* Check if the object file to relax uses internal symbols so that we
could fix up the relocations. */
if (!(elf_elfheader (abfd)->e_flags & EF_AVR_LINKRELAX_PREPARED))
return TRUE;
symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
/* Get a copy of the native relocations. */
internal_relocs = (_bfd_elf_link_read_relocs
2006-03-03 15:54:23 +00:00
(abfd, sec, NULL, NULL, link_info->keep_memory));
if (internal_relocs == NULL)
goto error_return;
/* Walk through the relocs looking for relaxing opportunities. */
irelend = internal_relocs + sec->reloc_count;
for (irel = internal_relocs; irel < irelend; irel++)
{
bfd_vma symval;
2006-03-03 15:54:23 +00:00
if ( ELF32_R_TYPE (irel->r_info) != R_AVR_13_PCREL
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
&& ELF32_R_TYPE (irel->r_info) != R_AVR_7_PCREL
&& ELF32_R_TYPE (irel->r_info) != R_AVR_CALL)
continue;
2006-03-03 15:54:23 +00:00
/* Get the section contents if we haven't done so already. */
if (contents == NULL)
{
/* Get cached copy if it exists. */
if (elf_section_data (sec)->this_hdr.contents != NULL)
contents = elf_section_data (sec)->this_hdr.contents;
else
{
/* Go get them off disk. */
2006-03-03 15:54:23 +00:00
if (! bfd_malloc_and_get_section (abfd, sec, &contents))
goto error_return;
}
}
/* Read this BFD's local symbols if we haven't done so already. */
if (isymbuf == NULL && symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
goto error_return;
}
/* Get the value of the symbol referred to by the reloc. */
if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
{
/* A local symbol. */
Elf_Internal_Sym *isym;
asection *sym_sec;
isym = isymbuf + ELF32_R_SYM (irel->r_info);
sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
symval = isym->st_value;
/* If the reloc is absolute, it will not have
a symbol or section associated with it. */
if (sym_sec)
symval += sym_sec->output_section->vma
+ sym_sec->output_offset;
}
else
{
unsigned long indx;
struct elf_link_hash_entry *h;
/* An external symbol. */
indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
h = elf_sym_hashes (abfd)[indx];
BFD_ASSERT (h != NULL);
if (h->root.type != bfd_link_hash_defined
&& h->root.type != bfd_link_hash_defweak)
2006-03-03 15:54:23 +00:00
/* This appears to be a reference to an undefined
symbol. Just ignore it--it will be caught by the
regular reloc processing. */
continue;
symval = (h->root.u.def.value
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
}
/* For simplicity of coding, we are going to modify the section
contents, the section relocs, and the BFD symbol table. We
must tell the rest of the code not to free up this
information. It would be possible to instead create a table
of changes which have to be made, as is done in coff-mips.c;
that would be more work, but would require less memory when
the linker is run. */
switch (ELF32_R_TYPE (irel->r_info))
{
/* Try to turn a 22-bit absolute call/jump into an 13-bit
pc-relative rcall/rjmp. */
case R_AVR_CALL:
{
bfd_vma value = symval + irel->r_addend;
bfd_vma dot, gap;
int distance_short_enough = 0;
/* Get the address of this instruction. */
dot = (sec->output_section->vma
+ sec->output_offset + irel->r_offset);
/* Compute the distance from this insn to the branch target. */
gap = value - dot;
/* Check if the gap falls in the range that can be accommodated
in 13bits signed (It is 12bits when encoded, as we deal with
word addressing). */
if (!shrinkable && ((int) gap >= -4096 && (int) gap <= 4095))
distance_short_enough = 1;
/* If shrinkable, then we can check for a range of distance which
is two bytes farther on both the directions because the call
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 20:03:55 +00:00
or jump target will be closer by two bytes after the
relaxation. */
else if (shrinkable && ((int) gap >= -4094 && (int) gap <= 4097))
distance_short_enough = 1;
/* Here we handle the wrap-around case. E.g. for a 16k device
2006-03-03 15:54:23 +00:00
we could use a rjmp to jump from address 0x100 to 0x3d00!
In order to make this work properly, we need to fill the
vaiable avr_pc_wrap_around with the appropriate value.
I.e. 0x4000 for a 16k device. */
{
/* Shrinking the code size makes the gaps larger in the
case of wrap-arounds. So we use a heuristical safety
margin to avoid that during relax the distance gets
again too large for the short jumps. Let's assume
a typical code-size reduction due to relax for a
16k device of 600 bytes. So let's use twice the
typical value as safety margin. */
int rgap;
int safety_margin;
int assumed_shrink = 600;
if (avr_pc_wrap_around > 0x4000)
assumed_shrink = 900;
safety_margin = 2 * assumed_shrink;
rgap = avr_relative_distance_considering_wrap_around (gap);
if (rgap >= (-4092 + safety_margin)
&& rgap <= (4094 - safety_margin))
distance_short_enough = 1;
2006-03-03 15:54:23 +00:00
}
if (distance_short_enough)
{
unsigned char code_msb;
unsigned char code_lsb;
2006-05-24 07:36:12 +00:00
if (debug_relax)
printf ("shrinking jump/call instruction at address 0x%x"
" in section %s\n\n",
(int) dot, sec->name);
/* Note that we've changed the relocs, section contents,
etc. */
elf_section_data (sec)->relocs = internal_relocs;
elf_section_data (sec)->this_hdr.contents = contents;
symtab_hdr->contents = (unsigned char *) isymbuf;
/* Get the instruction code for relaxing. */
code_lsb = bfd_get_8 (abfd, contents + irel->r_offset);
code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1);
/* Mask out the relocation bits. */
code_msb &= 0x94;
code_lsb &= 0x0E;
if (code_msb == 0x94 && code_lsb == 0x0E)
{
/* we are changing call -> rcall . */
bfd_put_8 (abfd, 0x00, contents + irel->r_offset);
bfd_put_8 (abfd, 0xD0, contents + irel->r_offset + 1);
}
else if (code_msb == 0x94 && code_lsb == 0x0C)
{
/* we are changeing jump -> rjmp. */
bfd_put_8 (abfd, 0x00, contents + irel->r_offset);
bfd_put_8 (abfd, 0xC0, contents + irel->r_offset + 1);
}
2006-03-03 15:54:23 +00:00
else
abort ();
/* Fix the relocation's type. */
irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
R_AVR_13_PCREL);
/* We should not modify the ordering if 'shrinkable' is
Remove trailing white spaces in bfd * aout0.c: Remove trailing white spaces. * archive.c: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd-in2.h: Likewise. * coff-alpha.c: Likewise. * coff-i860.c: Likewise. * coff-mips.c: Likewise. * coff-ppc.c: Likewise. * coff-tic80.c: Likewise. * coff-x86_64.c: Likewise. * coff-z80.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * compress.c: Likewise. * corefile.c: Likewise. * cpu-arm.c: Likewise. * cpu-avr.c: Likewise. * cpu-bfin.c: Likewise. * cpu-cr16.c: Likewise. * cpu-cr16c.c: Likewise. * cpu-crx.c: Likewise. * cpu-h8300.c: Likewise. * cpu-i386.c: Likewise. * cpu-lm32.c: Likewise. * cpu-m68k.c: Likewise. * cpu-moxie.c: Likewise. * cpu-msp430.c: Likewise. * cpu-sh.c: Likewise. * cpu-xc16x.c: Likewise. * dwarf2.c: Likewise. * ecofflink.c: Likewise. * ecoffswap.h: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-vxworks.c: Likewise. * elf32-avr.c: Likewise. * elf32-avr.h: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i860.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.h: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-v850.c: Likewise. * elf32-xc16x.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * ieee.c: Likewise. * libcoff.h: Likewise. * libpei.h: Likewise. * libxcoff.h: Likewise. * linker.c: Likewise. * mach-o-i386.c: Likewise. * mach-o-target.c: Likewise. * mach-o.c: Likewise. * mach-o.h: Likewise. * mmo.c: Likewise. * opncls.c: Likewise. * pdp11.c: Likewise. * pe-x86_64.c: Likewise. * peXXigen.c: Likewise. * pef-traceback.h: Likewise. * pei-x86_64.c: Likewise. * peicode.h: Likewise. * plugin.c: Likewise. * reloc.c: Likewise. * riscix.c: Likewise. * section.c: Likewise. * som.c: Likewise. * syms.c: Likewise. * tekhex.c: Likewise. * ticoff.h: Likewise. * vaxbsd.c: Likewise. * xcofflink.c: Likewise. * xtensa-isa.c: Likewise.
2013-01-10 20:03:55 +00:00
FALSE. */
if (!shrinkable)
{
/* Let's insert a nop. */
bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 2);
bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 3);
}
else
{
/* Delete two bytes of data. */
if (!elf32_avr_relax_delete_bytes (abfd, sec,
irel->r_offset + 2, 2))
goto error_return;
/* That will change things, so, we should relax again.
Note that this is not required, and it may be slow. */
*again = TRUE;
}
}
}
2006-03-03 15:54:23 +00:00
default:
{
unsigned char code_msb;
unsigned char code_lsb;
bfd_vma dot;
code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1);
code_lsb = bfd_get_8 (abfd, contents + irel->r_offset + 0);
/* Get the address of this instruction. */
dot = (sec->output_section->vma
+ sec->output_offset + irel->r_offset);
2006-03-03 15:54:23 +00:00
/* Here we look for rcall/ret or call/ret sequences that could be
2006-05-24 07:36:12 +00:00
safely replaced by rjmp/ret or jmp/ret. */
if (((code_msb & 0xf0) == 0xd0)
&& avr_replace_call_ret_sequences)
{
/* This insn is a rcall. */
unsigned char next_insn_msb = 0;
unsigned char next_insn_lsb = 0;
if (irel->r_offset + 3 < sec->size)
{
2006-03-03 15:54:23 +00:00
next_insn_msb =
bfd_get_8 (abfd, contents + irel->r_offset + 3);
2006-03-03 15:54:23 +00:00
next_insn_lsb =
bfd_get_8 (abfd, contents + irel->r_offset + 2);
}
2006-03-03 15:54:23 +00:00
if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
{
/* The next insn is a ret. We now convert the rcall insn
into a rjmp instruction. */
code_msb &= 0xef;
bfd_put_8 (abfd, code_msb, contents + irel->r_offset + 1);
2006-05-24 07:36:12 +00:00
if (debug_relax)
printf ("converted rcall/ret sequence at address 0x%x"
" into rjmp/ret sequence. Section is %s\n\n",
(int) dot, sec->name);
*again = TRUE;
break;
}
}
else if ((0x94 == (code_msb & 0xfe))
2006-05-24 07:36:12 +00:00
&& (0x0e == (code_lsb & 0x0e))
&& avr_replace_call_ret_sequences)
{
/* This insn is a call. */
unsigned char next_insn_msb = 0;
unsigned char next_insn_lsb = 0;
if (irel->r_offset + 5 < sec->size)
{
next_insn_msb =
bfd_get_8 (abfd, contents + irel->r_offset + 5);
next_insn_lsb =
bfd_get_8 (abfd, contents + irel->r_offset + 4);
}
2006-03-03 15:54:23 +00:00
if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
{
/* The next insn is a ret. We now convert the call insn
into a jmp instruction. */
code_lsb &= 0xfd;
bfd_put_8 (abfd, code_lsb, contents + irel->r_offset);
2006-05-24 07:36:12 +00:00
if (debug_relax)
printf ("converted call/ret sequence at address 0x%x"
" into jmp/ret sequence. Section is %s\n\n",
(int) dot, sec->name);
*again = TRUE;
break;
}
}
2006-03-03 15:54:23 +00:00
else if ((0xc0 == (code_msb & 0xf0))
|| ((0x94 == (code_msb & 0xfe))
&& (0x0c == (code_lsb & 0x0e))))
{
2006-03-03 15:54:23 +00:00
/* This insn is a rjmp or a jmp. */
unsigned char next_insn_msb = 0;
unsigned char next_insn_lsb = 0;
int insn_size;
if (0xc0 == (code_msb & 0xf0))
insn_size = 2; /* rjmp insn */
else
insn_size = 4; /* jmp insn */
if (irel->r_offset + insn_size + 1 < sec->size)
{
2006-03-03 15:54:23 +00:00
next_insn_msb =
bfd_get_8 (abfd, contents + irel->r_offset
+ insn_size + 1);
2006-03-03 15:54:23 +00:00
next_insn_lsb =
bfd_get_8 (abfd, contents + irel->r_offset
+ insn_size);
}
if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb))
{
/* The next insn is a ret. We possibly could delete
2011-06-02 13:43:24 +00:00
this ret. First we need to check for preceding
sbis/sbic/sbrs or cpse "skip" instructions. */
2011-06-02 13:43:24 +00:00
int there_is_preceding_non_skip_insn = 1;
bfd_vma address_of_ret;
address_of_ret = dot + insn_size;
2006-05-24 07:36:12 +00:00
if (debug_relax && (insn_size == 2))
2006-03-03 15:54:23 +00:00
printf ("found rjmp / ret sequence at address 0x%x\n",
(int) dot);
2006-05-24 07:36:12 +00:00
if (debug_relax && (insn_size == 4))
2006-03-03 15:54:23 +00:00
printf ("found jmp / ret sequence at address 0x%x\n",
(int) dot);
2011-06-02 13:43:24 +00:00
/* We have to make sure that there is a preceding insn. */
if (irel->r_offset >= 2)
{
2011-06-02 13:43:24 +00:00
unsigned char preceding_msb;
unsigned char preceding_lsb;
preceding_msb =
bfd_get_8 (abfd, contents + irel->r_offset - 1);
2011-06-02 13:43:24 +00:00
preceding_lsb =
bfd_get_8 (abfd, contents + irel->r_offset - 2);
/* sbic. */
2011-06-02 13:43:24 +00:00
if (0x99 == preceding_msb)
there_is_preceding_non_skip_insn = 0;
/* sbis. */
2011-06-02 13:43:24 +00:00
if (0x9b == preceding_msb)
there_is_preceding_non_skip_insn = 0;
/* sbrc */
2011-06-02 13:43:24 +00:00
if ((0xfc == (preceding_msb & 0xfe)
&& (0x00 == (preceding_lsb & 0x08))))
there_is_preceding_non_skip_insn = 0;
2006-03-03 15:54:23 +00:00
/* sbrs */
2011-06-02 13:43:24 +00:00
if ((0xfe == (preceding_msb & 0xfe)
&& (0x00 == (preceding_lsb & 0x08))))
there_is_preceding_non_skip_insn = 0;
2006-03-03 15:54:23 +00:00
/* cpse */
2011-06-02 13:43:24 +00:00
if (0x10 == (preceding_msb & 0xfc))
there_is_preceding_non_skip_insn = 0;
2006-03-03 15:54:23 +00:00
2011-06-02 13:43:24 +00:00
if (there_is_preceding_non_skip_insn == 0)
2006-05-24 07:36:12 +00:00
if (debug_relax)
2011-06-02 13:43:24 +00:00
printf ("preceding skip insn prevents deletion of"
" ret insn at Addy 0x%x in section %s\n",
(int) dot + 2, sec->name);
}
else
{
/* There is no previous instruction. */
2011-06-02 13:43:24 +00:00
there_is_preceding_non_skip_insn = 0;
2006-03-03 15:54:23 +00:00
}
2011-06-02 13:43:24 +00:00
if (there_is_preceding_non_skip_insn)
{
/* We now only have to make sure that there is no
local label defined at the address of the ret
instruction and that there is no local relocation
in this section pointing to the ret. */
int deleting_ret_is_safe = 1;
2006-03-03 15:54:23 +00:00
unsigned int section_offset_of_ret_insn =
irel->r_offset + insn_size;
Elf_Internal_Sym *isym, *isymend;
unsigned int sec_shndx;
struct bfd_section *isec;
2006-03-03 15:54:23 +00:00
sec_shndx =
_bfd_elf_section_from_bfd_section (abfd, sec);
/* Check for local symbols. */
isym = (Elf_Internal_Sym *) symtab_hdr->contents;
isymend = isym + symtab_hdr->sh_info;
/* PR 6019: There may not be any local symbols. */
for (; isym != NULL && isym < isymend; isym++)
{
if (isym->st_value == section_offset_of_ret_insn
&& isym->st_shndx == sec_shndx)
{
deleting_ret_is_safe = 0;
if (debug_relax)
printf ("local label prevents deletion of ret "
"insn at address 0x%x\n",
(int) dot + insn_size);
}
}
/* Now check for global symbols. */
{
int symcount;
struct elf_link_hash_entry **sym_hashes;
struct elf_link_hash_entry **end_hashes;
symcount = (symtab_hdr->sh_size
/ sizeof (Elf32_External_Sym)
- symtab_hdr->sh_info);
sym_hashes = elf_sym_hashes (abfd);
end_hashes = sym_hashes + symcount;
for (; sym_hashes < end_hashes; sym_hashes++)
{
struct elf_link_hash_entry *sym_hash =
*sym_hashes;
if ((sym_hash->root.type == bfd_link_hash_defined
|| sym_hash->root.type ==
2006-03-03 15:54:23 +00:00
bfd_link_hash_defweak)
&& sym_hash->root.u.def.section == sec
&& sym_hash->root.u.def.value == section_offset_of_ret_insn)
{
deleting_ret_is_safe = 0;
if (debug_relax)
printf ("global label prevents deletion of "
"ret insn at address 0x%x\n",
(int) dot + insn_size);
}
}
}
/* Now we check for relocations pointing to ret. */
for (isec = abfd->sections; isec && deleting_ret_is_safe; isec = isec->next)
{
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
Add support for the AVR Tiny series of microcontrollers. * archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-07-01 09:20:17 +00:00
rel = elf_section_data (isec)->relocs;
if (rel == NULL)
rel = _bfd_elf_link_read_relocs (abfd, isec, NULL, NULL, TRUE);
relend = rel + isec->reloc_count;
for (; rel && rel < relend; rel++)
{
bfd_vma reloc_target = 0;
/* Read this BFD's local symbols if we haven't
done so already. */
if (isymbuf == NULL && symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *)
symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms
(abfd,
symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
break;
}
/* Get the value of the symbol referred to
by the reloc. */
if (ELF32_R_SYM (rel->r_info)
< symtab_hdr->sh_info)
{
/* A local symbol. */
asection *sym_sec;
isym = isymbuf
+ ELF32_R_SYM (rel->r_info);
sym_sec = bfd_section_from_elf_index
(abfd, isym->st_shndx);
symval = isym->st_value;
/* If the reloc is absolute, it will not
have a symbol or section associated
with it. */
if (sym_sec)
{
symval +=
sym_sec->output_section->vma
+ sym_sec->output_offset;
reloc_target = symval + rel->r_addend;
}
else
{
reloc_target = symval + rel->r_addend;
/* Reference symbol is absolute. */
}
}
/* else ... reference symbol is extern. */
if (address_of_ret == reloc_target)
{
deleting_ret_is_safe = 0;
if (debug_relax)
printf ("ret from "
"rjmp/jmp ret sequence at address"
" 0x%x could not be deleted. ret"
" is target of a relocation.\n",
(int) address_of_ret);
break;
}
}
}
if (deleting_ret_is_safe)
{
if (debug_relax)
printf ("unreachable ret instruction "
"at address 0x%x deleted.\n",
(int) dot + insn_size);
/* Delete two bytes of data. */
if (!elf32_avr_relax_delete_bytes (abfd, sec,
irel->r_offset + insn_size, 2))
goto error_return;
/* That will change things, so, we should relax
again. Note that this is not required, and it
may be slow. */
*again = TRUE;
break;
}
}
2006-03-03 15:54:23 +00:00
}
}
break;
}
}
}
if (!*again)
{
/* Look through all the property records in this section to see if
there's any alignment records that can be moved. */
struct avr_relax_info *relax_info;
relax_info = get_avr_relax_info (sec);
if (relax_info->records.count > 0)
{
unsigned int i;
for (i = 0; i < relax_info->records.count; ++i)
{
switch (relax_info->records.items [i].type)
{
case RECORD_ORG:
case RECORD_ORG_AND_FILL:
break;
case RECORD_ALIGN:
case RECORD_ALIGN_AND_FILL:
{
struct avr_property_record *record;
unsigned long bytes_to_align;
int count = 0;
/* Look for alignment directives that have had enough
bytes deleted before them, such that the directive
can be moved backwards and still maintain the
required alignment. */
record = &relax_info->records.items [i];
bytes_to_align
= (unsigned long) (1 << record->data.align.bytes);
while (record->data.align.preceding_deleted >=
bytes_to_align)
{
record->data.align.preceding_deleted
-= bytes_to_align;
count += bytes_to_align;
}
if (count > 0)
{
bfd_vma addr = record->offset;
/* We can delete COUNT bytes and this alignment
directive will still be correctly aligned.
First move the alignment directive, then delete
the bytes. */
record->offset -= count;
elf32_avr_relax_delete_bytes (abfd, sec,
addr - count,
count);
*again = TRUE;
}
}
break;
}
}
}
}
if (contents != NULL
&& elf_section_data (sec)->this_hdr.contents != contents)
{
if (! link_info->keep_memory)
free (contents);
else
{
/* Cache the section contents for elf_link_input_bfd. */
elf_section_data (sec)->this_hdr.contents = contents;
}
}
if (internal_relocs != NULL
&& elf_section_data (sec)->relocs != internal_relocs)
free (internal_relocs);
return TRUE;
error_return:
if (isymbuf != NULL
&& symtab_hdr->contents != (unsigned char *) isymbuf)
free (isymbuf);
if (contents != NULL
&& elf_section_data (sec)->this_hdr.contents != contents)
free (contents);
if (internal_relocs != NULL
&& elf_section_data (sec)->relocs != internal_relocs)
free (internal_relocs);
2006-03-03 15:54:23 +00:00
return FALSE;
}
/* This is a version of bfd_generic_get_relocated_section_contents
2006-03-03 15:54:23 +00:00
which uses elf32_avr_relocate_section.
2006-03-03 15:54:23 +00:00
For avr it's essentially a cut and paste taken from the H8300 port.
The author of the relaxation support patch for avr had absolutely no
2006-03-03 15:54:23 +00:00
clue what is happening here but found out that this part of the code
seems to be important. */
static bfd_byte *
elf32_avr_get_relocated_section_contents (bfd *output_bfd,
struct bfd_link_info *link_info,
struct bfd_link_order *link_order,
bfd_byte *data,
bfd_boolean relocatable,
asymbol **symbols)
{
Elf_Internal_Shdr *symtab_hdr;
asection *input_section = link_order->u.indirect.section;
bfd *input_bfd = input_section->owner;
asection **sections = NULL;
Elf_Internal_Rela *internal_relocs = NULL;
Elf_Internal_Sym *isymbuf = NULL;
/* We only need to handle the case of relaxing, or of having a
particular set of section contents, specially. */
if (relocatable
|| elf_section_data (input_section)->this_hdr.contents == NULL)
return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
link_order, data,
relocatable,
symbols);
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
memcpy (data, elf_section_data (input_section)->this_hdr.contents,
(size_t) input_section->size);
if ((input_section->flags & SEC_RELOC) != 0
&& input_section->reloc_count > 0)
{
asection **secpp;
Elf_Internal_Sym *isym, *isymend;
bfd_size_type amt;
internal_relocs = (_bfd_elf_link_read_relocs
2006-03-03 15:54:23 +00:00
(input_bfd, input_section, NULL, NULL, FALSE));
if (internal_relocs == NULL)
goto error_return;
if (symtab_hdr->sh_info != 0)
{
isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
if (isymbuf == NULL)
isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
if (isymbuf == NULL)
goto error_return;
}
amt = symtab_hdr->sh_info;
amt *= sizeof (asection *);
2006-03-03 15:54:23 +00:00
sections = bfd_malloc (amt);
if (sections == NULL && amt != 0)
goto error_return;
isymend = isymbuf + symtab_hdr->sh_info;
for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
{
asection *isec;
if (isym->st_shndx == SHN_UNDEF)
isec = bfd_und_section_ptr;
else if (isym->st_shndx == SHN_ABS)
isec = bfd_abs_section_ptr;
else if (isym->st_shndx == SHN_COMMON)
isec = bfd_com_section_ptr;
else
isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
*secpp = isec;
}
if (! elf32_avr_relocate_section (output_bfd, link_info, input_bfd,
input_section, data, internal_relocs,
isymbuf, sections))
goto error_return;
if (sections != NULL)
free (sections);
if (isymbuf != NULL
&& symtab_hdr->contents != (unsigned char *) isymbuf)
free (isymbuf);
if (elf_section_data (input_section)->relocs != internal_relocs)
free (internal_relocs);
}
return data;
error_return:
if (sections != NULL)
free (sections);
if (isymbuf != NULL
&& symtab_hdr->contents != (unsigned char *) isymbuf)
free (isymbuf);
if (internal_relocs != NULL
&& elf_section_data (input_section)->relocs != internal_relocs)
free (internal_relocs);
return NULL;
}
2006-05-24 07:36:12 +00:00
/* Determines the hash entry name for a particular reloc. It consists of
the identifier of the symbol section and the added reloc addend and
symbol offset relative to the section the symbol is attached to. */
static char *
avr_stub_name (const asection *symbol_section,
const bfd_vma symbol_offset,
const Elf_Internal_Rela *rela)
{
char *stub_name;
bfd_size_type len;
len = 8 + 1 + 8 + 1 + 1;
stub_name = bfd_malloc (len);
sprintf (stub_name, "%08x+%08x",
symbol_section->id & 0xffffffff,
(unsigned int) ((rela->r_addend & 0xffffffff) + symbol_offset));
return stub_name;
}
/* Add a new stub entry to the stub hash. Not all fields of the new
stub entry are initialised. */
static struct elf32_avr_stub_hash_entry *
avr_add_stub (const char *stub_name,
struct elf32_avr_link_hash_table *htab)
{
struct elf32_avr_stub_hash_entry *hsh;
/* Enter this entry into the linker stub hash table. */
hsh = avr_stub_hash_lookup (&htab->bstab, stub_name, TRUE, FALSE);
if (hsh == NULL)
{
(*_bfd_error_handler) (_("%B: cannot create stub entry %s"),
NULL, stub_name);
return NULL;
}
hsh->stub_offset = 0;
return hsh;
}
/* We assume that there is already space allocated for the stub section
contents and that before building the stubs the section size is
initialized to 0. We assume that within the stub hash table entry,
the absolute position of the jmp target has been written in the
target_value field. We write here the offset of the generated jmp insn
relative to the trampoline section start to the stub_offset entry in
the stub hash table entry. */
static bfd_boolean
avr_build_one_stub (struct bfd_hash_entry *bh, void *in_arg)
{
struct elf32_avr_stub_hash_entry *hsh;
struct bfd_link_info *info;
struct elf32_avr_link_hash_table *htab;
bfd *stub_bfd;
bfd_byte *loc;
bfd_vma target;
bfd_vma starget;
/* Basic opcode */
bfd_vma jmp_insn = 0x0000940c;
/* Massage our args to the form they really have. */
hsh = avr_stub_hash_entry (bh);
if (!hsh->is_actually_needed)
return TRUE;
info = (struct bfd_link_info *) in_arg;
htab = avr_link_hash_table (info);
if (htab == NULL)
return FALSE;
2006-05-24 07:36:12 +00:00
target = hsh->target_value;
/* Make a note of the offset within the stubs for this entry. */
hsh->stub_offset = htab->stub_sec->size;
loc = htab->stub_sec->contents + hsh->stub_offset;
stub_bfd = htab->stub_sec->owner;
if (debug_stubs)
printf ("Building one Stub. Address: 0x%x, Offset: 0x%x\n",
(unsigned int) target,
(unsigned int) hsh->stub_offset);
/* We now have to add the information on the jump target to the bare
opcode bits already set in jmp_insn. */
/* Check for the alignment of the address. */
if (target & 1)
return FALSE;
starget = target >> 1;
jmp_insn |= ((starget & 0x10000) | ((starget << 3) & 0x1f00000)) >> 16;
bfd_put_16 (stub_bfd, jmp_insn, loc);
bfd_put_16 (stub_bfd, (bfd_vma) starget & 0xffff, loc + 2);
htab->stub_sec->size += 4;
/* Now add the entries in the address mapping table if there is still
space left. */
{
unsigned int nr;
nr = htab->amt_entry_cnt + 1;
if (nr <= htab->amt_max_entry_cnt)
{
htab->amt_entry_cnt = nr;
htab->amt_stub_offsets[nr - 1] = hsh->stub_offset;
htab->amt_destination_addr[nr - 1] = target;
}
}
return TRUE;
}
static bfd_boolean
avr_mark_stub_not_to_be_necessary (struct bfd_hash_entry *bh,
2010-06-27 04:07:55 +00:00
void *in_arg ATTRIBUTE_UNUSED)
2006-05-24 07:36:12 +00:00
{
struct elf32_avr_stub_hash_entry *hsh;
hsh = avr_stub_hash_entry (bh);
hsh->is_actually_needed = FALSE;
return TRUE;
}
static bfd_boolean
avr_size_one_stub (struct bfd_hash_entry *bh, void *in_arg)
{
struct elf32_avr_stub_hash_entry *hsh;
struct elf32_avr_link_hash_table *htab;
int size;
/* Massage our args to the form they really have. */
hsh = avr_stub_hash_entry (bh);
htab = in_arg;
if (hsh->is_actually_needed)
size = 4;
else
size = 0;
htab->stub_sec->size += size;
return TRUE;
}
void
elf32_avr_setup_params (struct bfd_link_info *info,
bfd *avr_stub_bfd,
asection *avr_stub_section,
bfd_boolean no_stubs,
bfd_boolean deb_stubs,
bfd_boolean deb_relax,
bfd_vma pc_wrap_around,
bfd_boolean call_ret_replacement)
{
struct elf32_avr_link_hash_table *htab = avr_link_hash_table (info);
2006-05-24 07:36:12 +00:00
if (htab == NULL)
return;
2006-05-24 07:36:12 +00:00
htab->stub_sec = avr_stub_section;
htab->stub_bfd = avr_stub_bfd;
htab->no_stubs = no_stubs;
debug_relax = deb_relax;
debug_stubs = deb_stubs;
avr_pc_wrap_around = pc_wrap_around;
avr_replace_call_ret_sequences = call_ret_replacement;
}
/* Set up various things so that we can make a list of input sections
for each output section included in the link. Returns -1 on error,
0 when no stubs will be needed, and 1 on success. It also sets
information on the stubs bfd and the stub section in the info
struct. */
int
elf32_avr_setup_section_lists (bfd *output_bfd,
struct bfd_link_info *info)
{
bfd *input_bfd;
unsigned int bfd_count;
int top_id, top_index;
asection *section;
asection **input_list, **list;
bfd_size_type amt;
* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
2010-02-04 09:16:43 +00:00
struct elf32_avr_link_hash_table *htab = avr_link_hash_table (info);
2006-05-24 07:36:12 +00:00
if (htab == NULL || htab->no_stubs)
2006-05-24 07:36:12 +00:00
return 0;
/* Count the number of input BFDs and find the top input section id. */
for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
input_bfd != NULL;
input_bfd = input_bfd->link.next)
2006-05-24 07:36:12 +00:00
{
bfd_count += 1;
for (section = input_bfd->sections;
section != NULL;
section = section->next)
if (top_id < section->id)
top_id = section->id;
}
htab->bfd_count = bfd_count;
/* We can't use output_bfd->section_count here to find the top output
section index as some sections may have been removed, and
strip_excluded_output_sections doesn't renumber the indices. */
for (section = output_bfd->sections, top_index = 0;
section != NULL;
section = section->next)
if (top_index < section->index)
top_index = section->index;
htab->top_index = top_index;
amt = sizeof (asection *) * (top_index + 1);
input_list = bfd_malloc (amt);
htab->input_list = input_list;
if (input_list == NULL)
return -1;
/* For sections we aren't interested in, mark their entries with a
value we can check later. */
list = input_list + top_index;
do
*list = bfd_abs_section_ptr;
while (list-- != input_list);
for (section = output_bfd->sections;
section != NULL;
section = section->next)
if ((section->flags & SEC_CODE) != 0)
input_list[section->index] = NULL;
return 1;
}
/* Read in all local syms for all input bfds, and create hash entries
for export stubs if we are building a multi-subspace shared lib.
Returns -1 on error, 0 otherwise. */
static int
get_local_syms (bfd *input_bfd, struct bfd_link_info *info)
{
unsigned int bfd_indx;
Elf_Internal_Sym *local_syms, **all_local_syms;
struct elf32_avr_link_hash_table *htab = avr_link_hash_table (info);
bfd_size_type amt;
2006-05-24 07:36:12 +00:00
if (htab == NULL)
return -1;
2006-05-24 07:36:12 +00:00
/* We want to read in symbol extension records only once. To do this
we need to read in the local symbols in parallel and save them for
later use; so hold pointers to the local symbols in an array. */
amt = sizeof (Elf_Internal_Sym *) * htab->bfd_count;
2006-05-24 07:36:12 +00:00
all_local_syms = bfd_zmalloc (amt);
htab->all_local_syms = all_local_syms;
if (all_local_syms == NULL)
return -1;
/* Walk over all the input BFDs, swapping in local symbols.
If we are creating a shared library, create hash entries for the
export stubs. */
for (bfd_indx = 0;
input_bfd != NULL;
input_bfd = input_bfd->link.next, bfd_indx++)
2006-05-24 07:36:12 +00:00
{
Elf_Internal_Shdr *symtab_hdr;
/* We'll need the symbol table in a second. */
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
if (symtab_hdr->sh_info == 0)
continue;
/* We need an array of the local symbols attached to the input bfd. */
local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
if (local_syms == NULL)
{
local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
symtab_hdr->sh_info, 0,
NULL, NULL, NULL);
/* Cache them for elf_link_input_bfd. */
symtab_hdr->contents = (unsigned char *) local_syms;
}
if (local_syms == NULL)
return -1;
all_local_syms[bfd_indx] = local_syms;
}
return 0;
}
#define ADD_DUMMY_STUBS_FOR_DEBUGGING 0
bfd_boolean
elf32_avr_size_stubs (bfd *output_bfd,
struct bfd_link_info *info,
bfd_boolean is_prealloc_run)
{
struct elf32_avr_link_hash_table *htab;
int stub_changed = 0;
2006-05-24 07:36:12 +00:00
htab = avr_link_hash_table (info);
if (htab == NULL)
return FALSE;
2006-05-24 07:36:12 +00:00
/* At this point we initialize htab->vector_base
To the start of the text output section. */
htab->vector_base = htab->stub_sec->output_section->vma;
2006-05-24 07:36:12 +00:00
if (get_local_syms (info->input_bfds, info))
{
if (htab->all_local_syms)
goto error_ret_free_local;
return FALSE;
}
2006-05-24 07:36:12 +00:00
if (ADD_DUMMY_STUBS_FOR_DEBUGGING)
{
struct elf32_avr_stub_hash_entry *test;
test = avr_add_stub ("Hugo",htab);
test->target_value = 0x123456;
test->stub_offset = 13;
test = avr_add_stub ("Hugo2",htab);
test->target_value = 0x84210;
test->stub_offset = 14;
}
while (1)
{
bfd *input_bfd;
unsigned int bfd_indx;
/* We will have to re-generate the stub hash table each time anything
in memory has changed. */
bfd_hash_traverse (&htab->bstab, avr_mark_stub_not_to_be_necessary, htab);
for (input_bfd = info->input_bfds, bfd_indx = 0;
input_bfd != NULL;
input_bfd = input_bfd->link.next, bfd_indx++)
2006-05-24 07:36:12 +00:00
{
Elf_Internal_Shdr *symtab_hdr;
asection *section;
Elf_Internal_Sym *local_syms;
/* We'll need the symbol table in a second. */
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
if (symtab_hdr->sh_info == 0)
continue;
local_syms = htab->all_local_syms[bfd_indx];
/* Walk over each section attached to the input bfd. */
for (section = input_bfd->sections;
section != NULL;
section = section->next)
{
Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
/* If there aren't any relocs, then there's nothing more
to do. */
if ((section->flags & SEC_RELOC) == 0
|| section->reloc_count == 0)
continue;
/* If this section is a link-once section that will be
discarded, then don't create any stubs. */
if (section->output_section == NULL
|| section->output_section->owner != output_bfd)
continue;
/* Get the relocs. */
internal_relocs
= _bfd_elf_link_read_relocs (input_bfd, section, NULL, NULL,
info->keep_memory);
if (internal_relocs == NULL)
goto error_ret_free_local;
/* Now examine each relocation. */
irela = internal_relocs;
irelaend = irela + section->reloc_count;
for (; irela < irelaend; irela++)
{
unsigned int r_type, r_indx;
struct elf32_avr_stub_hash_entry *hsh;
asection *sym_sec;
bfd_vma sym_value;
bfd_vma destination;
struct elf_link_hash_entry *hh;
char *stub_name;
r_type = ELF32_R_TYPE (irela->r_info);
r_indx = ELF32_R_SYM (irela->r_info);
/* Only look for 16 bit GS relocs. No other reloc will need a
stub. */
if (!((r_type == R_AVR_16_PM)
|| (r_type == R_AVR_LO8_LDI_GS)
|| (r_type == R_AVR_HI8_LDI_GS)))
continue;
/* Now determine the call target, its name, value,
section. */
sym_sec = NULL;
sym_value = 0;
destination = 0;
hh = NULL;
if (r_indx < symtab_hdr->sh_info)
{
/* It's a local symbol. */
Elf_Internal_Sym *sym;
Elf_Internal_Shdr *hdr;
include/elf/ PR 5900 * common.h (SHN_BAD): Delete. (SHN_LORESERVE .. SHN_HIRESERVE): Move to.. * external.h: ..here. * internal.h (SHN_LORESERVE, SHN_HIRESERVE): Define. (SHN_LOPROC, SHN_HIPROC, SHN_LOOS, SHN_HIOS): Define. (SHN_ABS, SHN_COMMON, SHN_XINDEX, SHN_BAD): Define. bfd/ PR 5900 * elf-bfd.h: Include elf/internal.h after elf/external.h. * elfcode.h (elf_swap_symbol_in): Map reserved shndx range. (elf_swap_symbol_out): Adjust SHN_XINDEX test. (elf_swap_ehdr_out): Mask SHN_LORESERVE and SHN_XINDEX to values seen in external structs. (valid_section_index_p): Delete. (elf_object_p): Don't increment section numbers over reserved range. Simplify test for valid sh_link, sh_info and e_shstrndx fields. (elf_write_shdrs_and_ehdr): Mask SHN_LORESERVE and SHN_XINDEX to values seen in external structs. Don't increment section numbers over reserved range. * elf.c (bfd_elf_sym_name): Remove redundant tests on st_shndx. (bfd_section_from_shdr): Likewise. (group_signature): Range check before accessing elf_elfsections. (_bfd_elf_setup_sections): Likewise. (bfd_section_from_shdr): Likewise. (bfd_section_from_shdr): Don't increment section number over reserved sections. (assign_file_positions_for_non_load_sections): Likewise. (assign_file_positions_except_relocs): Likewise. (_bfd_elf_write_object_contents): Likewise. (assign_section_numbers): Likewise. Adjust for changed SHN_*. (prep_headers): Delete unused variable. * elflink.c (bfd_elf_link_record_local_dynamic_symbol): Adjust for changed SHN_* values. (check_dynsym, elf_link_input_bfd): Likewise. (bfd_elf_final_link): Likewise. Don't skip over reserved section range. (elf_fixup_link_order): Check that sh_link field is valid. * elf-hppa.h (elf_hppa_add_symbol_hook): Make "index" unsigned. * elf32-arm.c (elf32_arm_gc_mark_extra_sections): Range check before accesssing elf_elfsections. * elf32-avr.c (elf32_avr_size_stubs): Likewise. * elf32-hppa.c (elf32_hppa_size_stubs): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Likewise. * elf64-hppa.c (elf64_hppa_check_relocs): Adjust for changed SHN_* defines. Test for SHN_BAD return from _bfd_elf_section_from_bfd_section binutils/ PR 5900 * readelf.c (SECTION_HEADER_INDEX, SECTION_HEADER_NUM): Delete. Remove use throughout file. (SECTION_HEADER): Likewise. (dump_relocations): Don't adjust st_shndx for reserved range. (process_file_header): Mask SHN_XINDEX to values seen in external elf structs. Simplify valid section index tests. (get_32bit_elf_symbols, get_64bit_elf_symbols): Mask SHN_XINDEX. Map reserved st_shndx to internal form. (process_section_groups): Test that group symbol st_shndx is in range, not just non-zero. Delete reserved range check. (get_symbol_index_type): Mask "type" to 16 bits when printing PRC, OS or RSV. gdb/ PR 5900 * elfread.c (elf_symtab_read): Make shndx an unsigned int. * mipsread.c: Include elf/internal.h. (read_alphacoff_dynamic_symtab): Map external reserved sym_shndx to internal range. ld/testsuite/ PR 5900 * ld-elf/sec64k.exp: Update.
2008-03-12 08:37:09 +00:00
unsigned int shndx;
2006-05-24 07:36:12 +00:00
sym = local_syms + r_indx;
if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
sym_value = sym->st_value;
include/elf/ PR 5900 * common.h (SHN_BAD): Delete. (SHN_LORESERVE .. SHN_HIRESERVE): Move to.. * external.h: ..here. * internal.h (SHN_LORESERVE, SHN_HIRESERVE): Define. (SHN_LOPROC, SHN_HIPROC, SHN_LOOS, SHN_HIOS): Define. (SHN_ABS, SHN_COMMON, SHN_XINDEX, SHN_BAD): Define. bfd/ PR 5900 * elf-bfd.h: Include elf/internal.h after elf/external.h. * elfcode.h (elf_swap_symbol_in): Map reserved shndx range. (elf_swap_symbol_out): Adjust SHN_XINDEX test. (elf_swap_ehdr_out): Mask SHN_LORESERVE and SHN_XINDEX to values seen in external structs. (valid_section_index_p): Delete. (elf_object_p): Don't increment section numbers over reserved range. Simplify test for valid sh_link, sh_info and e_shstrndx fields. (elf_write_shdrs_and_ehdr): Mask SHN_LORESERVE and SHN_XINDEX to values seen in external structs. Don't increment section numbers over reserved range. * elf.c (bfd_elf_sym_name): Remove redundant tests on st_shndx. (bfd_section_from_shdr): Likewise. (group_signature): Range check before accessing elf_elfsections. (_bfd_elf_setup_sections): Likewise. (bfd_section_from_shdr): Likewise. (bfd_section_from_shdr): Don't increment section number over reserved sections. (assign_file_positions_for_non_load_sections): Likewise. (assign_file_positions_except_relocs): Likewise. (_bfd_elf_write_object_contents): Likewise. (assign_section_numbers): Likewise. Adjust for changed SHN_*. (prep_headers): Delete unused variable. * elflink.c (bfd_elf_link_record_local_dynamic_symbol): Adjust for changed SHN_* values. (check_dynsym, elf_link_input_bfd): Likewise. (bfd_elf_final_link): Likewise. Don't skip over reserved section range. (elf_fixup_link_order): Check that sh_link field is valid. * elf-hppa.h (elf_hppa_add_symbol_hook): Make "index" unsigned. * elf32-arm.c (elf32_arm_gc_mark_extra_sections): Range check before accesssing elf_elfsections. * elf32-avr.c (elf32_avr_size_stubs): Likewise. * elf32-hppa.c (elf32_hppa_size_stubs): Likewise. * elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Likewise. * elf64-hppa.c (elf64_hppa_check_relocs): Adjust for changed SHN_* defines. Test for SHN_BAD return from _bfd_elf_section_from_bfd_section binutils/ PR 5900 * readelf.c (SECTION_HEADER_INDEX, SECTION_HEADER_NUM): Delete. Remove use throughout file. (SECTION_HEADER): Likewise. (dump_relocations): Don't adjust st_shndx for reserved range. (process_file_header): Mask SHN_XINDEX to values seen in external elf structs. Simplify valid section index tests. (get_32bit_elf_symbols, get_64bit_elf_symbols): Mask SHN_XINDEX. Map reserved st_shndx to internal form. (process_section_groups): Test that group symbol st_shndx is in range, not just non-zero. Delete reserved range check. (get_symbol_index_type): Mask "type" to 16 bits when printing PRC, OS or RSV. gdb/ PR 5900 * elfread.c (elf_symtab_read): Make shndx an unsigned int. * mipsread.c: Include elf/internal.h. (read_alphacoff_dynamic_symtab): Map external reserved sym_shndx to internal range. ld/testsuite/ PR 5900 * ld-elf/sec64k.exp: Update.
2008-03-12 08:37:09 +00:00
shndx = sym->st_shndx;
if (shndx < elf_numsections (input_bfd))
{
hdr = elf_elfsections (input_bfd)[shndx];
sym_sec = hdr->bfd_section;
destination = (sym_value + irela->r_addend
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
}
2006-05-24 07:36:12 +00:00
}
else
{
/* It's an external symbol. */
int e_indx;
e_indx = r_indx - symtab_hdr->sh_info;
hh = elf_sym_hashes (input_bfd)[e_indx];
while (hh->root.type == bfd_link_hash_indirect
|| hh->root.type == bfd_link_hash_warning)
hh = (struct elf_link_hash_entry *)
(hh->root.u.i.link);
if (hh->root.type == bfd_link_hash_defined
|| hh->root.type == bfd_link_hash_defweak)
{
sym_sec = hh->root.u.def.section;
sym_value = hh->root.u.def.value;
if (sym_sec->output_section != NULL)
destination = (sym_value + irela->r_addend
+ sym_sec->output_offset
+ sym_sec->output_section->vma);
}
else if (hh->root.type == bfd_link_hash_undefweak)
{
if (! info->shared)
continue;
}
else if (hh->root.type == bfd_link_hash_undefined)
{
if (! (info->unresolved_syms_in_objects == RM_IGNORE
&& (ELF_ST_VISIBILITY (hh->other)
== STV_DEFAULT)))
continue;
}
else
{
bfd_set_error (bfd_error_bad_value);
error_ret_free_internal:
if (elf_section_data (section)->relocs == NULL)
free (internal_relocs);
goto error_ret_free_local;
}
}
if (! avr_stub_is_required_for_16_bit_reloc
(destination - htab->vector_base))
{
if (!is_prealloc_run)
/* We are having a reloc that does't need a stub. */
continue;
/* We don't right now know if a stub will be needed.
Let's rather be on the safe side. */
}
/* Get the name of this stub. */
stub_name = avr_stub_name (sym_sec, sym_value, irela);
if (!stub_name)
goto error_ret_free_internal;
hsh = avr_stub_hash_lookup (&htab->bstab,
stub_name,
FALSE, FALSE);
if (hsh != NULL)
{
/* The proper stub has already been created. Mark it
to be used and write the possibly changed destination
value. */
hsh->is_actually_needed = TRUE;
hsh->target_value = destination;
free (stub_name);
continue;
}
hsh = avr_add_stub (stub_name, htab);
if (hsh == NULL)
{
free (stub_name);
goto error_ret_free_internal;
}
hsh->is_actually_needed = TRUE;
hsh->target_value = destination;
if (debug_stubs)
printf ("Adding stub with destination 0x%x to the"
" hash table.\n", (unsigned int) destination);
if (debug_stubs)
printf ("(Pre-Alloc run: %i)\n", is_prealloc_run);
stub_changed = TRUE;
}
/* We're done with the internal relocs, free them. */
if (elf_section_data (section)->relocs == NULL)
free (internal_relocs);
}
}
/* Re-Calculate the number of needed stubs. */
htab->stub_sec->size = 0;
bfd_hash_traverse (&htab->bstab, avr_size_one_stub, htab);
if (!stub_changed)
break;
stub_changed = FALSE;
}
free (htab->all_local_syms);
return TRUE;
error_ret_free_local:
free (htab->all_local_syms);
return FALSE;
}
/* Build all the stubs associated with the current output file. The
stubs are kept in a hash table attached to the main linker hash
table. We also set up the .plt entries for statically linked PIC
functions here. This function is called via hppaelf_finish in the
linker. */
bfd_boolean
elf32_avr_build_stubs (struct bfd_link_info *info)
{
asection *stub_sec;
struct bfd_hash_table *table;
struct elf32_avr_link_hash_table *htab;
bfd_size_type total_size = 0;
htab = avr_link_hash_table (info);
if (htab == NULL)
return FALSE;
2006-05-24 07:36:12 +00:00
/* In case that there were several stub sections: */
for (stub_sec = htab->stub_bfd->sections;
stub_sec != NULL;
stub_sec = stub_sec->next)
{
bfd_size_type size;
/* Allocate memory to hold the linker stubs. */
size = stub_sec->size;
total_size += size;
stub_sec->contents = bfd_zalloc (htab->stub_bfd, size);
if (stub_sec->contents == NULL && size != 0)
return FALSE;
stub_sec->size = 0;
}
/* Allocate memory for the adress mapping table. */
htab->amt_entry_cnt = 0;
htab->amt_max_entry_cnt = total_size / 4;
htab->amt_stub_offsets = bfd_malloc (sizeof (bfd_vma)
* htab->amt_max_entry_cnt);
htab->amt_destination_addr = bfd_malloc (sizeof (bfd_vma)
* htab->amt_max_entry_cnt );
if (debug_stubs)
printf ("Allocating %i entries in the AMT\n", htab->amt_max_entry_cnt);
/* Build the stubs as directed by the stub hash table. */
table = &htab->bstab;
bfd_hash_traverse (table, avr_build_one_stub, info);
if (debug_stubs)
printf ("Final Stub section Size: %i\n", (int) htab->stub_sec->size);
return TRUE;
}
/* Callback used by QSORT to order relocations AP and BP. */
static int
internal_reloc_compare (const void *ap, const void *bp)
{
const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap;
const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp;
if (a->r_offset != b->r_offset)
return (a->r_offset - b->r_offset);
/* We don't need to sort on these criteria for correctness,
but enforcing a more strict ordering prevents unstable qsort
from behaving differently with different implementations.
Without the code below we get correct but different results
on Solaris 2.7 and 2.8. We would like to always produce the
same results no matter the host. */
if (a->r_info != b->r_info)
return (a->r_info - b->r_info);
return (a->r_addend - b->r_addend);
}
/* Return true if ADDRESS is within the vma range of SECTION from ABFD. */
static bfd_boolean
avr_is_section_for_address (bfd *abfd, asection *section, bfd_vma address)
{
bfd_vma vma;
bfd_size_type size;
vma = bfd_get_section_vma (abfd, section);
if (address < vma)
return FALSE;
size = section->size;
if (address >= vma + size)
return FALSE;
return TRUE;
}
/* Data structure used by AVR_FIND_SECTION_FOR_ADDRESS. */
struct avr_find_section_data
{
/* The address we're looking for. */
bfd_vma address;
/* The section we've found. */
asection *section;
};
/* Helper function to locate the section holding a certain virtual memory
address. This is called via bfd_map_over_sections. The DATA is an
instance of STRUCT AVR_FIND_SECTION_DATA, the address field of which
has been set to the address to search for, and the section field has
been set to NULL. If SECTION from ABFD contains ADDRESS then the
section field in DATA will be set to SECTION. As an optimisation, if
the section field is already non-null then this function does not
perform any checks, and just returns. */
static void
avr_find_section_for_address (bfd *abfd,
asection *section, void *data)
{
struct avr_find_section_data *fs_data
= (struct avr_find_section_data *) data;
/* Return if already found. */
if (fs_data->section != NULL)
return;
/* If this section isn't part of the addressable code content, skip it. */
if ((bfd_get_section_flags (abfd, section) & SEC_ALLOC) == 0
&& (bfd_get_section_flags (abfd, section) & SEC_CODE) == 0)
return;
if (avr_is_section_for_address (abfd, section, fs_data->address))
fs_data->section = section;
}
/* Load all of the property records from SEC, a section from ABFD. Return
a STRUCT AVR_PROPERTY_RECORD_LIST containing all the records. The
memory for the returned structure, and all of the records pointed too by
the structure are allocated with a single call to malloc, so, only the
pointer returned needs to be free'd. */
static struct avr_property_record_list *
avr_elf32_load_records_from_section (bfd *abfd, asection *sec)
{
char *contents = NULL, *ptr;
bfd_size_type size, mem_size;
bfd_byte version, flags;
uint16_t record_count, i;
struct avr_property_record_list *r_list = NULL;
Elf_Internal_Rela *internal_relocs = NULL, *rel, *rel_end;
struct avr_find_section_data fs_data;
fs_data.section = NULL;
size = bfd_get_section_size (sec);
contents = bfd_malloc (size);
bfd_get_section_contents (abfd, sec, contents, 0, size);
ptr = contents;
/* Load the relocations for the '.avr.prop' section if there are any, and
sort them. */
internal_relocs = (_bfd_elf_link_read_relocs
(abfd, sec, NULL, NULL, FALSE));
if (internal_relocs)
qsort (internal_relocs, sec->reloc_count,
sizeof (Elf_Internal_Rela), internal_reloc_compare);
/* There is a header at the start of the property record section SEC, the
format of this header is:
uint8_t : version number
uint8_t : flags
uint16_t : record counter
*/
/* Check we have at least got a headers worth of bytes. */
if (size < AVR_PROPERTY_SECTION_HEADER_SIZE)
goto load_failed;
version = *((bfd_byte *) ptr);
ptr++;
flags = *((bfd_byte *) ptr);
ptr++;
record_count = *((uint16_t *) ptr);
ptr+=2;
BFD_ASSERT (ptr - contents == AVR_PROPERTY_SECTION_HEADER_SIZE);
/* Now allocate space for the list structure, and all of the list
elements in a single block. */
mem_size = sizeof (struct avr_property_record_list)
+ sizeof (struct avr_property_record) * record_count;
r_list = bfd_malloc (mem_size);
if (r_list == NULL)
goto load_failed;
r_list->version = version;
r_list->flags = flags;
r_list->section = sec;
r_list->record_count = record_count;
r_list->records = (struct avr_property_record *) (&r_list [1]);
size -= AVR_PROPERTY_SECTION_HEADER_SIZE;
/* Check that we understand the version number. There is only one
version number right now, anything else is an error. */
if (r_list->version != AVR_PROPERTY_RECORDS_VERSION)
goto load_failed;
rel = internal_relocs;
rel_end = rel + sec->reloc_count;
for (i = 0; i < record_count; ++i)
{
bfd_vma address;
/* Each entry is a 32-bit address, followed by a single byte type.
After that is the type specific data. We must take care to
ensure that we don't read beyond the end of the section data. */
if (size < 5)
goto load_failed;
r_list->records [i].section = NULL;
r_list->records [i].offset = 0;
if (rel)
{
/* The offset of the address within the .avr.prop section. */
size_t offset = ptr - contents;
while (rel < rel_end && rel->r_offset < offset)
++rel;
if (rel == rel_end)
rel = NULL;
else if (rel->r_offset == offset)
{
/* Find section and section offset. */
unsigned long r_symndx;
asection * rel_sec;
bfd_vma sec_offset;
r_symndx = ELF32_R_SYM (rel->r_info);
rel_sec = get_elf_r_symndx_section (abfd, r_symndx);
sec_offset = get_elf_r_symndx_offset (abfd, r_symndx)
+ rel->r_addend;
r_list->records [i].section = rel_sec;
r_list->records [i].offset = sec_offset;
}
}
address = *((uint32_t *) ptr);
ptr += 4;
size -= 4;
if (r_list->records [i].section == NULL)
{
/* Try to find section and offset from address. */
if (fs_data.section != NULL
&& !avr_is_section_for_address (abfd, fs_data.section,
address))
fs_data.section = NULL;
if (fs_data.section == NULL)
{
fs_data.address = address;
bfd_map_over_sections (abfd, avr_find_section_for_address,
&fs_data);
}
if (fs_data.section == NULL)
{
fprintf (stderr, "Failed to find matching section.\n");
goto load_failed;
}
r_list->records [i].section = fs_data.section;
r_list->records [i].offset
= address - bfd_get_section_vma (abfd, fs_data.section);
}
r_list->records [i].type = *((bfd_byte *) ptr);
ptr += 1;
size -= 1;
switch (r_list->records [i].type)
{
case RECORD_ORG:
/* Nothing else to load. */
break;
case RECORD_ORG_AND_FILL:
/* Just a 4-byte fill to load. */
if (size < 4)
goto load_failed;
r_list->records [i].data.org.fill = *((uint32_t *) ptr);
ptr += 4;
size -= 4;
break;
case RECORD_ALIGN:
/* Just a 4-byte alignment to load. */
if (size < 4)
goto load_failed;
r_list->records [i].data.align.bytes = *((uint32_t *) ptr);
ptr += 4;
size -= 4;
/* Just initialise PRECEDING_DELETED field, this field is
used during linker relaxation. */
r_list->records [i].data.align.preceding_deleted = 0;
break;
case RECORD_ALIGN_AND_FILL:
/* A 4-byte alignment, and a 4-byte fill to load. */
if (size < 8)
goto load_failed;
r_list->records [i].data.align.bytes = *((uint32_t *) ptr);
ptr += 4;
r_list->records [i].data.align.fill = *((uint32_t *) ptr);
ptr += 4;
size -= 8;
/* Just initialise PRECEDING_DELETED field, this field is
used during linker relaxation. */
r_list->records [i].data.align.preceding_deleted = 0;
break;
default:
goto load_failed;
}
}
free (contents);
free (internal_relocs);
return r_list;
load_failed:
free (internal_relocs);
free (contents);
free (r_list);
return NULL;
}
/* Load all of the property records from ABFD. See
AVR_ELF32_LOAD_RECORDS_FROM_SECTION for details of the return value. */
struct avr_property_record_list *
avr_elf32_load_property_records (bfd *abfd)
{
asection *sec;
/* Find the '.avr.prop' section and load the contents into memory. */
sec = bfd_get_section_by_name (abfd, AVR_PROPERTY_RECORD_SECTION_NAME);
if (sec == NULL)
return NULL;
return avr_elf32_load_records_from_section (abfd, sec);
}
const char *
avr_elf32_property_record_name (struct avr_property_record *rec)
{
const char *str;
switch (rec->type)
{
case RECORD_ORG:
str = "ORG";
break;
case RECORD_ORG_AND_FILL:
str = "ORG+FILL";
break;
case RECORD_ALIGN:
str = "ALIGN";
break;
case RECORD_ALIGN_AND_FILL:
str = "ALIGN+FILL";
break;
default:
str = "unknown";
}
return str;
}
2000-03-27 08:39:14 +00:00
#define ELF_ARCH bfd_arch_avr
Add target_id to elf_backend_data. 2010-08-25 H.J. Lu <hongjiu.lu@intel.com> PR ld/11944 * elf-bfd.h (elf_backend_data): Add target_id. (bfd_elf_make_generic_object): Renamed to ... (bfd_elf_make_object): This. * elf.c (bfd_elf_make_generic_object): Removed. (bfd_elf_make_object): New. (bfd_elf_mkcorefile): Really treat it as an object file. * elf-m10300.c (ELF_TARGET_ID): New. * elf32-arm.c (ELF_TARGET_ID): Likewise. * elf32-bfin.c (ELF_TARGET_ID): Likewise. * elf32-cris.c (ELF_TARGET_ID): Likewise. * elf32-frv.c (ELF_TARGET_ID): Likewise. * elf32-i386.c (ELF_TARGET_ID): Likewise. * elf32-lm32.c (ELF_TARGET_ID): Likewise. * elf32-m32r.c (ELF_TARGET_ID): Likewise. * elf32-m68hc11.c (ELF_TARGET_ID): Likewise. * elf32-m68hc12.c (ELF_TARGET_ID): Likewise. * elf32-m68k.c (ELF_TARGET_ID): Likewise. * elf32-microblaze.c (ELF_TARGET_ID): Likewise. * elf32-ppc.c (ELF_TARGET_ID): Likewise. * elf32-s390.c (ELF_TARGET_ID): Likewise. * elf32-sh.c (ELF_TARGET_ID): Likewise. * elf32-sparc.c (ELF_TARGET_ID): Likewise. * elf32-spu.c (ELF_TARGET_ID): Likewise. * elf32-tic6x.c (ELF_TARGET_ID): Likewise. * elf32-xtensa.c (ELF_TARGET_ID): Likewise. * elf64-alpha.c (ELF_TARGET_ID): Likewise. * elf64-hppa.c (ELF_TARGET_ID): Likewise. * elf64-ppc.c (ELF_TARGET_ID): Likewise. * elf64-s390.c (ELF_TARGET_ID): Likewise. * elf64-x86-64.c (ELF_TARGET_ID): Likewise. * elfxx-ia64.c (ELF_TARGET_ID): Likewise. * elf32-hppa.c (elf32_hppa_mkobject): Removed. (bfd_elf32_mkobject): Likewise. (ELF_TARGET_ID): New. * elf32-mips.c (ELF_TARGET_ID): New. (bfd_elf32_mkobject): Removed. * elf64-mips.c (ELF_TARGET_ID): New. (bfd_elf64_mkobject): Removed. * elfn32-mips.c (ELF_TARGET_ID): New. (bfd_elf32_mkobject): Removed. * elfxx-mips.c (_bfd_mips_elf_mkobject): Removed. * elfxx-mips.h (_bfd_mips_elf_mkobject): Likewise. * elfxx-target.h (bfd_elfNN_mkobject): Default to bfd_elf_make_object. (ELF_TARGET_ID): New. Default to GENERIC_ELF_DATA. (elfNN_bed): Initialize target_id.
2010-08-25 14:53:45 +00:00
#define ELF_TARGET_ID AVR_ELF_DATA
2000-03-27 08:39:14 +00:00
#define ELF_MACHINE_CODE EM_AVR
#define ELF_MACHINE_ALT1 EM_AVR_OLD
2000-03-27 08:39:14 +00:00
#define ELF_MAXPAGESIZE 1
bfd target vector rationalisation This renames the bfd targets to <cpu>_<format>_<other>_<endian>_vec. So for example, bfd_elf32_ntradlittlemips_vec becomes mips_elf32_ntrad_le_vec and hp300bsd_vec becomes m68k_aout_hp300bsd_vec. bfd/ * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-ns32k.c, * aout-sparcle.c, * aout0.c, * aoutx.h, * armnetbsd.c, * bout.c, * cf-i386lynx.c, * cf-sparclynx.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-aux.c, * coff-go32.c, * coff-h8300.c, * coff-h8500.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c, * coff-sparc.c, * coff-stgo32.c, * coff-svm68k.c, * coff-tic80.c, * coff-u68k.c, * coff-w65.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * config.bfd, * configure.com, * configure.in, * demo64.c, * elf-m10200.c, * elf-m10300.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-gen.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * epoc-pe-arm.c, * epoc-pei-arm.c, * hp300bsd.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386bsd.c, * i386dynix.c, * i386freebsd.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * i386os9k.c, * irix-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * m88kopenbsd.c, * mach-o-i386.c, * mach-o-x86-64.c, * makefile.vms, * mipsbsd.c, * mmo.c, * netbsd-core.c, * newsos3.c, * nlm32-alpha.c, * nlm32-i386.c, * nlm32-ppc.c, * nlm32-sparc.c, * ns32knetbsd.c, * osf-core.c, * pc532-mach.c, * pe-arm-wince.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-ppc.c, * pe-sh.c, * pe-x86_64.c, * pei-arm-wince.c, * pei-arm.c, * pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-mips.c, * pei-ppc.c, * pei-sh.c, * pei-x86_64.c, * ppcboot.c, * ptrace-core.c, * riscix.c, * sco5-core.c, * som.c, * sparclinux.c, * sparclynx.c, * sparcnetbsd.c, * sunos.c, * targets.c, * trad-core.c, * vax1knetbsd.c, * vaxbsd.c, * vaxnetbsd.c, * versados.c, * vms-alpha.c, * vms-lib.c: Rename bfd targets to <cpu>_<format>_<other>_<endian>_vec. Adjust associated MY macros on aout targets. * configure: Regenerate. binutils/ * emul_aix.c: Update bfd target vector naming. * testsuite/binutils-all/objcopy.exp: Likewise. ld/ * emultempl/metagelf.em: Update bfd target vector naming. * emultempl/nios2elf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/tic6xdsbt.em: Likewise.
2014-05-02 10:39:40 +00:00
#define TARGET_LITTLE_SYM avr_elf32_vec
2000-03-27 08:39:14 +00:00
#define TARGET_LITTLE_NAME "elf32-avr"
2006-05-24 07:36:12 +00:00
#define bfd_elf32_bfd_link_hash_table_create elf32_avr_link_hash_table_create
2000-03-27 08:39:14 +00:00
#define elf_info_to_howto avr_info_to_howto_rela
#define elf_info_to_howto_rel NULL
#define elf_backend_relocate_section elf32_avr_relocate_section
#define elf_backend_can_gc_sections 1
* elf-hppa.h (elf_hppa_relocate_section): If relocatable, return immediately. Remove code handling relocatable linking. * elf32-avr.c (elf32_avr_relocate_section): Likewise. * elf32-cris.c (cris_elf_relocate_section): Likewise. * elf32-fr30.c (elf32_frv_relocate_section): Likewise. * elf32-h8300.c (elf32_h8_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-sparc.c (elf32_sparc_relocate_section): Likewise. * elf32-v850.c (v850_elf_relocate_section): Likewise. * elf32-vax.c (elf_vax_relocate_section): Likewise. * elf64-sparc.c (sparc64_elf_relocate_section): Likewise. * elf32-avr.c (elf_backend_rela_normal): Define. * elf32-cris.c: Likewise. * elf32-fr30.c: Likewise. * elf32-h8300.c: Likewise. * elf32-hppa.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-sparc.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf64-hppa.c: Likewise. * elf64-sparc.c: Likewise. * elf32-fr30.c (elf32_frv_relocate_section): Edit comment. * elf32-i860.c (elf32_i860_relocate_section): Likewise. * elf32-ip2k.c (ip2k_elf_relocate_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-openrisc.c (openrisc_elf_relocate_section): Likewise. * elf32-xstormy16.c (xstormy16_elf_relocate_section): Likewise. * elf-m10200.c (USE_RELA): Don't define. * elf-m10300.c: Likewise. * elf32-i370.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-vax.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-x86-64.c: Likewise. * elfxx-ia64.c: Likewise. * elf32-avr.c (USE_REL): Don't undef. * elf32-ip2k.c: Likewise.
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#define elf_backend_rela_normal 1
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#define elf_backend_final_write_processing \
bfd_elf_avr_final_write_processing
#define elf_backend_object_p elf32_avr_object_p
#define bfd_elf32_bfd_relax_section elf32_avr_relax_section
#define bfd_elf32_bfd_get_relocated_section_contents \
elf32_avr_get_relocated_section_contents
#define bfd_elf32_new_section_hook elf_avr_new_section_hook
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#include "elf32-target.h"