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old-cross-binutils/ld/emulparams/elf64ppc.sh

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* emulparams/elf32ppccommon.sh (LIBPATH_SUFFIX): Provide 32-bit and cross-endian values. * emulparams/elf64ppc.sh: Source elf32ppccomon.sh. Delete duplicate, and unset unwanted variables.
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. ${srcdir}/emulparams/elf32ppccommon.sh
bfd/ * elf32-ppc.c: Include dwarf2.h. (struct ppc_elf_link_hash_table): Add glink_eh_frame. (ppc_elf_create_glink): Create .eh_frame section. (glink_eh_frame_cie): New array. (ppc_elf_size_dynamic_sections): Size glink_eh_frame. (ppc_elf_finish_dynamic_sections): Write glink_eh_frame. * elf64-ppc.c: Include dwarg2.h. (struct ppc_link_hash_table): Add glink_eh_frame. (create_linkage_sections): Create .eh_frame section. (ppc64_elf_size_dynamic_sections): Arrange to drop unneeded glink_eh_frame. (glink_eh_frame_cie): New array. (ppc64_elf_size_stubs): Size glink_eh_frame. (ppc64_elf_build_stubs): Init glink_eh_frame contents. (ppc64_elf_finish_dynamic_sections): Write glink_eh_frame. ld/ * emulparams/elf32ppc.sh: Source plt_unwind.sh. * emulparams/elf64ppc.sh: Likewise. * emultempl/ppc32elf.em (OPTION_NO_TLS_OPT): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. * emultempl/ppc64elf.em (OPTION_STUBGROUP_SIZE): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. ld/testsuite/ * ld-powerpc/powerpc.exp: Use --no-ld-generated-unwind-info with some tests. * ld-powerpc/relbrlt.d: Likewise.
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. ${srcdir}/emulparams/plt_unwind.sh
* Makefile.am (eelf64ppc.c, eelf64lppc.c): Depend on ppc64elf.em. * Makefile.in: Regenerate. * emulparams/elf64ppc.sh (EXTRA_EM_FILE): Define. * emultempl/ppc64elf.em: New file.
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EXTRA_EM_FILE=ppc64elf
* Makefile.am (ALL_EMULATIONS): Add eelf64ppc.o and eelf64lppc.o. (eelf64ppc.c, eelf64lppc.c): Add make targets. Run "make dep-am" * Makefile.in: Regenerate. * configure.tgt: Add powerpc64 support. Move pdp11, pjl, pj entries to correct alphabetical position. * emulparams/elf64ppc.sh: New. * emulparams/elf64lppc.sh: New.
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ELFSIZE=64
OUTPUT_FORMAT="elf64-powerpc"
TEXT_START_ADDR=0x10000000
* emulparams/elf64ppc.sh (SEGMENT_SIZE): Don't define. Also move some changelog entries to where they belong.
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#SEGMENT_SIZE=0x10000000
* emulparams/elf64ppc.sh (ARCH): Set to powerpc:common64. (COMMONPAGESIZE): Define.
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ARCH=powerpc:common64
* Makefile.am (ALL_EMULATIONS): Add eelf64ppc.o and eelf64lppc.o. (eelf64ppc.c, eelf64lppc.c): Add make targets. Run "make dep-am" * Makefile.in: Regenerate. * configure.tgt: Add powerpc64 support. Move pdp11, pjl, pj entries to correct alphabetical position. * emulparams/elf64ppc.sh: New. * emulparams/elf64lppc.sh: New.
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NOP=0x60000000
* emulparams/elf32ppccommon.sh (LIBPATH_SUFFIX): Provide 32-bit and cross-endian values. * emulparams/elf64ppc.sh: Source elf32ppccomon.sh. Delete duplicate, and unset unwanted variables.
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unset EXECUTABLE_SYMBOLS
unset SDATA_START_SYMBOLS
unset SDATA2_START_SYMBOLS
unset SBSS_START_SYMBOLS
unset SBSS_END_SYMBOLS
unset OTHER_END_SYMBOLS
unset OTHER_RELRO_SECTIONS
* elf64-ppc.c (STFD_FR0_0R1, LFD_FR0_0R1, BLR): Define. (struct ppc_link_hash_table): Add sfpr. (ppc64_elf_link_hash_table_create): Init it. (ppc64_elf_create_dynamic_sections): Split creation of .stub and .glink out to.. (create_linkage_sections): ..here. Make .sfpr too. (ppc64_elf_check_relocs): Call create_linkage_sections, and set dynobj early. (MIN_SAVE_FPR, MAX_SAVE_FPR): Define. (ppc64_elf_func_desc_adjust): Look for missing ._savef* and ._restf* functions, and create as needed. (func_desc_adjust): Only force_local for shared libs. * emulparams/elf64ppc.sh (OTHER_TEXT_SECTIONS): Define.
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OTHER_TEXT_SECTIONS="*(.sfpr .glink)"
Reorder more powerpc64 sections again for -z relro .toc1 is the second level TOC section used by gcc's -mminimal-toc. It too should be read-only after relocation. Also, the last patch description mentioned .sbss moving but didn't actually do that, so fix that problem. .tocbss (whatever that is) was before .sbss previously, so move that one too. * emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of.. (OTHER_BSS_SYMBOLS): ..this. (OTHER_PLT_RELOC_SECTIONS): Don't define. (OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss. (OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to.. (OTHER_RELRO_SECTIONS_2): ..here. * scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
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OTHER_SDATA_SECTIONS="
* emulparams/elf64ppc.sh (.tocbss): Use new section alignment scheme. (.got, .toc1, .opd): Likewise.
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.tocbss ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}"
* emulparams/elf64ppc.sh (GOT): Fix for shell brace matching.
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if test x${RELOCATING+set} = xset; then
GOT="
* emulparams/elf64ppc.sh (.tocbss): Use new section alignment scheme. (.got, .toc1, .opd): Likewise.
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.got : ALIGN(8) { *(.got .toc) }"
* emulparams/elf64ppc.sh (GOT): Fix for shell brace matching.
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else
GOT="
.got 0 : { *(.got) }
.toc 0 : { *(.toc) }"
fi
PR ld/11012 * emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Move .rela.opd .. (INITIAL_RELOC_SECTIONS): .. to here. New define. * scripttempl/elf.sc: Expand INITIAL_RELOC_SECTIONS.
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# Put .opd relocs first so ld.so will process them before any ifunc relocs.
INITIAL_RELOC_SECTIONS="
.rela.opd ${RELOCATING-0} : { *(.rela.opd) }"
* Makefile.am (ALL_EMULATIONS): Add eelf64ppc.o and eelf64lppc.o. (eelf64ppc.c, eelf64lppc.c): Add make targets. Run "make dep-am" * Makefile.in: Regenerate. * configure.tgt: Add powerpc64 support. Move pdp11, pjl, pj entries to correct alphabetical position. * emulparams/elf64ppc.sh: New. * emulparams/elf64lppc.sh: New.
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OTHER_GOT_RELOC_SECTIONS="
* emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Add .rela.opd and .rela.branch_lt.
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.rela.toc ${RELOCATING-0} : { *(.rela.toc) }
Reorder more powerpc64 sections again for -z relro .toc1 is the second level TOC section used by gcc's -mminimal-toc. It too should be read-only after relocation. Also, the last patch description mentioned .sbss moving but didn't actually do that, so fix that problem. .tocbss (whatever that is) was before .sbss previously, so move that one too. * emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of.. (OTHER_BSS_SYMBOLS): ..this. (OTHER_PLT_RELOC_SECTIONS): Don't define. (OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss. (OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to.. (OTHER_RELRO_SECTIONS_2): ..here. * scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
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.rela.toc1 ${RELOCATING-0} : { *(.rela.toc1) }
.rela.tocbss ${RELOCATING-0} : { *(.rela.tocbss) }
* emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Add .rela.opd and .rela.branch_lt.
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.rela.branch_lt ${RELOCATING-0} : { *(.rela.branch_lt) }"
Reorder powerpc64 sections for -z relro More sections can be read-only after relocation. .opd is an obvious candidate. * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Move .opd to.. (OTHER_RELRO_SECTIONS_2): ..here, new define. * scripttempl/elf.sc: Add OTHER_RELRO_SECTIONS_2.
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OTHER_RELRO_SECTIONS_2="
Reorder more powerpc64 sections for -z relro This moves .got too, which requires .sdata and .sbss to move with it, because these sections share addressing via the toc pointer and with small-model code must be within a 16-bit signed offset. .plt, .iplt and .branch_lt must also be moved since they are addressed via a 32-bit offset from the toc pointer, and we might have a very large .data section. This change means we may have some bss style sections before the data segment, necessitating another PT_LOAD header. Also, since _edata is defined at the end of the data segment it's possible with an empty .data to have _edata at the end of .plt which looks a little unusual since .plt is a bss style section. That should only happen rarely in real world binaries, but does occur in the ld testsuite. ld/ * emulparams/elf64ppc.sh (BSS_PLT): Don't define. (OTHER_READWRITE_SECTIONS): Move .branch_lt to.. (OTHER_RELRO_SECTIONS_2): ..here. (DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT, PLT_BEFORE_GOT): Define. * scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/ PLT_BEFORE_GOT combination. (DATA_GOT, SDATA_GOT): Don't define if either is already defined. ld/testsuite/ * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv1b.d, * ld-powerpc/ambiguousv2.d, * ld-powerpc/ambiguousv2b.d, * ld-powerpc/elfv2exe.d, * ld-powerpc/elfv2so.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r: Update.
2015-01-20 06:49:15 +00:00
.opd ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) }
Reorder more powerpc64 sections again for -z relro .toc1 is the second level TOC section used by gcc's -mminimal-toc. It too should be read-only after relocation. Also, the last patch description mentioned .sbss moving but didn't actually do that, so fix that problem. .tocbss (whatever that is) was before .sbss previously, so move that one too. * emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of.. (OTHER_BSS_SYMBOLS): ..this. (OTHER_PLT_RELOC_SECTIONS): Don't define. (OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss. (OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to.. (OTHER_RELRO_SECTIONS_2): ..here. * scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
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.toc1 ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) }
Reorder more powerpc64 sections for -z relro This moves .got too, which requires .sdata and .sbss to move with it, because these sections share addressing via the toc pointer and with small-model code must be within a 16-bit signed offset. .plt, .iplt and .branch_lt must also be moved since they are addressed via a 32-bit offset from the toc pointer, and we might have a very large .data section. This change means we may have some bss style sections before the data segment, necessitating another PT_LOAD header. Also, since _edata is defined at the end of the data segment it's possible with an empty .data to have _edata at the end of .plt which looks a little unusual since .plt is a bss style section. That should only happen rarely in real world binaries, but does occur in the ld testsuite. ld/ * emulparams/elf64ppc.sh (BSS_PLT): Don't define. (OTHER_READWRITE_SECTIONS): Move .branch_lt to.. (OTHER_RELRO_SECTIONS_2): ..here. (DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT, PLT_BEFORE_GOT): Define. * scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/ PLT_BEFORE_GOT combination. (DATA_GOT, SDATA_GOT): Don't define if either is already defined. ld/testsuite/ * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv1b.d, * ld-powerpc/ambiguousv2.d, * ld-powerpc/ambiguousv2b.d, * ld-powerpc/elfv2exe.d, * ld-powerpc/elfv2so.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r: Update.
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.branch_lt ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.branch_lt) }"
PowerPC64 changes for xlc The changes to reorder sections for better relro protection on powerpc64, 3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc. xlc -qdatalocal puts global variables into .toc, which means that .toc must be writable. The simplest way to accomplish this is to edit the linker script to remove .toc sections from .got on detecting xlc object files. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc". * elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols in .toc indicate xlc compiled code that might require a rw .toc. ld/ * emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define. * emultempl/ppc64elf.em (params): Init new field. (ppc_after_open): New function. (LDEMUL_AFTER_OPEN): Define. * ldlang.c (lang_final): Whitespace fix. ld/testsuite/ * ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test. * ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test. * ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
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INITIAL_READWRITE_SECTIONS="
.toc ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc) }"
Reorder more powerpc64 sections for -z relro This moves .got too, which requires .sdata and .sbss to move with it, because these sections share addressing via the toc pointer and with small-model code must be within a 16-bit signed offset. .plt, .iplt and .branch_lt must also be moved since they are addressed via a 32-bit offset from the toc pointer, and we might have a very large .data section. This change means we may have some bss style sections before the data segment, necessitating another PT_LOAD header. Also, since _edata is defined at the end of the data segment it's possible with an empty .data to have _edata at the end of .plt which looks a little unusual since .plt is a bss style section. That should only happen rarely in real world binaries, but does occur in the ld testsuite. ld/ * emulparams/elf64ppc.sh (BSS_PLT): Don't define. (OTHER_READWRITE_SECTIONS): Move .branch_lt to.. (OTHER_RELRO_SECTIONS_2): ..here. (DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT, PLT_BEFORE_GOT): Define. * scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/ PLT_BEFORE_GOT combination. (DATA_GOT, SDATA_GOT): Don't define if either is already defined. ld/testsuite/ * ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv1b.d, * ld-powerpc/ambiguousv2.d, * ld-powerpc/ambiguousv2b.d, * ld-powerpc/elfv2exe.d, * ld-powerpc/elfv2so.d, * ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r: Update.
2015-01-20 06:49:15 +00:00
# Put .got before .data
DATA_GOT=" "
# Always make .got read-only after relocation
SEPARATE_GOTPLT=0
# Also put .sdata before .data
DATA_SDATA=" "
# and .plt/.iplt before .data
DATA_PLT=
PLT_BEFORE_GOT=" "
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