old-cross-binutils/gdb/testsuite/gdb.arch/amd64-dword.exp

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# Copyright 2010-2012 Free Software Foundation, Inc.
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
# Please email any bugs, comments, and/or additions to this file to:
# bug-gdb@gnu.org
# This file is part of the gdb testsuite.
if $tracelevel {
strace $tracelevel
}
if { ![istarget x86_64-*-* ] || ![is_lp64_target] } {
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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verbose "Skipping amd64 dword register tests."
return
}
set testfile "amd64-dword"
set srcfile amd64-pseudo.c
set binfile ${objdir}/${subdir}/${testfile}
if [get_compiler_info ${binfile}] {
return -1
}
if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug]] != "" } {
untested ${testfile}
return
}
gdb_exit
gdb_start
gdb_reinitialize_dir $srcdir/$subdir
gdb_load ${binfile}
if ![runto_main] then {
gdb_suppress_tests
}
set nr_regs 14
set dword_regs(1) eax
set dword_regs(2) ebx
set dword_regs(3) ecx
set dword_regs(4) edx
set dword_regs(5) esi
set dword_regs(6) edi
set dword_regs(7) r8d
set dword_regs(8) r9d
set dword_regs(9) r10d
set dword_regs(10) r11d
set dword_regs(11) r12d
set dword_regs(12) r13d
set dword_regs(13) r14d
set dword_regs(14) r15d
gdb_test "break [gdb_get_line_number "first breakpoint here"]" \
"Breakpoint .* at .*${srcfile}.*" \
"set first breakpoint in main"
gdb_continue_to_breakpoint "continue to first breakpoint in main"
for { set r 1 } { $r <= 6 } { incr r } {
set hexr [format %x $r]
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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gdb_test "print/x \$$dword_regs($r)" \
".. = 0x${hexr}4${hexr}3${hexr}2${hexr}1" \
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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"check contents of %$dword_regs($r)"
}
gdb_test "break [gdb_get_line_number "second breakpoint here"]" \
"Breakpoint .* at .*${srcfile}.*" \
"set second breakpoint in main"
gdb_continue_to_breakpoint "continue to second breakpoint in main"
for { set r 7 } { $r <= $nr_regs } { incr r } {
set hexr [format %x $r]
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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gdb_test "print/x \$$dword_regs($r)" \
".. = 0x${hexr}4${hexr}3${hexr}2${hexr}1" \
Support x86 pseudo byte, word and dword registers. gdb/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * amd64-tdep.c (amd64_byte_names): New. (amd64_word_names): Likewise. (amd64_dword_names): Likewise. (amd64_pseudo_register_name): Likewise. (amd64_pseudo_register_read): Likewise. (amd64_pseudo_register_write): Likewise. (amd64_init_abi): Set num_byte_regs, num_word_regs, num_dword_regs and num_mmx_regs. Call set_gdbarch_pseudo_register_read, set_gdbarch_pseudo_register_write and set_tdesc_pseudo_register_name. Don't call set_gdbarch_num_pseudo_regs. Don't set mm0_regnum. * i386-tdep.c (i386_num_mmx_regs): Removed. (i386_num_pseudo_regs): Likewise. (i386_byte_names): New. (i386_word_names): Likewise. (i386_byte_regnum_p): Likewise. (i386_word_regnum_p): Likewise. (i386_mmx_regnum_p): Updated. (i386_pseudo_register_name): Make it global. Handle byte and word pseudo-registers. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. (i386_pseudo_register_type): Handle byte, word and dword pseudo-registers (i386_register_reggroup_p): Don't include pseudo registers, except for MXX, in any register groups. Don't include pseudo byte, word, dword registers in general_reggroup. (i386_gdbarch_init): Set num_byte_regs, num_word_regs, num_dword_regs, al_regnum, ax_regnum and eax_regnum. Put MMX pseudo-registers after word pseudo-registers. Call set_gdbarch_num_pseudo_regs after calling gdbarch_init_osabi. * i386-tdep.h (gdbarch_tdep): Add num_mmx_regs, num_byte_regs, al_regnum, num_word_regs, ax_regnum, num_dword_regs and eax_regnum. (i386_byte_regnum_p): New. (i386_word_regnum_p): Likewise. (i386_dword_regnum_p): Likewise. (i386_pseudo_register_name): Likewise. (i386_pseudo_register_read): Likewise. (i386_pseudo_register_write): Likewise. gdb/testsuite/ 2010-03-02 H.J. Lu <hongjiu.lu@intel.com> * gdb.arch/amd64-byte.exp: New. * gdb.arch/amd64-dword.exp: Likewise. * gdb.arch/amd64-pseudo.c: Likewise. * gdb.arch/amd64-word.exp: Likewise. * gdb.arch/i386-byte.exp: Likewise. * gdb.arch/i386-pseudo.c: Likewise. * gdb.arch/i386-word.exp: Likewise.
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"check contents of %$dword_regs($r)"
}
for { set r 1 } { $r <= 6 } { incr r } {
gdb_test "set var \$$dword_regs($r) = $r" "" "set %$dword_regs($r)"
}
gdb_test "break [gdb_get_line_number "third breakpoint here"]" \
"Breakpoint .* at .*${srcfile}.*" \
"set third breakpoint in main"
gdb_continue_to_breakpoint "continue to third breakpoint in main"
for { set r 1 } { $r <= 6 } { incr r } {
gdb_test "print \$$dword_regs($r)" \
".. = $r" \
"check contents of %$dword_regs($r)"
}
for { set r 7 } { $r <= $nr_regs } { incr r } {
gdb_test "set var \$$dword_regs($r) = $r" "" "set %$dword_regs($r)"
}
gdb_test "break [gdb_get_line_number "forth breakpoint here"]" \
"Breakpoint .* at .*${srcfile}.*" \
"set forth breakpoint in main"
gdb_continue_to_breakpoint "continue to forth breakpoint in main"
for { set r 7 } { $r <= $nr_regs } { incr r } {
gdb_test "print \$$dword_regs($r)" \
".. = $r" \
"check contents of %$dword_regs($r)"
}