d244cb76a6
+Added a license (GPLv3). This license applies to all of the code
69 lines
1.9 KiB
C++
69 lines
1.9 KiB
C++
#include <base.hpp>
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#include <io.h>
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#include <idt.hpp>
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#include <serial.hpp>
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#include <textDISP.hpp>
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namespace MTGosHAL {
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IDT::IDT() {
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//Init PIC
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outb(0x20, 0x11); //Init Master-PIC
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outb(0x21, 0x20); //Interrupt number for IRQ0
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outb(0x21, 0x04); //IRQ is the Slave
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outb(0x21, 0x01); //ICW 4
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outb(0xA0, 0x11); //Init Master-PIC
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outb(0xA1, 0x28); //Interrupt number for IRQ8
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outb(0xA1, 0x02); //IRQ is the Slave
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outb(0xA1, 0x01); //ICW 4
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//Activate IRQ's
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outb(0x21, 0x00);
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outb(0xA1, 0x00);
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}
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auto IDT::setEntry(int i, void* offset, uint16_t seg, uint8_t flags) -> void {
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idt[i]=(uint16_t)((uint32_t)offset);
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idt[i]|=(uint64_t)(((uint32_t)offset)>>16)<<48;
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idt[i]|=((uint64_t)seg)<<16;
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idt[i]|=((uint64_t)flags)<<40;
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}
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auto IDT::apply() -> void {
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debug << "Now trying to load the IDT.\n";
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idtptr.limit=(uint16_t)(256*8-1);
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idtptr.pointer=(uint64_t*)&idt;
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loadIDT((void*)&idtptr);
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}
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auto IDT::handle(struct cpu_state* cpu) -> struct cpu_state* {
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struct cpu_state* new_cpu=cpu;
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debug << "Interrupt 0x" << Base::HEXADECIMAL << (int) cpu->intr << " was raised.\n";
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if(cpu->intr<=0x1F) {
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err << "Exception 0x" << Base::HEXADECIMAL << (int) cpu->intr << "! Kernel halted!\n";
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while(1) {
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asm volatile("cli; hlt");
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}
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} else if(cpu->intr >= 0x20 && cpu->intr <= 0x2F) {
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if(cpu->intr >= 0x28) {
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outb(0xA0, 0x20);
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}
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outb(0x20, 0x20);
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debug << "The IRQ " << Base::DECIMAL << (int) cpu->intr-0x20 << " was handled.\n";
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if(cpu->intr==0x20) {
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debug.debug();
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}
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}
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for(int i=0;i<16;i++) {
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if(ivt[cpu->intr][i])
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new_cpu=ivt[cpu->intr][i](new_cpu);
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}
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return new_cpu;
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}
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auto IDT::request(uint8_t intr, struct cpu_state* (*handler)(struct cpu_state*)) -> bool {
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for(int i=0;i<16;i++) {
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if(ivt[intr][i])
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continue;
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ivt[intr][i]=handler;
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return true;
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}
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return false;
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}
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}
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extern "C" struct cpu_state* handleINT(struct cpu_state* cpu) {
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return MTGosHAL::idt.handle(cpu);
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}
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