73 lines
3.2 KiB
Python
73 lines
3.2 KiB
Python
print("Writing interrupt stubs")
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int_handler.write(".macro intr_stub nr\n.global intr_stub_\\nr\n.align 16\nintr_stub_\\nr:\n pushq $0\n pushq $\\nr\n jmp intr_common_handler\n.endm\n.macro intr_stub_error_code nr\n.global intr_stub_\\nr\n.align 16\nintr_stub_\\nr:\n pushq $\\nr\n jmp intr_common_handler\n.endm\n")
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for i in range(256):
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if i in [8,10,11,12,13,14,17]:
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int_handler.write("intr_stub_error_code "+str(i)+"\n")
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else:
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int_handler.write("intr_stub "+str(i)+"\n")
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int_handler.write(".extern handleINT\n")
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int_handler.write("intr_common_handler:\n")
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int_handler.write(" cli\n")
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print("Generating register save/restore")
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all_regs_push=[]
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all_regs_pop=[]
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data_section=""
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for reg in ["r15","r14","r13","r12","r11","r10","r9","r8","rbp","rdi","rsi","rdx","rcx","rbx","rax"]:
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all_regs_push.append("push %"+reg)
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all_regs_pop.append("pop %"+reg)
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if config["ENABLE_FPU"] and not config["ENABLE_SSE"]:
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data_section+="fsave_reg:\n .space 108\n"
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all_regs_push.append("fsave fsave_reg")
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all_regs_pop.append("frstor fsave_reg")
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all_regs_push.append("pushq $fsave_reg")
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if config["ENABLE_SSE"]:
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data_section+=".align 16\nfxsave_reg:\n .space 512"
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all_regs_push.append("fxsave fxsave_reg")
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all_regs_pop.append("fxrstor fxsave_reg")
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all_regs_push.append("pushq $fxsave_reg")
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print("Writing interrupt handler")
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for ins in all_regs_push:
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int_handler.write(" "+ins+"\n")
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int_handler.write(" mov %rsp, %rdi\n call handleINT\n mov %rax, %rsp\n")
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for ins in reversed(all_regs_pop):
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int_handler.write(" "+ins+"\n")
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int_handler.write(" add $8, %esp\n iret\n")
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print("Writing panic handler")
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int_handler.write(".global panic\n.extern panic2\npanic:\n")
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for ins in all_regs_push:
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int_handler.write(" "+ins+"\n")
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int_handler.write(" mov %rsp, %rdi\n jmp panic2\n")
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int_handler.write(".section .data\n"+data_section)
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print("Generating cpu_state struct")
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reg_struct.write("#include <stdint.h>\n")
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if config["ENABLE_FPU"] and not config["ENABLE_SSE"]:
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reg_struct.write("struct fpu_state {\n")
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for reg in ["cwd","swd","twd","fip","fcs","foo","fos"]:
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reg_struct.write(" uint32_t "+reg+";\n")
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for reg in ("st"+str(i) for i in range(8)):
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reg_struct.write(" __float80 "+reg+";\n")
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reg_struct.write("}__attribute__((packed,aligned(16)));\n")
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if config["ENABLE_SSE"]:
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reg_struct.write("struct fpu_state {\n")
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for reg in ["cwd","swd","twd","fop"]:
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reg_struct.write(" uint16_t "+reg+";\n")
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for reg in ["fip","fcs","foo","fos","mxcsr","mxcsr_mask"]:
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reg_struct.write(" uint32_t "+reg+";\n")
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for reg in range(8):
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reg_struct.write(" __float80 st"+str(reg)+";\n")
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reg_struct.write(" char buf"+str(reg)+"[6];\n")
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for reg in range(16):
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reg_struct.write(" __float128 xmm"+str(reg)+";\n")
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reg_struct.write("}__attribute__((packed,aligned(16)));\n")
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reg_struct.write("struct cpu_state {\n")
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if config["ENABLE_FPU"]:
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reg_struct.write(" fpu_state *fpu;\n")
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for reg in ["rax","rbx","rcx","rdx","rsi","rdi","rbp","r8","r9","r10","r11","r12","r13","r14","r15","intr","error","rip","cs","rflags","rsp","ss"]:
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reg_struct.write(" uint64_t "+reg+";\n")
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reg_struct.write("}__attribute__((packed));")
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