65 lines
3.1 KiB
ArmAsm
65 lines
3.1 KiB
ArmAsm
.include "macros.inc"
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.section .text, "ax" # 0x80006A00 - 0x80406260 ; 0x003FF860
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.global WBT_ExtCreateRecord
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WBT_ExtCreateRecord:
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/* 80089500 00085340 94 21 FE E0 */ stwu r1, -0x120(r1)
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/* 80089504 00085344 7C 08 02 A6 */ mflr r0
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/* 80089508 00085348 90 01 01 24 */ stw r0, 0x124(r1)
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/* 8008950C 0008534C 38 00 10 02 */ li r0, 0x1002
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/* 80089510 00085350 38 61 00 14 */ addi r3, r1, 0x14
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/* 80089514 00085354 38 81 00 10 */ addi r4, r1, 0x10
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/* 80089518 00085358 93 E1 01 1C */ stw r31, 0x11c(r1)
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/* 8008951C 0008535C 3B E0 00 00 */ li r31, 0x0
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/* 80089520 00085360 93 C1 01 18 */ stw r30, 0x118(r1)
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/* 80089524 00085364 93 E1 00 10 */ stw r31, 0x10(r1)
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/* 80089528 00085368 B0 01 00 08 */ sth r0, 0x8(r1)
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/* 8008952C 0008536C 48 01 3B F9 */ bl SDP_GetLocalDiRecord
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/* 80089530 00085370 54 60 04 3F */ clrlwi. r0, r3, 16
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/* 80089534 00085374 41 82 00 4C */ beq lbl_80089580
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/* 80089538 00085378 3B C1 00 16 */ addi r30, r1, 0x16
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/* 8008953C 0008537C 38 80 00 00 */ li r4, 0x0
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/* 80089540 00085380 7F C3 F3 78 */ mr r3, r30
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/* 80089544 00085384 38 A0 00 FA */ li r5, 0xfa
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/* 80089548 00085388 4B F7 AE 09 */ bl memset
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/* 8008954C 0008538C 38 00 00 01 */ li r0, 0x1
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/* 80089550 00085390 38 60 00 0F */ li r3, 0xf
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/* 80089554 00085394 B0 61 00 16 */ sth r3, 0x16(r1)
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/* 80089558 00085398 7F C3 F3 78 */ mr r3, r30
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/* 8008955C 0008539C 38 81 00 10 */ addi r4, r1, 0x10
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/* 80089560 000853A0 B0 01 00 18 */ sth r0, 0x18(r1)
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/* 80089564 000853A4 98 01 00 1E */ stb r0, 0x1e(r1)
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/* 80089568 000853A8 48 01 38 5D */ bl SDP_SetLocalDiRecord
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/* 8008956C 000853AC 54 60 04 3F */ clrlwi. r0, r3, 16
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/* 80089570 000853B0 41 82 00 10 */ beq lbl_80089580
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/* 80089574 000853B4 93 E1 00 10 */ stw r31, 0x10(r1)
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/* 80089578 000853B8 38 60 00 00 */ li r3, 0x0
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/* 8008957C 000853BC 48 00 00 4C */ b lbl_800895C8
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.global lbl_80089580
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lbl_80089580:
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/* 80089580 000853C0 80 61 00 10 */ lwz r3, 0x10(r1)
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/* 80089584 000853C4 38 C1 00 08 */ addi r6, r1, 0x8
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/* 80089588 000853C8 38 80 00 05 */ li r4, 0x5
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/* 8008958C 000853CC 38 A0 00 01 */ li r5, 0x1
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/* 80089590 000853D0 48 01 48 A5 */ bl SDP_AddUuidSequence
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/* 80089594 000853D4 38 00 00 00 */ li r0, 0x0
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/* 80089598 000853D8 38 80 00 01 */ li r4, 0x1
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/* 8008959C 000853DC 3C 60 00 01 */ lis r3, 0x1
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/* 800895A0 000853E0 98 01 00 0C */ stb r0, 0xc(r1)
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/* 800895A4 000853E4 38 03 80 01 */ addi r0, r3, -0x7fff
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/* 800895A8 000853E8 80 61 00 10 */ lwz r3, 0x10(r1)
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/* 800895AC 000853EC 98 81 00 0D */ stb r4, 0xd(r1)
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/* 800895B0 000853F0 54 04 04 3E */ clrlwi r4, r0, 16
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/* 800895B4 000853F4 38 E1 00 0C */ addi r7, r1, 0xc
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/* 800895B8 000853F8 38 A0 00 01 */ li r5, 0x1
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/* 800895BC 000853FC 38 C0 00 02 */ li r6, 0x2
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/* 800895C0 00085400 48 01 44 DD */ bl SDP_AddAttribute
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/* 800895C4 00085404 38 60 00 01 */ li r3, 0x1
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.global lbl_800895C8
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lbl_800895C8:
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/* 800895C8 00085408 80 01 01 24 */ lwz r0, 0x124(r1)
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/* 800895CC 0008540C 83 E1 01 1C */ lwz r31, 0x11c(r1)
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/* 800895D0 00085410 83 C1 01 18 */ lwz r30, 0x118(r1)
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/* 800895D4 00085414 7C 08 03 A6 */ mtlr r0
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/* 800895D8 00085418 38 21 01 20 */ addi r1, r1, 0x120
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/* 800895DC 0008541C 4E 80 00 20 */ blr
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