355 lines
19 KiB
ArmAsm
355 lines
19 KiB
ArmAsm
.include "macros.inc"
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.section .text, "ax" # 0x80006A00 - 0x80406260 ; 0x003FF860
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.global GDSetGenMode2__Q34nw4r3g3d4fifoFUcUcUcUc11_GXCullMode
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GDSetGenMode2__Q34nw4r3g3d4fifoFUcUcUcUc11_GXCullMode:
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/* 800DBF50 000D7D90 3D 40 CC 01 */ lis r10, 0xCC008000@ha
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/* 800DBF54 000D7D94 39 60 00 61 */ li r11, 0x61
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/* 800DBF58 000D7D98 99 6A 80 00 */ stb r11, 0xCC008000@l(r10)
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/* 800DBF5C 000D7D9C 3D 20 FE 08 */ lis r9, 0xFE07FC3F@ha
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/* 800DBF60 000D7DA0 39 02 90 30 */ addi r8, r2, cm2hw__Q34nw4r3g3d4fifo_8055EFB0@sda21
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/* 800DBF64 000D7DA4 38 A5 FF FF */ addi r5, r5, -0x1
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/* 800DBF68 000D7DA8 38 09 FC 3F */ addi r0, r9, 0xFE07FC3F@l
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/* 800DBF6C 000D7DAC 90 0A 80 00 */ stw r0, -0x8000(r10)
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/* 800DBF70 000D7DB0 7C E8 38 AE */ lbzx r7, r8, r7
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/* 800DBF74 000D7DB4 54 80 25 36 */ rlwinm r0, r4, 4, 20, 27
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/* 800DBF78 000D7DB8 54 C8 82 1E */ rlwinm r8, r6, 16, 8, 15
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/* 800DBF7C 000D7DBC 99 6A 80 00 */ stb r11, -0x8000(r10)
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/* 800DBF80 000D7DC0 54 E6 70 22 */ slwi r6, r7, 14
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/* 800DBF84 000D7DC4 54 A5 50 2A */ slwi r5, r5, 10
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/* 800DBF88 000D7DC8 7C 60 03 78 */ or r0, r3, r0
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/* 800DBF8C 000D7DCC 38 E0 00 10 */ li r7, 0x10
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/* 800DBF90 000D7DD0 7D 08 33 78 */ or r8, r8, r6
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/* 800DBF94 000D7DD4 38 C0 00 00 */ li r6, 0x0
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/* 800DBF98 000D7DD8 7C A0 03 78 */ or r0, r5, r0
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/* 800DBF9C 000D7DDC 38 A0 10 09 */ li r5, 0x1009
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/* 800DBFA0 000D7DE0 7D 00 03 78 */ or r0, r8, r0
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/* 800DBFA4 000D7DE4 90 0A 80 00 */ stw r0, -0x8000(r10)
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/* 800DBFA8 000D7DE8 38 00 10 3F */ li r0, 0x103f
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/* 800DBFAC 000D7DEC 98 EA 80 00 */ stb r7, -0x8000(r10)
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/* 800DBFB0 000D7DF0 B0 CA 80 00 */ sth r6, -0x8000(r10)
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/* 800DBFB4 000D7DF4 B0 AA 80 00 */ sth r5, -0x8000(r10)
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/* 800DBFB8 000D7DF8 90 8A 80 00 */ stw r4, -0x8000(r10)
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/* 800DBFBC 000D7DFC 98 EA 80 00 */ stb r7, -0x8000(r10)
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/* 800DBFC0 000D7E00 B0 CA 80 00 */ sth r6, -0x8000(r10)
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/* 800DBFC4 000D7E04 B0 0A 80 00 */ sth r0, -0x8000(r10)
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/* 800DBFC8 000D7E08 90 6A 80 00 */ stw r3, -0x8000(r10)
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/* 800DBFCC 000D7E0C 4E 80 00 20 */ blr
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.global GDSetCullMode__Q34nw4r3g3d4fifoF11_GXCullMode
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GDSetCullMode__Q34nw4r3g3d4fifoF11_GXCullMode:
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/* 800DBFD0 000D7E10 3C A0 CC 01 */ lis r5, 0xCC008000@ha
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/* 800DBFD4 000D7E14 38 C0 00 61 */ li r6, 0x61
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/* 800DBFD8 000D7E18 98 C5 80 00 */ stb r6, 0xCC008000@l(r5)
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/* 800DBFDC 000D7E1C 3C 80 FE 01 */ lis r4, 0xFE00C000@ha
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/* 800DBFE0 000D7E20 38 04 C0 00 */ addi r0, r4, 0xFE00C000@l
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/* 800DBFE4 000D7E24 90 05 80 00 */ stw r0, -0x8000(r5)
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/* 800DBFE8 000D7E28 38 82 90 30 */ addi r4, r2, cm2hw__Q34nw4r3g3d4fifo_8055EFB0@sda21
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/* 800DBFEC 000D7E2C 7C 04 18 AE */ lbzx r0, r4, r3
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/* 800DBFF0 000D7E30 98 C5 80 00 */ stb r6, -0x8000(r5)
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/* 800DBFF4 000D7E34 54 00 70 22 */ slwi r0, r0, 14
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/* 800DBFF8 000D7E38 90 05 80 00 */ stw r0, -0x8000(r5)
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/* 800DBFFC 000D7E3C 4E 80 00 20 */ blr
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.global GDSetTexCoordScale2__Q34nw4r3g3d4fifoF13_GXTexCoordIDUsUcUcUsUcUc
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GDSetTexCoordScale2__Q34nw4r3g3d4fifoF13_GXTexCoordIDUsUcUcUsUcUc:
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/* 800DC000 000D7E40 3D 40 CC 01 */ lis r10, 0xCC008000@ha
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/* 800DC004 000D7E44 39 60 00 61 */ li r11, 0x61
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/* 800DC008 000D7E48 99 6A 80 00 */ stb r11, 0xCC008000@l(r10)
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/* 800DC00C 000D7E4C 54 6C 08 3C */ slwi r12, r3, 1
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/* 800DC010 000D7E50 3C 60 FE 04 */ lis r3, 0xFE03FFFF@ha
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/* 800DC014 000D7E54 38 84 FF FF */ addi r4, r4, -0x1
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/* 800DC018 000D7E58 38 03 FF FF */ addi r0, r3, 0xFE03FFFF@l
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/* 800DC01C 000D7E5C 90 0A 80 00 */ stw r0, -0x8000(r10)
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/* 800DC020 000D7E60 54 A3 82 1E */ rlwinm r3, r5, 16, 8, 15
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/* 800DC024 000D7E64 54 C5 89 DC */ rlwinm r5, r6, 17, 7, 14
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/* 800DC028 000D7E68 7C 84 1B 78 */ or r4, r4, r3
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/* 800DC02C 000D7E6C 38 0C 00 30 */ addi r0, r12, 0x30
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/* 800DC030 000D7E70 54 03 C0 0E */ slwi r3, r0, 24
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/* 800DC034 000D7E74 99 6A 80 00 */ stb r11, -0x8000(r10)
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/* 800DC038 000D7E78 7C A4 23 78 */ or r4, r5, r4
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/* 800DC03C 000D7E7C 38 0C 00 31 */ addi r0, r12, 0x31
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/* 800DC040 000D7E80 7C 83 1B 78 */ or r3, r4, r3
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/* 800DC044 000D7E84 90 6A 80 00 */ stw r3, -0x8000(r10)
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/* 800DC048 000D7E88 38 87 FF FF */ addi r4, r7, -0x1
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/* 800DC04C 000D7E8C 55 25 89 DC */ rlwinm r5, r9, 17, 7, 14
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/* 800DC050 000D7E90 55 03 82 1E */ rlwinm r3, r8, 16, 8, 15
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/* 800DC054 000D7E94 99 6A 80 00 */ stb r11, -0x8000(r10)
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/* 800DC058 000D7E98 7C 83 1B 78 */ or r3, r4, r3
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/* 800DC05C 000D7E9C 54 00 C0 0E */ slwi r0, r0, 24
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/* 800DC060 000D7EA0 7C A3 1B 78 */ or r3, r5, r3
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/* 800DC064 000D7EA4 7C 60 03 78 */ or r0, r3, r0
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/* 800DC068 000D7EA8 90 0A 80 00 */ stw r0, -0x8000(r10)
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/* 800DC06C 000D7EAC 4E 80 00 20 */ blr
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.global GDSetIndTexMtx__Q34nw4r3g3d4fifoFUlRCQ34nw4r4math5MTX34
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GDSetIndTexMtx__Q34nw4r3g3d4fifoFUlRCQ34nw4r4math5MTX34:
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/* 800DC070 000D7EB0 C0 44 00 00 */ lfs f2, 0x0(r4)
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/* 800DC074 000D7EB4 39 20 00 00 */ li r9, 0x0
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/* 800DC078 000D7EB8 C0 64 00 04 */ lfs f3, 0x4(r4)
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/* 800DC07C 000D7EBC FC 80 12 10 */ fabs f4, f2
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/* 800DC080 000D7EC0 C0 02 90 34 */ lfs f0, "@6418"@sda21(r2)
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/* 800DC084 000D7EC4 C0 A4 00 08 */ lfs f5, 0x8(r4)
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/* 800DC088 000D7EC8 FD 20 1A 10 */ fabs f9, f3
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/* 800DC08C 000D7ECC C0 C4 00 10 */ lfs f6, 0x10(r4)
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/* 800DC090 000D7ED0 C0 E4 00 14 */ lfs f7, 0x14(r4)
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/* 800DC094 000D7ED4 C1 04 00 18 */ lfs f8, 0x18(r4)
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/* 800DC098 000D7ED8 FC 04 00 40 */ fcmpo cr0, f4, f0
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/* 800DC09C 000D7EDC FD 40 2A 10 */ fabs f10, f5
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/* 800DC0A0 000D7EE0 94 21 FF C0 */ stwu r1, -0x40(r1)
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/* 800DC0A4 000D7EE4 FD 60 32 10 */ fabs f11, f6
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/* 800DC0A8 000D7EE8 FD 80 3A 10 */ fabs f12, f7
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/* 800DC0AC 000D7EEC FD A0 42 10 */ fabs f13, f8
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/* 800DC0B0 000D7EF0 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0B4 000D7EF4 41 82 00 40 */ beq lbl_800DC0F4
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/* 800DC0B8 000D7EF8 FC 09 00 40 */ fcmpo cr0, f9, f0
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/* 800DC0BC 000D7EFC 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0C0 000D7F00 41 82 00 34 */ beq lbl_800DC0F4
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/* 800DC0C4 000D7F04 FC 0A 00 40 */ fcmpo cr0, f10, f0
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/* 800DC0C8 000D7F08 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0CC 000D7F0C 41 82 00 28 */ beq lbl_800DC0F4
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/* 800DC0D0 000D7F10 FC 0B 00 40 */ fcmpo cr0, f11, f0
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/* 800DC0D4 000D7F14 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0D8 000D7F18 41 82 00 1C */ beq lbl_800DC0F4
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/* 800DC0DC 000D7F1C FC 0C 00 40 */ fcmpo cr0, f12, f0
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/* 800DC0E0 000D7F20 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0E4 000D7F24 41 82 00 10 */ beq lbl_800DC0F4
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/* 800DC0E8 000D7F28 FC 0D 00 40 */ fcmpo cr0, f13, f0
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/* 800DC0EC 000D7F2C 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC0F0 000D7F30 40 82 00 9C */ bne lbl_800DC18C
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.global lbl_800DC0F4
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lbl_800DC0F4:
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/* 800DC0F4 000D7F34 C0 22 90 38 */ lfs f1, "@6419"@sda21(r2)
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/* 800DC0F8 000D7F38 C0 02 90 34 */ lfs f0, "@6418"@sda21(r2)
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/* 800DC0FC 000D7F3C 60 00 00 00 */ nop
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.global lbl_800DC100
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lbl_800DC100:
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/* 800DC100 000D7F40 7D 20 07 74 */ extsb r0, r9
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/* 800DC104 000D7F44 2C 00 00 2E */ cmpwi r0, 0x2e
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/* 800DC108 000D7F48 40 80 01 2C */ bge lbl_800DC234
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/* 800DC10C 000D7F4C EC 84 00 72 */ fmuls f4, f4, f1
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/* 800DC110 000D7F50 EC 42 00 72 */ fmuls f2, f2, f1
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/* 800DC114 000D7F54 EC 63 00 72 */ fmuls f3, f3, f1
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/* 800DC118 000D7F58 FC 04 00 40 */ fcmpo cr0, f4, f0
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/* 800DC11C 000D7F5C EC A5 00 72 */ fmuls f5, f5, f1
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/* 800DC120 000D7F60 EC C6 00 72 */ fmuls f6, f6, f1
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/* 800DC124 000D7F64 EC E7 00 72 */ fmuls f7, f7, f1
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/* 800DC128 000D7F68 ED 08 00 72 */ fmuls f8, f8, f1
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/* 800DC12C 000D7F6C ED 29 00 72 */ fmuls f9, f9, f1
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/* 800DC130 000D7F70 ED 4A 00 72 */ fmuls f10, f10, f1
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/* 800DC134 000D7F74 ED 6B 00 72 */ fmuls f11, f11, f1
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/* 800DC138 000D7F78 ED 8C 00 72 */ fmuls f12, f12, f1
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/* 800DC13C 000D7F7C ED AD 00 72 */ fmuls f13, f13, f1
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/* 800DC140 000D7F80 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC144 000D7F84 39 29 00 01 */ addi r9, r9, 0x1
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/* 800DC148 000D7F88 41 82 FF B8 */ beq lbl_800DC100
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/* 800DC14C 000D7F8C FC 09 00 40 */ fcmpo cr0, f9, f0
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/* 800DC150 000D7F90 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC154 000D7F94 41 82 FF AC */ beq lbl_800DC100
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/* 800DC158 000D7F98 FC 0A 00 40 */ fcmpo cr0, f10, f0
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/* 800DC15C 000D7F9C 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC160 000D7FA0 41 82 FF A0 */ beq lbl_800DC100
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/* 800DC164 000D7FA4 FC 0B 00 40 */ fcmpo cr0, f11, f0
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/* 800DC168 000D7FA8 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC16C 000D7FAC 41 82 FF 94 */ beq lbl_800DC100
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/* 800DC170 000D7FB0 FC 0C 00 40 */ fcmpo cr0, f12, f0
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/* 800DC174 000D7FB4 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC178 000D7FB8 41 82 FF 88 */ beq lbl_800DC100
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/* 800DC17C 000D7FBC FC 0D 00 40 */ fcmpo cr0, f13, f0
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/* 800DC180 000D7FC0 4C 41 13 82 */ cror eq, gt, eq
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/* 800DC184 000D7FC4 41 82 FF 7C */ beq lbl_800DC100
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/* 800DC188 000D7FC8 48 00 00 AC */ b lbl_800DC234
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.global lbl_800DC18C
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lbl_800DC18C:
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/* 800DC18C 000D7FCC C0 22 90 38 */ lfs f1, "@6419"@sda21(r2)
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/* 800DC190 000D7FD0 FC 04 08 40 */ fcmpo cr0, f4, f1
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/* 800DC194 000D7FD4 40 80 00 A0 */ bge lbl_800DC234
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/* 800DC198 000D7FD8 FC 09 08 40 */ fcmpo cr0, f9, f1
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/* 800DC19C 000D7FDC 40 80 00 98 */ bge lbl_800DC234
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/* 800DC1A0 000D7FE0 FC 0A 08 40 */ fcmpo cr0, f10, f1
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/* 800DC1A4 000D7FE4 40 80 00 90 */ bge lbl_800DC234
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/* 800DC1A8 000D7FE8 FC 0B 08 40 */ fcmpo cr0, f11, f1
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/* 800DC1AC 000D7FEC 40 80 00 88 */ bge lbl_800DC234
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/* 800DC1B0 000D7FF0 FC 0C 08 40 */ fcmpo cr0, f12, f1
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/* 800DC1B4 000D7FF4 40 80 00 80 */ bge lbl_800DC234
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/* 800DC1B8 000D7FF8 FC 0D 08 40 */ fcmpo cr0, f13, f1
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/* 800DC1BC 000D7FFC 40 80 00 78 */ bge lbl_800DC234
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/* 800DC1C0 000D8000 C0 02 90 3C */ lfs f0, "@6420"@sda21(r2)
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.global lbl_800DC1C4
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lbl_800DC1C4:
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/* 800DC1C4 000D8004 EC 84 00 32 */ fmuls f4, f4, f0
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/* 800DC1C8 000D8008 39 29 FF FF */ addi r9, r9, -0x1
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/* 800DC1CC 000D800C EC 42 00 32 */ fmuls f2, f2, f0
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/* 800DC1D0 000D8010 EC 63 00 32 */ fmuls f3, f3, f0
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/* 800DC1D4 000D8014 FC 04 08 40 */ fcmpo cr0, f4, f1
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/* 800DC1D8 000D8018 EC A5 00 32 */ fmuls f5, f5, f0
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/* 800DC1DC 000D801C EC C6 00 32 */ fmuls f6, f6, f0
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/* 800DC1E0 000D8020 EC E7 00 32 */ fmuls f7, f7, f0
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/* 800DC1E4 000D8024 ED 08 00 32 */ fmuls f8, f8, f0
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/* 800DC1E8 000D8028 ED 29 00 32 */ fmuls f9, f9, f0
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/* 800DC1EC 000D802C ED 4A 00 32 */ fmuls f10, f10, f0
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/* 800DC1F0 000D8030 ED 6B 00 32 */ fmuls f11, f11, f0
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/* 800DC1F4 000D8034 ED 8C 00 32 */ fmuls f12, f12, f0
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/* 800DC1F8 000D8038 ED AD 00 32 */ fmuls f13, f13, f0
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/* 800DC1FC 000D803C 40 80 00 38 */ bge lbl_800DC234
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/* 800DC200 000D8040 FC 09 08 40 */ fcmpo cr0, f9, f1
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/* 800DC204 000D8044 40 80 00 30 */ bge lbl_800DC234
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/* 800DC208 000D8048 FC 0A 08 40 */ fcmpo cr0, f10, f1
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/* 800DC20C 000D804C 40 80 00 28 */ bge lbl_800DC234
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/* 800DC210 000D8050 FC 0B 08 40 */ fcmpo cr0, f11, f1
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/* 800DC214 000D8054 40 80 00 20 */ bge lbl_800DC234
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/* 800DC218 000D8058 FC 0C 08 40 */ fcmpo cr0, f12, f1
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/* 800DC21C 000D805C 40 80 00 18 */ bge lbl_800DC234
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/* 800DC220 000D8060 FC 0D 08 40 */ fcmpo cr0, f13, f1
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/* 800DC224 000D8064 40 80 00 10 */ bge lbl_800DC234
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/* 800DC228 000D8068 7D 20 07 74 */ extsb r0, r9
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/* 800DC22C 000D806C 2C 00 FF EF */ cmpwi r0, -0x11
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/* 800DC230 000D8070 41 81 FF 94 */ bgt lbl_800DC1C4
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.global lbl_800DC234
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lbl_800DC234:
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/* 800DC234 000D8074 C0 82 90 40 */ lfs f4, "@6421"@sda21(r2)
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/* 800DC238 000D8078 39 29 00 11 */ addi r9, r9, 0x11
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/* 800DC23C 000D807C 38 03 00 06 */ addi r0, r3, 0x6
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/* 800DC240 000D8080 38 83 00 07 */ addi r4, r3, 0x7
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/* 800DC244 000D8084 EC 44 00 B2 */ fmuls f2, f4, f2
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/* 800DC248 000D8088 55 26 B2 12 */ rlwinm r6, r9, 22, 8, 9
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/* 800DC24C 000D808C EC 04 01 B2 */ fmuls f0, f4, f6
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/* 800DC250 000D8090 3C E0 CC 01 */ lis r7, 0xCC008000@ha
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/* 800DC254 000D8094 EC 24 00 F2 */ fmuls f1, f4, f3
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/* 800DC258 000D8098 39 00 00 61 */ li r8, 0x61
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/* 800DC25C 000D809C FC 60 10 1E */ fctiwz f3, f2
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/* 800DC260 000D80A0 50 06 C0 0E */ rlwimi r6, r0, 24, 0, 7
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/* 800DC264 000D80A4 FC 40 00 1E */ fctiwz f2, f0
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/* 800DC268 000D80A8 99 07 80 00 */ stb r8, 0xCC008000@l(r7)
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/* 800DC26C 000D80AC EC 04 01 F2 */ fmuls f0, f4, f7
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/* 800DC270 000D80B0 38 63 00 08 */ addi r3, r3, 0x8
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/* 800DC274 000D80B4 D8 61 00 08 */ stfd f3, 0x8(r1)
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/* 800DC278 000D80B8 FC 60 08 1E */ fctiwz f3, f1
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/* 800DC27C 000D80BC EC 24 01 72 */ fmuls f1, f4, f5
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/* 800DC280 000D80C0 D8 41 00 10 */ stfd f2, 0x10(r1)
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/* 800DC284 000D80C4 FC 40 00 1E */ fctiwz f2, f0
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/* 800DC288 000D80C8 EC 04 02 32 */ fmuls f0, f4, f8
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/* 800DC28C 000D80CC 80 A1 00 0C */ lwz r5, 0xc(r1)
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/* 800DC290 000D80D0 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 800DC294 000D80D4 FC 20 08 1E */ fctiwz f1, f1
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/* 800DC298 000D80D8 D8 61 00 18 */ stfd f3, 0x18(r1)
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/* 800DC29C 000D80DC 54 00 5A A8 */ rlwinm r0, r0, 11, 10, 20
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/* 800DC2A0 000D80E0 50 A0 05 7E */ rlwimi r0, r5, 0, 21, 31
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/* 800DC2A4 000D80E4 FC 00 00 1E */ fctiwz f0, f0
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/* 800DC2A8 000D80E8 7C C0 03 78 */ or r0, r6, r0
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/* 800DC2AC 000D80EC 90 07 80 00 */ stw r0, -0x8000(r7)
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/* 800DC2B0 000D80F0 55 26 A2 12 */ rlwinm r6, r9, 20, 8, 9
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/* 800DC2B4 000D80F4 50 86 C0 0E */ rlwimi r6, r4, 24, 0, 7
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/* 800DC2B8 000D80F8 80 81 00 1C */ lwz r4, 0x1c(r1)
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/* 800DC2BC 000D80FC D8 41 00 20 */ stfd f2, 0x20(r1)
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/* 800DC2C0 000D8100 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 800DC2C4 000D8104 99 07 80 00 */ stb r8, -0x8000(r7)
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/* 800DC2C8 000D8108 54 05 5A A8 */ rlwinm r5, r0, 11, 10, 20
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/* 800DC2CC 000D810C 50 85 05 7E */ rlwimi r5, r4, 0, 21, 31
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/* 800DC2D0 000D8110 D8 01 00 30 */ stfd f0, 0x30(r1)
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/* 800DC2D4 000D8114 7C C5 2B 78 */ or r5, r6, r5
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/* 800DC2D8 000D8118 55 24 92 12 */ rlwinm r4, r9, 18, 8, 9
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/* 800DC2DC 000D811C 90 A7 80 00 */ stw r5, -0x8000(r7)
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/* 800DC2E0 000D8120 50 64 C0 0E */ rlwimi r4, r3, 24, 0, 7
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|
/* 800DC2E4 000D8124 80 01 00 34 */ lwz r0, 0x34(r1)
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/* 800DC2E8 000D8128 D8 21 00 28 */ stfd f1, 0x28(r1)
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/* 800DC2EC 000D812C 54 00 5A A8 */ rlwinm r0, r0, 11, 10, 20
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/* 800DC2F0 000D8130 80 61 00 2C */ lwz r3, 0x2c(r1)
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/* 800DC2F4 000D8134 99 07 80 00 */ stb r8, -0x8000(r7)
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/* 800DC2F8 000D8138 50 60 05 7E */ rlwimi r0, r3, 0, 21, 31
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/* 800DC2FC 000D813C 7C 80 03 78 */ or r0, r4, r0
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/* 800DC300 000D8140 90 07 80 00 */ stw r0, -0x8000(r7)
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/* 800DC304 000D8144 38 21 00 40 */ addi r1, r1, 0x40
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/* 800DC308 000D8148 4E 80 00 20 */ blr
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|
/* 800DC30C 000D814C 00 00 00 00 */ .4byte 0x00000000
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.global GDResetCurrentMtx__Q34nw4r3g3d4fifoFv
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GDResetCurrentMtx__Q34nw4r3g3d4fifoFv:
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/* 800DC310 000D8150 3D 00 CC 01 */ lis r8, 0xCC008000@ha
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/* 800DC314 000D8154 39 20 00 08 */ li r9, 0x8
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/* 800DC318 000D8158 99 28 80 00 */ stb r9, 0xCC008000@l(r8)
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/* 800DC31C 000D815C 38 00 00 30 */ li r0, 0x30
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/* 800DC320 000D8160 3C 80 3C F4 */ lis r4, 0x3cf4
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/* 800DC324 000D8164 3C 60 00 F4 */ lis r3, 0xf4
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/* 800DC328 000D8168 98 08 80 00 */ stb r0, -0x8000(r8)
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/* 800DC32C 000D816C 38 E4 CF 00 */ addi r7, r4, -0x3100
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/* 800DC330 000D8170 38 A3 CF 3C */ addi r5, r3, -0x30c4
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/* 800DC334 000D8174 38 C0 00 40 */ li r6, 0x40
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|
/* 800DC338 000D8178 90 E8 80 00 */ stw r7, -0x8000(r8)
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/* 800DC33C 000D817C 38 80 00 10 */ li r4, 0x10
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|
/* 800DC340 000D8180 38 60 00 01 */ li r3, 0x1
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/* 800DC344 000D8184 38 00 10 18 */ li r0, 0x1018
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|
/* 800DC348 000D8188 99 28 80 00 */ stb r9, -0x8000(r8)
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|
/* 800DC34C 000D818C 98 C8 80 00 */ stb r6, -0x8000(r8)
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/* 800DC350 000D8190 90 A8 80 00 */ stw r5, -0x8000(r8)
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|
/* 800DC354 000D8194 98 88 80 00 */ stb r4, -0x8000(r8)
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|
/* 800DC358 000D8198 B0 68 80 00 */ sth r3, -0x8000(r8)
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|
/* 800DC35C 000D819C B0 08 80 00 */ sth r0, -0x8000(r8)
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|
/* 800DC360 000D81A0 90 E8 80 00 */ stw r7, -0x8000(r8)
|
|
/* 800DC364 000D81A4 90 A8 80 00 */ stw r5, -0x8000(r8)
|
|
/* 800DC368 000D81A8 4E 80 00 20 */ blr
|
|
/* 800DC36C 000D81AC 00 00 00 00 */ .4byte 0x00000000
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|
.global GDSetCurrentMtx__Q34nw4r3g3d4fifoFPCUl
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GDSetCurrentMtx__Q34nw4r3g3d4fifoFPCUl:
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/* 800DC370 000D81B0 3C A0 CC 01 */ lis r5, 0xCC008000@ha
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|
/* 800DC374 000D81B4 38 00 00 10 */ li r0, 0x10
|
|
/* 800DC378 000D81B8 98 05 80 00 */ stb r0, 0xCC008000@l(r5)
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|
/* 800DC37C 000D81BC 38 80 00 01 */ li r4, 0x1
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|
/* 800DC380 000D81C0 80 E3 00 00 */ lwz r7, 0x0(r3)
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|
/* 800DC384 000D81C4 38 00 10 18 */ li r0, 0x1018
|
|
/* 800DC388 000D81C8 81 03 00 08 */ lwz r8, 0x8(r3)
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|
/* 800DC38C 000D81CC B0 85 80 00 */ sth r4, -0x8000(r5)
|
|
/* 800DC390 000D81D0 54 E7 30 32 */ slwi r7, r7, 6
|
|
/* 800DC394 000D81D4 80 C3 00 04 */ lwz r6, 0x4(r3)
|
|
/* 800DC398 000D81D8 55 08 90 1A */ slwi r8, r8, 18
|
|
/* 800DC39C 000D81DC 81 23 00 0C */ lwz r9, 0xc(r3)
|
|
/* 800DC3A0 000D81E0 54 C4 60 26 */ slwi r4, r6, 12
|
|
/* 800DC3A4 000D81E4 80 C3 00 18 */ lwz r6, 0x18(r3)
|
|
/* 800DC3A8 000D81E8 7C E7 23 78 */ or r7, r7, r4
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|
/* 800DC3AC 000D81EC 80 83 00 14 */ lwz r4, 0x14(r3)
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|
/* 800DC3B0 000D81F0 7D 08 3B 78 */ or r8, r8, r7
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|
/* 800DC3B4 000D81F4 80 E3 00 1C */ lwz r7, 0x1c(r3)
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|
/* 800DC3B8 000D81F8 B0 05 80 00 */ sth r0, -0x8000(r5)
|
|
/* 800DC3BC 000D81FC 55 29 C0 0E */ slwi r9, r9, 24
|
|
/* 800DC3C0 000D8200 54 80 30 32 */ slwi r0, r4, 6
|
|
/* 800DC3C4 000D8204 80 63 00 10 */ lwz r3, 0x10(r3)
|
|
/* 800DC3C8 000D8208 7D 28 43 78 */ or r8, r9, r8
|
|
/* 800DC3CC 000D820C 91 05 80 00 */ stw r8, -0x8000(r5)
|
|
/* 800DC3D0 000D8210 7C 60 03 78 */ or r0, r3, r0
|
|
/* 800DC3D4 000D8214 54 C4 60 26 */ slwi r4, r6, 12
|
|
/* 800DC3D8 000D8218 54 E3 90 1A */ slwi r3, r7, 18
|
|
/* 800DC3DC 000D821C 7C 80 03 78 */ or r0, r4, r0
|
|
/* 800DC3E0 000D8220 7C 60 03 78 */ or r0, r3, r0
|
|
/* 800DC3E4 000D8224 90 05 80 00 */ stw r0, -0x8000(r5)
|
|
/* 800DC3E8 000D8228 4E 80 00 20 */ blr
|
|
/* 800DC3EC 000D822C 00 00 00 00 */ .4byte 0x00000000
|
|
.global GDLoadTexMtxImm3x3__Q34nw4r3g3d4fifoFRCQ34nw4r4math5MTX33Ul
|
|
GDLoadTexMtxImm3x3__Q34nw4r3g3d4fifoFRCQ34nw4r4math5MTX33Ul:
|
|
/* 800DC3F0 000D8230 94 21 FF C0 */ stwu r1, -0x40(r1)
|
|
/* 800DC3F4 000D8234 7C 08 02 A6 */ mflr r0
|
|
/* 800DC3F8 000D8238 C0 C2 90 44 */ lfs f6, "@6433"@sda21(r2)
|
|
/* 800DC3FC 000D823C 38 A0 00 00 */ li r5, 0x0
|
|
/* 800DC400 000D8240 90 01 00 44 */ stw r0, 0x44(r1)
|
|
/* 800DC404 000D8244 C1 23 00 00 */ lfs f9, 0x0(r3)
|
|
/* 800DC408 000D8248 C1 03 00 04 */ lfs f8, 0x4(r3)
|
|
/* 800DC40C 000D824C C0 E3 00 08 */ lfs f7, 0x8(r3)
|
|
/* 800DC410 000D8250 C0 A3 00 0C */ lfs f5, 0xc(r3)
|
|
/* 800DC414 000D8254 C0 83 00 10 */ lfs f4, 0x10(r3)
|
|
/* 800DC418 000D8258 C0 63 00 14 */ lfs f3, 0x14(r3)
|
|
/* 800DC41C 000D825C C0 43 00 18 */ lfs f2, 0x18(r3)
|
|
/* 800DC420 000D8260 C0 23 00 1C */ lfs f1, 0x1c(r3)
|
|
/* 800DC424 000D8264 C0 03 00 20 */ lfs f0, 0x20(r3)
|
|
/* 800DC428 000D8268 38 61 00 08 */ addi r3, r1, 0x8
|
|
/* 800DC42C 000D826C D1 21 00 08 */ stfs f9, 0x8(r1)
|
|
/* 800DC430 000D8270 D1 01 00 0C */ stfs f8, 0xc(r1)
|
|
/* 800DC434 000D8274 D0 E1 00 10 */ stfs f7, 0x10(r1)
|
|
/* 800DC438 000D8278 D0 C1 00 14 */ stfs f6, 0x14(r1)
|
|
/* 800DC43C 000D827C D0 A1 00 18 */ stfs f5, 0x18(r1)
|
|
/* 800DC440 000D8280 D0 81 00 1C */ stfs f4, 0x1c(r1)
|
|
/* 800DC444 000D8284 D0 61 00 20 */ stfs f3, 0x20(r1)
|
|
/* 800DC448 000D8288 D0 C1 00 24 */ stfs f6, 0x24(r1)
|
|
/* 800DC44C 000D828C D0 41 00 28 */ stfs f2, 0x28(r1)
|
|
/* 800DC450 000D8290 D0 21 00 2C */ stfs f1, 0x2c(r1)
|
|
/* 800DC454 000D8294 D0 01 00 30 */ stfs f0, 0x30(r1)
|
|
/* 800DC458 000D8298 D0 C1 00 34 */ stfs f6, 0x34(r1)
|
|
/* 800DC45C 000D829C 4B F5 C9 05 */ bl GXLoadTexMtxImm
|
|
/* 800DC460 000D82A0 80 01 00 44 */ lwz r0, 0x44(r1)
|
|
/* 800DC464 000D82A4 7C 08 03 A6 */ mtlr r0
|
|
/* 800DC468 000D82A8 38 21 00 40 */ addi r1, r1, 0x40
|
|
/* 800DC46C 000D82AC 4E 80 00 20 */ blr
|