96 lines
4.3 KiB
ArmAsm
96 lines
4.3 KiB
ArmAsm
.include "macros.inc"
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.section .text0, "ax" # 0x80004000 - 0x80006740
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.global __init_hardware
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__init_hardware:
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/* 80006620 00002720 7C 00 00 A6 */ mfmsr r0
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/* 80006624 00002724 60 00 20 00 */ ori r0, r0, 0x2000
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/* 80006628 00002728 7C 00 01 24 */ mtmsr r0
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/* 8000662C 0000272C 7F E8 02 A6 */ mflr r31
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/* 80006630 00002730 48 01 50 41 */ bl __OSPSInit
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/* 80006634 00002734 48 01 3C 8D */ bl __OSFPRInit
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/* 80006638 00002738 48 01 68 69 */ bl __OSCacheInit
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/* 8000663C 0000273C 7F E8 03 A6 */ mtlr r31
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/* 80006640 00002740 4E 80 00 20 */ blr
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/* 80006644 00002744 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 80006648 00002748 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 8000664C 0000274C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __flush_cache
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__flush_cache:
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/* 80006650 00002750 3C A0 FF FF */ lis r5, 0xFFFFFFF1@h
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/* 80006654 00002754 60 A5 FF F1 */ ori r5, r5, 0xFFFFFFF1@l
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/* 80006658 00002758 7C A5 18 38 */ and r5, r5, r3
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/* 8000665C 0000275C 7C 65 18 50 */ subf r3, r5, r3
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/* 80006660 00002760 7C 84 1A 14 */ add r4, r4, r3
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lbl_80006664:
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/* 80006664 00002764 7C 00 28 6C */ dcbst 0, r5
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/* 80006668 00002768 7C 00 04 AC */ sync 0
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/* 8000666C 0000276C 7C 00 2F AC */ icbi 0, r5
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/* 80006670 00002770 30 A5 00 08 */ addic r5, r5, 8
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/* 80006674 00002774 34 84 FF F8 */ addic. r4, r4, -8
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/* 80006678 00002778 40 80 FF EC */ bge lbl_80006664
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/* 8000667C 0000277C 4C 00 01 2C */ isync
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/* 80006680 00002780 4E 80 00 20 */ blr
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.section .text1, "ax" # 0x80006A00 - 0x80406260
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.global __init_user
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__init_user:
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/* 80028530 00024370 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80028534 00024374 7C 08 02 A6 */ mflr r0
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/* 80028538 00024378 90 01 00 14 */ stw r0, 0x14(r1)
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/* 8002853C 0002437C 48 00 00 15 */ bl __init_cpp
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/* 80028540 00024380 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80028544 00024384 7C 08 03 A6 */ mtlr r0
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/* 80028548 00024388 38 21 00 10 */ addi r1, r1, 0x10
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/* 8002854C 0002438C 4E 80 00 20 */ blr
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.global __init_cpp
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__init_cpp:
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/* 80028550 00024390 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80028554 00024394 7C 08 02 A6 */ mflr r0
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/* 80028558 00024398 90 01 00 14 */ stw r0, 0x14(r1)
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/* 8002855C 0002439C 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80028560 000243A0 3F E0 80 40 */ lis r31, __init_cpp_exceptions_reference@ha
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/* 80028564 000243A4 3B FF 62 60 */ addi r31, r31, __init_cpp_exceptions_reference@l
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/* 80028568 000243A8 48 00 00 10 */ b lbl_80028578
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lbl_8002856C:
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/* 8002856C 000243AC 7D 89 03 A6 */ mtctr r12
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/* 80028570 000243B0 4E 80 04 21 */ bctrl
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/* 80028574 000243B4 3B FF 00 04 */ addi r31, r31, 4
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lbl_80028578:
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/* 80028578 000243B8 81 9F 00 00 */ lwz r12, 0(r31)
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/* 8002857C 000243BC 2C 0C 00 00 */ cmpwi r12, 0
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/* 80028580 000243C0 40 82 FF EC */ bne lbl_8002856C
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/* 80028584 000243C4 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80028588 000243C8 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 8002858C 000243CC 7C 08 03 A6 */ mtlr r0
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/* 80028590 000243D0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80028594 000243D4 4E 80 00 20 */ blr
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/* 80028598 000243D8 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 8002859C 000243DC 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global exit
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exit:
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/* 800285A0 000243E0 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 800285A4 000243E4 7C 08 02 A6 */ mflr r0
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/* 800285A8 000243E8 90 01 00 14 */ stw r0, 0x14(r1)
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/* 800285AC 000243EC 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 800285B0 000243F0 3F E0 80 40 */ lis r31, __destroy_global_chain_reference@ha
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/* 800285B4 000243F4 3B FF 65 40 */ addi r31, r31, __destroy_global_chain_reference@l
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/* 800285B8 000243F8 48 00 00 10 */ b lbl_800285C8
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lbl_800285BC:
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/* 800285BC 000243FC 7D 89 03 A6 */ mtctr r12
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/* 800285C0 00024400 4E 80 04 21 */ bctrl
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/* 800285C4 00024404 3B FF 00 04 */ addi r31, r31, 4
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lbl_800285C8:
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/* 800285C8 00024408 81 9F 00 00 */ lwz r12, 0(r31)
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/* 800285CC 0002440C 2C 0C 00 00 */ cmpwi r12, 0
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/* 800285D0 00024410 40 82 FF EC */ bne lbl_800285BC
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/* 800285D4 00024414 4B FF 1B 5D */ bl PPCHalt
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/* 800285D8 00024418 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 800285DC 0002441C 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 800285E0 00024420 7C 08 03 A6 */ mtlr r0
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/* 800285E4 00024424 38 21 00 10 */ addi r1, r1, 0x10
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/* 800285E8 00024428 4E 80 00 20 */ blr
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/* 800285EC 0002442C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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