2176 lines
103 KiB
ArmAsm
2176 lines
103 KiB
ArmAsm
.include "macros.inc"
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.section .text, "ax" # 0x80006A00 - 0x80406260 ; 0x003FF860
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.global EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
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EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34:
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/* 800B6DD0 000B2C10 94 21 FF 70 */ stwu r1, -0x90(r1)
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/* 800B6DD4 000B2C14 7C 08 02 A6 */ mflr r0
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/* 800B6DD8 000B2C18 90 01 00 94 */ stw r0, 0x94(r1)
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/* 800B6DDC 000B2C1C 39 61 00 80 */ addi r11, r1, 0x80
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/* 800B6DE0 000B2C20 DB E1 00 80 */ stfd f31, 0x80(r1)
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/* 800B6DE4 000B2C24 F3 E1 00 88 */ psq_st f31, 0x88(r1), 0, qr0
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/* 800B6DE8 000B2C28 4B F5 05 4D */ bl lbl_80007334
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/* 800B6DEC 000B2C2C FF E0 08 90 */ fmr f31, f1
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/* 800B6DF0 000B2C30 3C 00 43 30 */ lis r0, 0x4330
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/* 800B6DF4 000B2C34 7C BB 2B 78 */ mr r27, r5
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/* 800B6DF8 000B2C38 90 01 00 48 */ stw r0, 0x48(r1)
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/* 800B6DFC 000B2C3C 7C 79 1B 78 */ mr r25, r3
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/* 800B6E00 000B2C40 7C 9A 23 78 */ mr r26, r4
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/* 800B6E04 000B2C44 90 01 00 50 */ stw r0, 0x50(r1)
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/* 800B6E08 000B2C48 7C DC 33 78 */ mr r28, r6
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/* 800B6E0C 000B2C4C 7C FD 3B 78 */ mr r29, r7
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/* 800B6E10 000B2C50 7D 1E 43 78 */ mr r30, r8
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/* 800B6E14 000B2C54 7D 3F 4B 78 */ mr r31, r9
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/* 800B6E18 000B2C58 7F 63 DB 78 */ mr r3, r27
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/* 800B6E1C 000B2C5C 7F 64 DB 78 */ mr r4, r27
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/* 800B6E20 000B2C60 4B FF CB B1 */ bl Normalize__Q24nw4r2efFPQ34nw4r4math4VEC3PCQ34nw4r4math4VEC3
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/* 800B6E24 000B2C64 80 7A 00 00 */ lwz r3, 0x0(r26)
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/* 800B6E28 000B2C68 38 81 00 38 */ addi r4, r1, 0x38
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/* 800B6E2C 000B2C6C 80 1A 00 04 */ lwz r0, 0x4(r26)
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/* 800B6E30 000B2C70 90 01 00 3C */ stw r0, 0x3c(r1)
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/* 800B6E34 000B2C74 C0 02 8D 30 */ lfs f0, "@8286"@sda21(r2)
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/* 800B6E38 000B2C78 90 61 00 38 */ stw r3, 0x38(r1)
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/* 800B6E3C 000B2C7C 80 1A 00 08 */ lwz r0, 0x8(r26)
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/* 800B6E40 000B2C80 E0 44 00 00 */ psq_l f2, 0x0(r4), 0, qr0
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/* 800B6E44 000B2C84 90 01 00 40 */ stw r0, 0x40(r1)
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/* 800B6E48 000B2C88 10 42 00 B2 */ ps_mul f2, f2, f2
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/* 800B6E4C 000B2C8C C0 21 00 40 */ lfs f1, 0x40(r1)
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/* 800B6E50 000B2C90 10 21 10 7A */ ps_madd f1, f1, f1, f2
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/* 800B6E54 000B2C94 10 21 10 94 */ ps_sum0 f1, f1, f2, f2
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/* 800B6E58 000B2C98 FC 01 00 40 */ fcmpo cr0, f1, f0
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/* 800B6E5C 000B2C9C 4C 40 13 82 */ cror eq, lt, eq
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/* 800B6E60 000B2CA0 40 82 00 A8 */ bne lbl_800B6F08
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/* 800B6E64 000B2CA4 3C 60 00 03 */ lis r3, 0x3
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/* 800B6E68 000B2CA8 80 1C 00 EC */ lwz r0, 0xec(r28)
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/* 800B6E6C 000B2CAC 38 83 43 FD */ addi r4, r3, 0x43fd
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/* 800B6E70 000B2CB0 C8 C2 8D 48 */ lfd f6, "@8300"@sda21(r2)
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/* 800B6E74 000B2CB4 7C 60 21 D6 */ mullw r3, r0, r4
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/* 800B6E78 000B2CB8 C0 A2 8D 34 */ lfs f5, "@8287"@sda21(r2)
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/* 800B6E7C 000B2CBC C0 82 8D 38 */ lfs f4, "@8288"@sda21(r2)
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/* 800B6E80 000B2CC0 C0 62 8D 3C */ lfs f3, "@8289"@sda21(r2)
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/* 800B6E84 000B2CC4 3C 63 00 27 */ addis r3, r3, 0x27
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/* 800B6E88 000B2CC8 38 03 9E C3 */ addi r0, r3, -0x613d
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/* 800B6E8C 000B2CCC 7C 60 21 D6 */ mullw r3, r0, r4
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/* 800B6E90 000B2CD0 54 00 84 3E */ srwi r0, r0, 16
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/* 800B6E94 000B2CD4 90 01 00 4C */ stw r0, 0x4c(r1)
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/* 800B6E98 000B2CD8 C8 01 00 48 */ lfd f0, 0x48(r1)
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/* 800B6E9C 000B2CDC 3C 63 00 27 */ addis r3, r3, 0x27
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/* 800B6EA0 000B2CE0 EC 00 30 28 */ fsubs f0, f0, f6
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/* 800B6EA4 000B2CE4 38 03 9E C3 */ addi r0, r3, -0x613d
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/* 800B6EA8 000B2CE8 7C 60 21 D6 */ mullw r3, r0, r4
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/* 800B6EAC 000B2CEC 54 00 84 3E */ srwi r0, r0, 16
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/* 800B6EB0 000B2CF0 EC 40 28 24 */ fdivs f2, f0, f5
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/* 800B6EB4 000B2CF4 90 01 00 54 */ stw r0, 0x54(r1)
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/* 800B6EB8 000B2CF8 C8 01 00 50 */ lfd f0, 0x50(r1)
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/* 800B6EBC 000B2CFC 3C 63 00 27 */ addis r3, r3, 0x27
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/* 800B6EC0 000B2D00 38 63 9E C3 */ addi r3, r3, -0x613d
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/* 800B6EC4 000B2D04 54 60 84 3E */ srwi r0, r3, 16
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/* 800B6EC8 000B2D08 EC 20 30 28 */ fsubs f1, f0, f6
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/* 800B6ECC 000B2D0C 90 01 00 4C */ stw r0, 0x4c(r1)
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/* 800B6ED0 000B2D10 EC 44 00 B2 */ fmuls f2, f4, f2
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/* 800B6ED4 000B2D14 C8 01 00 48 */ lfd f0, 0x48(r1)
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/* 800B6ED8 000B2D18 EC 21 28 24 */ fdivs f1, f1, f5
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/* 800B6EDC 000B2D1C EC 00 30 28 */ fsubs f0, f0, f6
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/* 800B6EE0 000B2D20 EC 24 00 72 */ fmuls f1, f4, f1
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/* 800B6EE4 000B2D24 EC 42 18 28 */ fsubs f2, f2, f3
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/* 800B6EE8 000B2D28 EC 00 28 24 */ fdivs f0, f0, f5
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/* 800B6EEC 000B2D2C D0 41 00 38 */ stfs f2, 0x38(r1)
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/* 800B6EF0 000B2D30 EC 21 18 28 */ fsubs f1, f1, f3
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/* 800B6EF4 000B2D34 EC 04 00 32 */ fmuls f0, f4, f0
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/* 800B6EF8 000B2D38 D0 21 00 3C */ stfs f1, 0x3c(r1)
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/* 800B6EFC 000B2D3C EC 00 18 28 */ fsubs f0, f0, f3
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/* 800B6F00 000B2D40 90 7C 00 EC */ stw r3, 0xec(r28)
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/* 800B6F04 000B2D44 D0 01 00 40 */ stfs f0, 0x40(r1)
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.global lbl_800B6F08
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lbl_800B6F08:
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/* 800B6F08 000B2D48 38 61 00 38 */ addi r3, r1, 0x38
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/* 800B6F0C 000B2D4C 7C 64 1B 78 */ mr r4, r3
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/* 800B6F10 000B2D50 4B FF CA C1 */ bl Normalize__Q24nw4r2efFPQ34nw4r4math4VEC3PCQ34nw4r4math4VEC3
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/* 800B6F14 000B2D54 80 7A 00 00 */ lwz r3, 0x0(r26)
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/* 800B6F18 000B2D58 38 81 00 2C */ addi r4, r1, 0x2c
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/* 800B6F1C 000B2D5C 80 1A 00 04 */ lwz r0, 0x4(r26)
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/* 800B6F20 000B2D60 90 01 00 30 */ stw r0, 0x30(r1)
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/* 800B6F24 000B2D64 C0 22 8D 40 */ lfs f1, "@8290"@sda21(r2)
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/* 800B6F28 000B2D68 90 61 00 2C */ stw r3, 0x2c(r1)
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/* 800B6F2C 000B2D6C C0 02 8D 30 */ lfs f0, "@8286"@sda21(r2)
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/* 800B6F30 000B2D70 80 1A 00 08 */ lwz r0, 0x8(r26)
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/* 800B6F34 000B2D74 90 01 00 34 */ stw r0, 0x34(r1)
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/* 800B6F38 000B2D78 D0 21 00 30 */ stfs f1, 0x30(r1)
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/* 800B6F3C 000B2D7C C0 21 00 34 */ lfs f1, 0x34(r1)
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/* 800B6F40 000B2D80 E0 44 00 00 */ psq_l f2, 0x0(r4), 0, qr0
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/* 800B6F44 000B2D84 10 42 00 B2 */ ps_mul f2, f2, f2
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/* 800B6F48 000B2D88 10 21 10 7A */ ps_madd f1, f1, f1, f2
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/* 800B6F4C 000B2D8C 10 21 10 94 */ ps_sum0 f1, f1, f2, f2
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/* 800B6F50 000B2D90 FC 01 00 40 */ fcmpo cr0, f1, f0
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/* 800B6F54 000B2D94 4C 40 13 82 */ cror eq, lt, eq
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/* 800B6F58 000B2D98 40 82 00 7C */ bne lbl_800B6FD4
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/* 800B6F5C 000B2D9C 3C 60 00 03 */ lis r3, 0x3
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/* 800B6F60 000B2DA0 80 1C 00 EC */ lwz r0, 0xec(r28)
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/* 800B6F64 000B2DA4 38 83 43 FD */ addi r4, r3, 0x43fd
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/* 800B6F68 000B2DA8 C8 22 8D 48 */ lfd f1, "@8300"@sda21(r2)
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/* 800B6F6C 000B2DAC 7C 60 21 D6 */ mullw r3, r0, r4
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/* 800B6F70 000B2DB0 C0 82 8D 34 */ lfs f4, "@8287"@sda21(r2)
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/* 800B6F74 000B2DB4 C0 62 8D 38 */ lfs f3, "@8288"@sda21(r2)
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/* 800B6F78 000B2DB8 C0 42 8D 3C */ lfs f2, "@8289"@sda21(r2)
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/* 800B6F7C 000B2DBC 3C 63 00 27 */ addis r3, r3, 0x27
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/* 800B6F80 000B2DC0 38 03 9E C3 */ addi r0, r3, -0x613d
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/* 800B6F84 000B2DC4 7C 60 21 D6 */ mullw r3, r0, r4
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/* 800B6F88 000B2DC8 54 00 84 3E */ srwi r0, r0, 16
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/* 800B6F8C 000B2DCC 90 01 00 54 */ stw r0, 0x54(r1)
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/* 800B6F90 000B2DD0 C8 01 00 50 */ lfd f0, 0x50(r1)
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/* 800B6F94 000B2DD4 3C 63 00 27 */ addis r3, r3, 0x27
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/* 800B6F98 000B2DD8 EC 00 08 28 */ fsubs f0, f0, f1
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/* 800B6F9C 000B2DDC 38 63 9E C3 */ addi r3, r3, -0x613d
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/* 800B6FA0 000B2DE0 54 60 84 3E */ srwi r0, r3, 16
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/* 800B6FA4 000B2DE4 90 01 00 4C */ stw r0, 0x4c(r1)
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/* 800B6FA8 000B2DE8 EC A0 20 24 */ fdivs f5, f0, f4
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/* 800B6FAC 000B2DEC C8 01 00 48 */ lfd f0, 0x48(r1)
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/* 800B6FB0 000B2DF0 EC 00 08 28 */ fsubs f0, f0, f1
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/* 800B6FB4 000B2DF4 EC 23 01 72 */ fmuls f1, f3, f5
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/* 800B6FB8 000B2DF8 EC 00 20 24 */ fdivs f0, f0, f4
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/* 800B6FBC 000B2DFC EC 21 10 28 */ fsubs f1, f1, f2
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/* 800B6FC0 000B2E00 EC 03 00 32 */ fmuls f0, f3, f0
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/* 800B6FC4 000B2E04 D0 21 00 2C */ stfs f1, 0x2c(r1)
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/* 800B6FC8 000B2E08 90 7C 00 EC */ stw r3, 0xec(r28)
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/* 800B6FCC 000B2E0C EC 00 10 28 */ fsubs f0, f0, f2
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/* 800B6FD0 000B2E10 D0 01 00 34 */ stfs f0, 0x34(r1)
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.global lbl_800B6FD4
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lbl_800B6FD4:
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/* 800B6FD4 000B2E14 38 61 00 2C */ addi r3, r1, 0x2c
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/* 800B6FD8 000B2E18 7C 64 1B 78 */ mr r4, r3
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/* 800B6FDC 000B2E1C 4B FF C9 F5 */ bl Normalize__Q24nw4r2efFPQ34nw4r4math4VEC3PCQ34nw4r4math4VEC3
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/* 800B6FE0 000B2E20 7F 23 CB 78 */ mr r3, r25
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/* 800B6FE4 000B2E24 7F 85 E3 78 */ mr r5, r28
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/* 800B6FE8 000B2E28 7F 46 D3 78 */ mr r6, r26
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/* 800B6FEC 000B2E2C 7F 67 DB 78 */ mr r7, r27
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/* 800B6FF0 000B2E30 38 81 00 20 */ addi r4, r1, 0x20
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/* 800B6FF4 000B2E34 39 01 00 38 */ addi r8, r1, 0x38
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/* 800B6FF8 000B2E38 39 21 00 2C */ addi r9, r1, 0x2c
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/* 800B6FFC 000B2E3C 4B FF D0 F5 */ bl CalcVelocity__Q34nw4r2ef11EmitterFormCFPQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterRCQ34nw4r4math4VEC3RCQ34nw4r4math4VEC3RCQ34nw4r4math4VEC3RCQ34nw4r4math4VEC3
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/* 800B7000 000B2E40 3C 60 00 03 */ lis r3, 0x3
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/* 800B7004 000B2E44 80 9C 00 EC */ lwz r4, 0xec(r28)
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/* 800B7008 000B2E48 38 03 43 FD */ addi r0, r3, 0x43fd
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/* 800B700C 000B2E4C C8 62 8D 48 */ lfd f3, "@8300"@sda21(r2)
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/* 800B7010 000B2E50 7C C4 01 D6 */ mullw r6, r4, r0
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/* 800B7014 000B2E54 C0 02 8D 34 */ lfs f0, "@8287"@sda21(r2)
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/* 800B7018 000B2E58 FC 20 F8 90 */ fmr f1, f31
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/* 800B701C 000B2E5C 7F 23 CB 78 */ mr r3, r25
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/* 800B7020 000B2E60 7F C4 F3 78 */ mr r4, r30
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/* 800B7024 000B2E64 7F 85 E3 78 */ mr r5, r28
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/* 800B7028 000B2E68 3C C6 00 27 */ addis r6, r6, 0x27
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/* 800B702C 000B2E6C 38 06 9E C3 */ addi r0, r6, -0x613d
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/* 800B7030 000B2E70 90 1C 00 EC */ stw r0, 0xec(r28)
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/* 800B7034 000B2E74 54 00 84 3E */ srwi r0, r0, 16
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/* 800B7038 000B2E78 90 01 00 54 */ stw r0, 0x54(r1)
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/* 800B703C 000B2E7C 80 E1 00 20 */ lwz r7, 0x20(r1)
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/* 800B7040 000B2E80 C8 41 00 50 */ lfd f2, 0x50(r1)
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/* 800B7044 000B2E84 80 C1 00 24 */ lwz r6, 0x24(r1)
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/* 800B7048 000B2E88 EC 42 18 28 */ fsubs f2, f2, f3
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/* 800B704C 000B2E8C 80 01 00 28 */ lwz r0, 0x28(r1)
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/* 800B7050 000B2E90 90 E1 00 08 */ stw r7, 0x8(r1)
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/* 800B7054 000B2E94 EF E2 00 24 */ fdivs f31, f2, f0
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/* 800B7058 000B2E98 90 C1 00 0C */ stw r6, 0xc(r1)
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/* 800B705C 000B2E9C 90 01 00 10 */ stw r0, 0x10(r1)
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/* 800B7060 000B2EA0 80 DA 00 00 */ lwz r6, 0x0(r26)
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/* 800B7064 000B2EA4 80 1A 00 04 */ lwz r0, 0x4(r26)
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/* 800B7068 000B2EA8 90 01 00 18 */ stw r0, 0x18(r1)
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/* 800B706C 000B2EAC 90 C1 00 14 */ stw r6, 0x14(r1)
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/* 800B7070 000B2EB0 80 1A 00 08 */ lwz r0, 0x8(r26)
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/* 800B7074 000B2EB4 90 01 00 1C */ stw r0, 0x1c(r1)
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/* 800B7078 000B2EB8 4B FF D5 39 */ bl CalcLife__Q34nw4r2ef11EmitterFormFUsfPQ34nw4r2ef7Emitter
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/* 800B707C 000B2EBC 88 1C 00 67 */ lbz r0, 0x67(r28)
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/* 800B7080 000B2EC0 7C 64 1B 78 */ mr r4, r3
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/* 800B7084 000B2EC4 81 9D 00 1C */ lwz r12, 0x1c(r29)
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/* 800B7088 000B2EC8 7F A3 EB 78 */ mr r3, r29
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/* 800B708C 000B2ECC 7C 00 07 74 */ extsb r0, r0
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/* 800B7090 000B2ED0 C8 62 8D 50 */ lfd f3, "@8301"@sda21(r2)
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/* 800B7094 000B2ED4 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 800B7098 000B2ED8 90 01 00 4C */ stw r0, 0x4c(r1)
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/* 800B709C 000B2EDC C0 22 8D 44 */ lfs f1, "@8291"@sda21(r2)
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/* 800B70A0 000B2EE0 7F E7 FB 78 */ mr r7, r31
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/* 800B70A4 000B2EE4 C8 41 00 48 */ lfd f2, 0x48(r1)
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/* 800B70A8 000B2EE8 54 84 04 3E */ clrlwi r4, r4, 16
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/* 800B70AC 000B2EEC C0 02 8D 3C */ lfs f0, "@8289"@sda21(r2)
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/* 800B70B0 000B2EF0 38 A1 00 14 */ addi r5, r1, 0x14
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/* 800B70B4 000B2EF4 EC 42 18 28 */ fsubs f2, f2, f3
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/* 800B70B8 000B2EF8 81 8C 00 14 */ lwz r12, 0x14(r12)
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/* 800B70BC 000B2EFC 38 C1 00 08 */ addi r6, r1, 0x8
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/* 800B70C0 000B2F00 39 1C 00 FC */ addi r8, r28, 0xfc
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/* 800B70C4 000B2F04 81 3C 00 F8 */ lwz r9, 0xf8(r28)
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/* 800B70C8 000B2F08 EC 21 00 B2 */ fmuls f1, f1, f2
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/* 800B70CC 000B2F0C A1 5C 00 E8 */ lhz r10, 0xe8(r28)
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/* 800B70D0 000B2F10 EC 21 07 F2 */ fmuls f1, f1, f31
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/* 800B70D4 000B2F14 EC 20 08 2A */ fadds f1, f0, f1
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/* 800B70D8 000B2F18 7D 89 03 A6 */ mtctr r12
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/* 800B70DC 000B2F1C 4E 80 04 21 */ bctrl
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/* 800B70E0 000B2F20 39 61 00 80 */ addi r11, r1, 0x80
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/* 800B70E4 000B2F24 E3 E1 00 88 */ psq_l f31, 0x88(r1), 0, qr0
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/* 800B70E8 000B2F28 CB E1 00 80 */ lfd f31, 0x80(r1)
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/* 800B70EC 000B2F2C 4B F5 02 95 */ bl lbl_80007380
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/* 800B70F0 000B2F30 80 01 00 94 */ lwz r0, 0x94(r1)
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/* 800B70F4 000B2F34 7C 08 03 A6 */ mtlr r0
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/* 800B70F8 000B2F38 38 21 00 90 */ addi r1, r1, 0x90
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/* 800B70FC 000B2F3C 4E 80 00 20 */ blr
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.global Emission__Q34nw4r2ef15EmitterFormCubeFPQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManageriUlPfUsfPCQ34nw4r4math5MTX34
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Emission__Q34nw4r2ef15EmitterFormCubeFPQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManageriUlPfUsfPCQ34nw4r4math5MTX34:
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/* 800B7100 000B2F40 94 21 FD D0 */ stwu r1, -0x230(r1)
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/* 800B7104 000B2F44 7C 08 02 A6 */ mflr r0
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/* 800B7108 000B2F48 90 01 02 34 */ stw r0, 0x234(r1)
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/* 800B710C 000B2F4C 39 61 01 10 */ addi r11, r1, 0x110
|
|
/* 800B7110 000B2F50 DB E1 02 20 */ stfd f31, 0x220(r1)
|
|
/* 800B7114 000B2F54 F3 E1 02 28 */ psq_st f31, 0x228(r1), 0, qr0
|
|
/* 800B7118 000B2F58 DB C1 02 10 */ stfd f30, 0x210(r1)
|
|
/* 800B711C 000B2F5C F3 C1 02 18 */ psq_st f30, 0x218(r1), 0, qr0
|
|
/* 800B7120 000B2F60 DB A1 02 00 */ stfd f29, 0x200(r1)
|
|
/* 800B7124 000B2F64 F3 A1 02 08 */ psq_st f29, 0x208(r1), 0, qr0
|
|
/* 800B7128 000B2F68 DB 81 01 F0 */ stfd f28, 0x1f0(r1)
|
|
/* 800B712C 000B2F6C F3 81 01 F8 */ psq_st f28, 0x1f8(r1), 0, qr0
|
|
/* 800B7130 000B2F70 DB 61 01 E0 */ stfd f27, 0x1e0(r1)
|
|
/* 800B7134 000B2F74 F3 61 01 E8 */ psq_st f27, 0x1e8(r1), 0, qr0
|
|
/* 800B7138 000B2F78 DB 41 01 D0 */ stfd f26, 0x1d0(r1)
|
|
/* 800B713C 000B2F7C F3 41 01 D8 */ psq_st f26, 0x1d8(r1), 0, qr0
|
|
/* 800B7140 000B2F80 DB 21 01 C0 */ stfd f25, 0x1c0(r1)
|
|
/* 800B7144 000B2F84 F3 21 01 C8 */ psq_st f25, 0x1c8(r1), 0, qr0
|
|
/* 800B7148 000B2F88 DB 01 01 B0 */ stfd f24, 0x1b0(r1)
|
|
/* 800B714C 000B2F8C F3 01 01 B8 */ psq_st f24, 0x1b8(r1), 0, qr0
|
|
/* 800B7150 000B2F90 DA E1 01 A0 */ stfd f23, 0x1a0(r1)
|
|
/* 800B7154 000B2F94 F2 E1 01 A8 */ psq_st f23, 0x1a8(r1), 0, qr0
|
|
/* 800B7158 000B2F98 DA C1 01 90 */ stfd f22, 0x190(r1)
|
|
/* 800B715C 000B2F9C F2 C1 01 98 */ psq_st f22, 0x198(r1), 0, qr0
|
|
/* 800B7160 000B2FA0 DA A1 01 80 */ stfd f21, 0x180(r1)
|
|
/* 800B7164 000B2FA4 F2 A1 01 88 */ psq_st f21, 0x188(r1), 0, qr0
|
|
/* 800B7168 000B2FA8 DA 81 01 70 */ stfd f20, 0x170(r1)
|
|
/* 800B716C 000B2FAC F2 81 01 78 */ psq_st f20, 0x178(r1), 0, qr0
|
|
/* 800B7170 000B2FB0 DA 61 01 60 */ stfd f19, 0x160(r1)
|
|
/* 800B7174 000B2FB4 F2 61 01 68 */ psq_st f19, 0x168(r1), 0, qr0
|
|
/* 800B7178 000B2FB8 DA 41 01 50 */ stfd f18, 0x150(r1)
|
|
/* 800B717C 000B2FBC F2 41 01 58 */ psq_st f18, 0x158(r1), 0, qr0
|
|
/* 800B7180 000B2FC0 DA 21 01 40 */ stfd f17, 0x140(r1)
|
|
/* 800B7184 000B2FC4 F2 21 01 48 */ psq_st f17, 0x148(r1), 0, qr0
|
|
/* 800B7188 000B2FC8 DA 01 01 30 */ stfd f16, 0x130(r1)
|
|
/* 800B718C 000B2FCC F2 01 01 38 */ psq_st f16, 0x138(r1), 0, qr0
|
|
/* 800B7190 000B2FD0 D9 E1 01 20 */ stfd f15, 0x120(r1)
|
|
/* 800B7194 000B2FD4 F1 E1 01 28 */ psq_st f15, 0x128(r1), 0, qr0
|
|
/* 800B7198 000B2FD8 D9 C1 01 10 */ stfd f14, 0x110(r1)
|
|
/* 800B719C 000B2FDC F1 C1 01 18 */ psq_st f14, 0x118(r1), 0, qr0
|
|
/* 800B71A0 000B2FE0 4B F5 01 75 */ bl lbl_80007314
|
|
/* 800B71A4 000B2FE4 FE E0 08 90 */ fmr f23, f1
|
|
/* 800B71A8 000B2FE8 2C 06 00 01 */ cmpwi r6, 0x1
|
|
/* 800B71AC 000B2FEC 3C 00 43 30 */ lis r0, 0x4330
|
|
/* 800B71B0 000B2FF0 90 01 00 B0 */ stw r0, 0xb0(r1)
|
|
/* 800B71B4 000B2FF4 7C 7A 1B 78 */ mr r26, r3
|
|
/* 800B71B8 000B2FF8 7C 9B 23 78 */ mr r27, r4
|
|
/* 800B71BC 000B2FFC 90 01 00 B8 */ stw r0, 0xb8(r1)
|
|
/* 800B71C0 000B3000 7C BC 2B 78 */ mr r28, r5
|
|
/* 800B71C4 000B3004 7C DD 33 78 */ mr r29, r6
|
|
/* 800B71C8 000B3008 7D 3E 4B 78 */ mr r30, r9
|
|
/* 800B71CC 000B300C 7D 5F 53 78 */ mr r31, r10
|
|
/* 800B71D0 000B3010 41 80 17 34 */ blt lbl_800B8904
|
|
/* 800B71D4 000B3014 54 E0 01 8D */ rlwinm. r0, r7, 0, 6, 6
|
|
/* 800B71D8 000B3018 C3 E8 00 00 */ lfs f31, 0x0(r8)
|
|
/* 800B71DC 000B301C 41 82 00 10 */ beq lbl_800B71EC
|
|
/* 800B71E0 000B3020 FF C0 F8 90 */ fmr f30, f31
|
|
/* 800B71E4 000B3024 D3 E1 00 C4 */ stfs f31, 0xc4(r1)
|
|
/* 800B71E8 000B3028 48 00 00 10 */ b lbl_800B71F8
|
|
.global lbl_800B71EC
|
|
lbl_800B71EC:
|
|
/* 800B71EC 000B302C C0 08 00 04 */ lfs f0, 0x4(r8)
|
|
/* 800B71F0 000B3030 D0 01 00 C4 */ stfs f0, 0xc4(r1)
|
|
/* 800B71F4 000B3034 C3 C8 00 08 */ lfs f30, 0x8(r8)
|
|
.global lbl_800B71F8
|
|
lbl_800B71F8:
|
|
/* 800B71F8 000B3038 C0 02 8D 58 */ lfs f0, "@9190"@sda21(r2)
|
|
/* 800B71FC 000B303C FC 1F 00 40 */ fcmpo cr0, f31, f0
|
|
/* 800B7200 000B3040 40 80 00 08 */ bge lbl_800B7208
|
|
/* 800B7204 000B3044 FF E0 00 90 */ fmr f31, f0
|
|
.global lbl_800B7208
|
|
lbl_800B7208:
|
|
/* 800B7208 000B3048 C0 22 8D 58 */ lfs f1, "@9190"@sda21(r2)
|
|
/* 800B720C 000B304C C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B7210 000B3050 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B7214 000B3054 40 80 00 08 */ bge lbl_800B721C
|
|
/* 800B7218 000B3058 D0 21 00 C4 */ stfs f1, 0xc4(r1)
|
|
.global lbl_800B721C
|
|
lbl_800B721C:
|
|
/* 800B721C 000B305C C0 02 8D 58 */ lfs f0, "@9190"@sda21(r2)
|
|
/* 800B7220 000B3060 FC 1E 00 40 */ fcmpo cr0, f30, f0
|
|
/* 800B7224 000B3064 40 80 00 08 */ bge lbl_800B722C
|
|
/* 800B7228 000B3068 FF C0 00 90 */ fmr f30, f0
|
|
.global lbl_800B722C
|
|
lbl_800B722C:
|
|
/* 800B722C 000B306C C0 02 8D 40 */ lfs f0, "@8290"@sda21(r2)
|
|
/* 800B7230 000B3070 C0 28 00 0C */ lfs f1, 0xc(r8)
|
|
/* 800B7234 000B3074 FC 00 08 00 */ fcmpu cr0, f0, f1
|
|
/* 800B7238 000B3078 40 82 00 0C */ bne lbl_800B7244
|
|
/* 800B723C 000B307C C3 A2 8D 58 */ lfs f29, "@9190"@sda21(r2)
|
|
/* 800B7240 000B3080 48 00 00 0C */ b lbl_800B724C
|
|
.global lbl_800B7244
|
|
lbl_800B7244:
|
|
/* 800B7244 000B3084 C0 02 8D 44 */ lfs f0, "@8291"@sda21(r2)
|
|
/* 800B7248 000B3088 EF A0 00 72 */ fmuls f29, f0, f1
|
|
.global lbl_800B724C
|
|
lbl_800B724C:
|
|
/* 800B724C 000B308C C3 64 00 78 */ lfs f27, 0x78(r4)
|
|
/* 800B7250 000B3090 C0 02 8D 5C */ lfs f0, "@9191"@sda21(r2)
|
|
/* 800B7254 000B3094 C0 42 8D 3C */ lfs f2, "@8289"@sda21(r2)
|
|
/* 800B7258 000B3098 EC 3B 00 28 */ fsubs f1, f27, f0
|
|
/* 800B725C 000B309C C0 02 8D 60 */ lfs f0, "@9192"@sda21(r2)
|
|
/* 800B7260 000B30A0 EF 82 E8 28 */ fsubs f28, f2, f29
|
|
/* 800B7264 000B30A4 FC 20 0A 10 */ fabs f1, f1
|
|
/* 800B7268 000B30A8 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B726C 000B30AC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B7270 000B30B0 40 80 00 08 */ bge lbl_800B7278
|
|
/* 800B7274 000B30B4 EF 7B 00 28 */ fsubs f27, f27, f0
|
|
.global lbl_800B7278
|
|
lbl_800B7278:
|
|
/* 800B7278 000B30B8 54 E0 03 9D */ rlwinm. r0, r7, 0, 14, 14
|
|
/* 800B727C 000B30BC 41 82 0D AC */ beq lbl_800B8028
|
|
/* 800B7280 000B30C0 38 06 00 01 */ addi r0, r6, 0x1
|
|
/* 800B7284 000B30C4 54 C8 0F FE */ srwi r8, r6, 31
|
|
/* 800B7288 000B30C8 6C 00 80 00 */ xoris r0, r0, 0x8000
|
|
/* 800B728C 000B30CC 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7290 000B30D0 54 C0 07 FE */ clrlwi r0, r6, 31
|
|
/* 800B7294 000B30D4 38 86 FF FF */ addi r4, r6, -0x1
|
|
/* 800B7298 000B30D8 C8 22 8D 50 */ lfd f1, "@8301"@sda21(r2)
|
|
/* 800B729C 000B30DC 7C 00 42 78 */ xor r0, r0, r8
|
|
/* 800B72A0 000B30E0 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B72A4 000B30E4 7C A8 32 14 */ add r5, r8, r6
|
|
/* 800B72A8 000B30E8 7C A5 0E 70 */ srawi r5, r5, 1
|
|
/* 800B72AC 000B30EC 7C 08 00 51 */ subf. r0, r8, r0
|
|
/* 800B72B0 000B30F0 EC 20 08 28 */ fsubs f1, f0, f1
|
|
/* 800B72B4 000B30F4 C0 02 8D 38 */ lfs f0, "@8288"@sda21(r2)
|
|
/* 800B72B8 000B30F8 54 83 0F FE */ srwi r3, r4, 31
|
|
/* 800B72BC 000B30FC 3A C5 00 01 */ addi r22, r5, 0x1
|
|
/* 800B72C0 000B3100 7C 03 22 14 */ add r0, r3, r4
|
|
/* 800B72C4 000B3104 3A 60 00 00 */ li r19, 0x0
|
|
/* 800B72C8 000B3108 EF A0 08 24 */ fdivs f29, f0, f1
|
|
/* 800B72CC 000B310C 7C 03 0E 70 */ srawi r3, r0, 1
|
|
/* 800B72D0 000B3110 3A 83 00 01 */ addi r20, r3, 0x1
|
|
/* 800B72D4 000B3114 40 82 00 08 */ bne lbl_800B72DC
|
|
/* 800B72D8 000B3118 3A 60 00 02 */ li r19, 0x2
|
|
.global lbl_800B72DC
|
|
lbl_800B72DC:
|
|
/* 800B72DC 000B311C C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B72E0 000B3120 7E E6 31 D6 */ mullw r23, r6, r6
|
|
/* 800B72E4 000B3124 C2 A2 8D 40 */ lfs f21, "@8290"@sda21(r2)
|
|
/* 800B72E8 000B3128 54 F9 01 CE */ rlwinm r25, r7, 0, 7, 7
|
|
/* 800B72EC 000B312C FE C0 00 50 */ fneg f22, f0
|
|
/* 800B72F0 000B3130 CB 22 8D 50 */ lfd f25, "@8301"@sda21(r2)
|
|
/* 800B72F4 000B3134 C3 02 8D 3C */ lfs f24, "@8289"@sda21(r2)
|
|
/* 800B72F8 000B3138 CA 82 8D 48 */ lfd f20, "@8300"@sda21(r2)
|
|
/* 800B72FC 000B313C 3A 40 00 01 */ li r18, 0x1
|
|
/* 800B7300 000B3140 C2 62 8D 34 */ lfs f19, "@8287"@sda21(r2)
|
|
/* 800B7304 000B3144 3A 20 00 01 */ li r17, 0x1
|
|
/* 800B7308 000B3148 C2 42 8D 58 */ lfs f18, "@9190"@sda21(r2)
|
|
/* 800B730C 000B314C 3A A0 00 00 */ li r21, 0x0
|
|
/* 800B7310 000B3150 C2 22 8D 64 */ lfs f17, "@9193"@sda21(r2)
|
|
/* 800B7314 000B3154 3F 00 00 03 */ lis r24, 0x3
|
|
/* 800B7318 000B3158 48 00 02 6C */ b lbl_800B7584
|
|
.global lbl_800B731C
|
|
lbl_800B731C:
|
|
/* 800B731C 000B315C 2C 15 00 00 */ cmpwi r21, 0x0
|
|
/* 800B7320 000B3160 41 82 00 78 */ beq lbl_800B7398
|
|
/* 800B7324 000B3164 2C 13 00 00 */ cmpwi r19, 0x0
|
|
/* 800B7328 000B3168 41 82 00 20 */ beq lbl_800B7348
|
|
/* 800B732C 000B316C 2C 13 00 01 */ cmpwi r19, 0x1
|
|
/* 800B7330 000B3170 41 82 00 20 */ beq lbl_800B7350
|
|
/* 800B7334 000B3174 2C 13 00 02 */ cmpwi r19, 0x2
|
|
/* 800B7338 000B3178 41 82 00 20 */ beq lbl_800B7358
|
|
/* 800B733C 000B317C 2C 13 00 03 */ cmpwi r19, 0x3
|
|
/* 800B7340 000B3180 41 82 00 20 */ beq lbl_800B7360
|
|
/* 800B7344 000B3184 48 00 00 20 */ b lbl_800B7364
|
|
.global lbl_800B7348
|
|
lbl_800B7348:
|
|
/* 800B7348 000B3188 3A 94 FF FF */ addi r20, r20, -0x1
|
|
/* 800B734C 000B318C 48 00 00 18 */ b lbl_800B7364
|
|
.global lbl_800B7350
|
|
lbl_800B7350:
|
|
/* 800B7350 000B3190 3A D6 00 01 */ addi r22, r22, 0x1
|
|
/* 800B7354 000B3194 48 00 00 10 */ b lbl_800B7364
|
|
.global lbl_800B7358
|
|
lbl_800B7358:
|
|
/* 800B7358 000B3198 3A 94 00 01 */ addi r20, r20, 0x1
|
|
/* 800B735C 000B319C 48 00 00 08 */ b lbl_800B7364
|
|
.global lbl_800B7360
|
|
lbl_800B7360:
|
|
/* 800B7360 000B31A0 3A D6 FF FF */ addi r22, r22, -0x1
|
|
.global lbl_800B7364
|
|
lbl_800B7364:
|
|
/* 800B7364 000B31A4 36 31 FF FF */ addic. r17, r17, -0x1
|
|
/* 800B7368 000B31A8 41 81 00 30 */ bgt lbl_800B7398
|
|
/* 800B736C 000B31AC 3A 73 00 01 */ addi r19, r19, 0x1
|
|
/* 800B7370 000B31B0 2C 13 00 04 */ cmpwi r19, 0x4
|
|
/* 800B7374 000B31B4 40 82 00 08 */ bne lbl_800B737C
|
|
/* 800B7378 000B31B8 3A 60 00 00 */ li r19, 0x0
|
|
.global lbl_800B737C
|
|
lbl_800B737C:
|
|
/* 800B737C 000B31BC 56 63 0F FE */ srwi r3, r19, 31
|
|
/* 800B7380 000B31C0 56 60 07 FE */ clrlwi r0, r19, 31
|
|
/* 800B7384 000B31C4 7C 00 1A 78 */ xor r0, r0, r3
|
|
/* 800B7388 000B31C8 7C 03 00 51 */ subf. r0, r3, r0
|
|
/* 800B738C 000B31CC 40 82 00 08 */ bne lbl_800B7394
|
|
/* 800B7390 000B31D0 3A 52 00 01 */ addi r18, r18, 0x1
|
|
.global lbl_800B7394
|
|
lbl_800B7394:
|
|
/* 800B7394 000B31D4 7E 51 93 78 */ mr r17, r18
|
|
.global lbl_800B7398
|
|
lbl_800B7398:
|
|
/* 800B7398 000B31D8 6E C0 80 00 */ xoris r0, r22, 0x8000
|
|
/* 800B739C 000B31DC 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B73A0 000B31E0 6E 80 80 00 */ xoris r0, r20, 0x8000
|
|
/* 800B73A4 000B31E4 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B73A8 000B31E8 C8 21 00 B8 */ lfd f1, 0xb8(r1)
|
|
/* 800B73AC 000B31EC C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B73B0 000B31F0 EC 21 C8 28 */ fsubs f1, f1, f25
|
|
/* 800B73B4 000B31F4 EC 00 C8 28 */ fsubs f0, f0, f25
|
|
/* 800B73B8 000B31F8 EC 21 07 72 */ fmuls f1, f1, f29
|
|
/* 800B73BC 000B31FC EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B73C0 000B3200 EC 41 C0 28 */ fsubs f2, f1, f24
|
|
/* 800B73C4 000B3204 EC 60 C0 28 */ fsubs f3, f0, f24
|
|
/* 800B73C8 000B3208 FC 20 12 10 */ fabs f1, f2
|
|
/* 800B73CC 000B320C FC 00 1A 10 */ fabs f0, f3
|
|
/* 800B73D0 000B3210 EC 82 07 F2 */ fmuls f4, f2, f31
|
|
/* 800B73D4 000B3214 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B73D8 000B3218 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B73DC 000B321C EC A3 07 B2 */ fmuls f5, f3, f30
|
|
/* 800B73E0 000B3220 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B73E4 000B3224 40 81 00 08 */ ble lbl_800B73EC
|
|
/* 800B73E8 000B3228 48 00 00 08 */ b lbl_800B73F0
|
|
.global lbl_800B73EC
|
|
lbl_800B73EC:
|
|
/* 800B73EC 000B322C FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B73F0
|
|
lbl_800B73F0:
|
|
/* 800B73F0 000B3230 FC 00 1A 10 */ fabs f0, f3
|
|
/* 800B73F4 000B3234 FC 40 12 10 */ fabs f2, f2
|
|
/* 800B73F8 000B3238 EC 78 08 28 */ fsubs f3, f24, f1
|
|
/* 800B73FC 000B323C FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7400 000B3240 FC 20 10 18 */ frsp f1, f2
|
|
/* 800B7404 000B3244 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B7408 000B3248 40 81 00 08 */ ble lbl_800B7410
|
|
/* 800B740C 000B324C 48 00 00 08 */ b lbl_800B7414
|
|
.global lbl_800B7410
|
|
lbl_800B7410:
|
|
/* 800B7410 000B3250 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B7414
|
|
lbl_800B7414:
|
|
/* 800B7414 000B3254 FC 15 E0 00 */ fcmpu cr0, f21, f28
|
|
/* 800B7418 000B3258 D0 81 00 A4 */ stfs f4, 0xa4(r1)
|
|
/* 800B741C 000B325C D2 C1 00 A8 */ stfs f22, 0xa8(r1)
|
|
/* 800B7420 000B3260 D0 A1 00 AC */ stfs f5, 0xac(r1)
|
|
/* 800B7424 000B3264 41 82 00 90 */ beq lbl_800B74B4
|
|
/* 800B7428 000B3268 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B742C 000B326C 41 82 00 44 */ beq lbl_800B7470
|
|
/* 800B7430 000B3270 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7434 000B3274 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7438 000B3278 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B743C 000B327C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7440 000B3280 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7444 000B3284 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7448 000B3288 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B744C 000B328C 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7450 000B3290 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7454 000B3294 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7458 000B3298 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B745C 000B329C EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7460 000B32A0 EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B7464 000B32A4 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7468 000B32A8 EC 58 00 28 */ fsubs f2, f24, f0
|
|
/* 800B746C 000B32AC 48 00 00 3C */ b lbl_800B74A8
|
|
.global lbl_800B7470
|
|
lbl_800B7470:
|
|
/* 800B7470 000B32B0 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7474 000B32B4 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7478 000B32B8 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B747C 000B32BC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7480 000B32C0 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7484 000B32C4 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7488 000B32C8 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B748C 000B32CC 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7490 000B32D0 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7494 000B32D4 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7498 000B32D8 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B749C 000B32DC EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B74A0 000B32E0 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B74A4 000B32E4 EC 58 00 28 */ fsubs f2, f24, f0
|
|
.global lbl_800B74A8
|
|
lbl_800B74A8:
|
|
/* 800B74A8 000B32E8 C0 01 00 A8 */ lfs f0, 0xa8(r1)
|
|
/* 800B74AC 000B32EC EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B74B0 000B32F0 D0 01 00 A8 */ stfs f0, 0xa8(r1)
|
|
.global lbl_800B74B4
|
|
lbl_800B74B4:
|
|
/* 800B74B4 000B32F4 FC 15 D8 00 */ fcmpu cr0, f21, f27
|
|
/* 800B74B8 000B32F8 41 82 00 2C */ beq lbl_800B74E4
|
|
/* 800B74BC 000B32FC C0 01 00 A4 */ lfs f0, 0xa4(r1)
|
|
/* 800B74C0 000B3300 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B74C4 000B3304 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B74C8 000B3308 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B74CC 000B330C 40 80 00 28 */ bge lbl_800B74F4
|
|
/* 800B74D0 000B3310 C0 01 00 AC */ lfs f0, 0xac(r1)
|
|
/* 800B74D4 000B3314 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B74D8 000B3318 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B74DC 000B331C FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B74E0 000B3320 40 80 00 14 */ bge lbl_800B74F4
|
|
.global lbl_800B74E4
|
|
lbl_800B74E4:
|
|
/* 800B74E4 000B3324 D2 A1 00 98 */ stfs f21, 0x98(r1)
|
|
/* 800B74E8 000B3328 D2 21 00 9C */ stfs f17, 0x9c(r1)
|
|
/* 800B74EC 000B332C D2 A1 00 A0 */ stfs f21, 0xa0(r1)
|
|
/* 800B74F0 000B3330 48 00 00 6C */ b lbl_800B755C
|
|
.global lbl_800B74F4
|
|
lbl_800B74F4:
|
|
/* 800B74F4 000B3334 EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B74F8 000B3338 4B F5 D0 19 */ bl tan
|
|
/* 800B74FC 000B333C FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7500 000B3340 C0 41 00 A4 */ lfs f2, 0xa4(r1)
|
|
/* 800B7504 000B3344 C0 01 00 AC */ lfs f0, 0xac(r1)
|
|
/* 800B7508 000B3348 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B750C 000B334C D0 41 00 98 */ stfs f2, 0x98(r1)
|
|
/* 800B7510 000B3350 EF 40 20 30 */ fres f26, f4
|
|
/* 800B7514 000B3354 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7518 000B3358 10 7A D0 2A */ ps_add f3, f26, f26
|
|
/* 800B751C 000B335C 10 5A 06 B2 */ ps_mul f2, f26, f26
|
|
/* 800B7520 000B3360 ED C1 00 2A */ fadds f14, f1, f0
|
|
/* 800B7524 000B3364 13 44 18 BC */ ps_nmsub f26, f4, f2, f3
|
|
/* 800B7528 000B3368 FC 0E A8 40 */ fcmpo cr0, f14, f21
|
|
/* 800B752C 000B336C 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B7530 000B3370 40 82 00 0C */ bne lbl_800B753C
|
|
/* 800B7534 000B3374 FC 00 A8 90 */ fmr f0, f21
|
|
/* 800B7538 000B3378 48 00 00 10 */ b lbl_800B7548
|
|
.global lbl_800B753C
|
|
lbl_800B753C:
|
|
/* 800B753C 000B337C FC 20 70 90 */ fmr f1, f14
|
|
/* 800B7540 000B3380 48 04 75 31 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7544 000B3384 EC 0E 00 72 */ fmuls f0, f14, f1
|
|
.global lbl_800B7548
|
|
lbl_800B7548:
|
|
/* 800B7548 000B3388 FC 20 00 50 */ fneg f1, f0
|
|
/* 800B754C 000B338C C0 01 00 AC */ lfs f0, 0xac(r1)
|
|
/* 800B7550 000B3390 D0 01 00 A0 */ stfs f0, 0xa0(r1)
|
|
/* 800B7554 000B3394 EC 1A 00 72 */ fmuls f0, f26, f1
|
|
/* 800B7558 000B3398 D0 01 00 9C */ stfs f0, 0x9c(r1)
|
|
.global lbl_800B755C
|
|
lbl_800B755C:
|
|
/* 800B755C 000B339C FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7560 000B33A0 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7564 000B33A4 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B7568 000B33A8 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B756C 000B33AC 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B7570 000B33B0 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B7574 000B33B4 38 81 00 A4 */ addi r4, r1, 0xa4
|
|
/* 800B7578 000B33B8 38 A1 00 98 */ addi r5, r1, 0x98
|
|
/* 800B757C 000B33BC 4B FF F8 55 */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B7580 000B33C0 3A B5 00 01 */ addi r21, r21, 0x1
|
|
.global lbl_800B7584
|
|
lbl_800B7584:
|
|
/* 800B7584 000B33C4 7C 15 B8 00 */ cmpw r21, r23
|
|
/* 800B7588 000B33C8 41 80 FD 94 */ blt lbl_800B731C
|
|
/* 800B758C 000B33CC FC 00 F8 50 */ fneg f0, f31
|
|
/* 800B7590 000B33D0 C3 02 8D 40 */ lfs f24, "@8290"@sda21(r2)
|
|
/* 800B7594 000B33D4 FF 20 F0 50 */ fneg f25, f30
|
|
/* 800B7598 000B33D8 CA C2 8D 50 */ lfd f22, "@8301"@sda21(r2)
|
|
/* 800B759C 000B33DC D8 01 00 C8 */ stfd f0, 0xc8(r1)
|
|
/* 800B75A0 000B33E0 3A A0 00 01 */ li r21, 0x1
|
|
/* 800B75A4 000B33E4 C2 A2 8D 3C */ lfs f21, "@8289"@sda21(r2)
|
|
/* 800B75A8 000B33E8 3F 00 00 03 */ lis r24, 0x3
|
|
/* 800B75AC 000B33EC CA 82 8D 48 */ lfd f20, "@8300"@sda21(r2)
|
|
/* 800B75B0 000B33F0 C2 62 8D 34 */ lfs f19, "@8287"@sda21(r2)
|
|
/* 800B75B4 000B33F4 C2 42 8D 58 */ lfs f18, "@9190"@sda21(r2)
|
|
/* 800B75B8 000B33F8 C2 22 8D 64 */ lfs f17, "@9193"@sda21(r2)
|
|
/* 800B75BC 000B33FC 48 00 07 9C */ b lbl_800B7D58
|
|
.global lbl_800B75C0
|
|
lbl_800B75C0:
|
|
/* 800B75C0 000B3400 6E A0 80 00 */ xoris r0, r21, 0x8000
|
|
/* 800B75C4 000B3404 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B75C8 000B3408 3A C0 00 01 */ li r22, 0x1
|
|
/* 800B75CC 000B340C C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B75D0 000B3410 EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B75D4 000B3414 EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B75D8 000B3418 EC 00 A8 28 */ fsubs f0, f0, f21
|
|
/* 800B75DC 000B341C D0 01 00 C0 */ stfs f0, 0xc0(r1)
|
|
/* 800B75E0 000B3420 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B75E4 000B3424 C0 21 00 C0 */ lfs f1, 0xc0(r1)
|
|
/* 800B75E8 000B3428 FC 40 02 10 */ fabs f2, f0
|
|
/* 800B75EC 000B342C C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B75F0 000B3430 EF 41 00 32 */ fmuls f26, f1, f0
|
|
/* 800B75F4 000B3434 FD C0 10 18 */ frsp f14, f2
|
|
/* 800B75F8 000B3438 48 00 01 C0 */ b lbl_800B77B8
|
|
.global lbl_800B75FC
|
|
lbl_800B75FC:
|
|
/* 800B75FC 000B343C 6E C0 80 00 */ xoris r0, r22, 0x8000
|
|
/* 800B7600 000B3440 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7604 000B3444 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7608 000B3448 EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B760C 000B344C EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B7610 000B3450 EC 20 A8 28 */ fsubs f1, f0, f21
|
|
/* 800B7614 000B3454 FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B7618 000B3458 EC 41 07 F2 */ fmuls f2, f1, f31
|
|
/* 800B761C 000B345C FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7620 000B3460 FC 00 70 40 */ fcmpo cr0, f0, f14
|
|
/* 800B7624 000B3464 40 81 00 08 */ ble lbl_800B762C
|
|
/* 800B7628 000B3468 48 00 00 08 */ b lbl_800B7630
|
|
.global lbl_800B762C
|
|
lbl_800B762C:
|
|
/* 800B762C 000B346C FC 00 70 90 */ fmr f0, f14
|
|
.global lbl_800B7630
|
|
lbl_800B7630:
|
|
/* 800B7630 000B3470 FC 20 0A 10 */ fabs f1, f1
|
|
/* 800B7634 000B3474 EC 75 00 28 */ fsubs f3, f21, f0
|
|
/* 800B7638 000B3478 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B763C 000B347C FC 01 70 40 */ fcmpo cr0, f1, f14
|
|
/* 800B7640 000B3480 40 81 00 08 */ ble lbl_800B7648
|
|
/* 800B7644 000B3484 48 00 00 08 */ b lbl_800B764C
|
|
.global lbl_800B7648
|
|
lbl_800B7648:
|
|
/* 800B7648 000B3488 FC 20 70 90 */ fmr f1, f14
|
|
.global lbl_800B764C
|
|
lbl_800B764C:
|
|
/* 800B764C 000B348C FC 18 E0 00 */ fcmpu cr0, f24, f28
|
|
/* 800B7650 000B3490 D0 41 00 8C */ stfs f2, 0x8c(r1)
|
|
/* 800B7654 000B3494 D3 41 00 90 */ stfs f26, 0x90(r1)
|
|
/* 800B7658 000B3498 D3 21 00 94 */ stfs f25, 0x94(r1)
|
|
/* 800B765C 000B349C 41 82 00 90 */ beq lbl_800B76EC
|
|
/* 800B7660 000B34A0 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B7664 000B34A4 41 82 00 44 */ beq lbl_800B76A8
|
|
/* 800B7668 000B34A8 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B766C 000B34AC 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7670 000B34B0 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7674 000B34B4 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7678 000B34B8 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B767C 000B34BC 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7680 000B34C0 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7684 000B34C4 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7688 000B34C8 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B768C 000B34CC EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7690 000B34D0 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B7694 000B34D4 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7698 000B34D8 EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B769C 000B34DC EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B76A0 000B34E0 EC 55 00 28 */ fsubs f2, f21, f0
|
|
/* 800B76A4 000B34E4 48 00 00 3C */ b lbl_800B76E0
|
|
.global lbl_800B76A8
|
|
lbl_800B76A8:
|
|
/* 800B76A8 000B34E8 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B76AC 000B34EC 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B76B0 000B34F0 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B76B4 000B34F4 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B76B8 000B34F8 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B76BC 000B34FC 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B76C0 000B3500 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B76C4 000B3504 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B76C8 000B3508 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B76CC 000B350C EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B76D0 000B3510 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B76D4 000B3514 EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B76D8 000B3518 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B76DC 000B351C EC 55 00 28 */ fsubs f2, f21, f0
|
|
.global lbl_800B76E0
|
|
lbl_800B76E0:
|
|
/* 800B76E0 000B3520 C0 01 00 94 */ lfs f0, 0x94(r1)
|
|
/* 800B76E4 000B3524 EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B76E8 000B3528 D0 01 00 94 */ stfs f0, 0x94(r1)
|
|
.global lbl_800B76EC
|
|
lbl_800B76EC:
|
|
/* 800B76EC 000B352C FC 18 D8 00 */ fcmpu cr0, f24, f27
|
|
/* 800B76F0 000B3530 41 82 00 2C */ beq lbl_800B771C
|
|
/* 800B76F4 000B3534 C0 01 00 8C */ lfs f0, 0x8c(r1)
|
|
/* 800B76F8 000B3538 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B76FC 000B353C FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7700 000B3540 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7704 000B3544 40 80 00 28 */ bge lbl_800B772C
|
|
/* 800B7708 000B3548 C0 01 00 90 */ lfs f0, 0x90(r1)
|
|
/* 800B770C 000B354C FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7710 000B3550 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7714 000B3554 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7718 000B3558 40 80 00 14 */ bge lbl_800B772C
|
|
.global lbl_800B771C
|
|
lbl_800B771C:
|
|
/* 800B771C 000B355C D3 01 00 80 */ stfs f24, 0x80(r1)
|
|
/* 800B7720 000B3560 D3 01 00 84 */ stfs f24, 0x84(r1)
|
|
/* 800B7724 000B3564 D2 21 00 88 */ stfs f17, 0x88(r1)
|
|
/* 800B7728 000B3568 48 00 00 68 */ b lbl_800B7790
|
|
.global lbl_800B772C
|
|
lbl_800B772C:
|
|
/* 800B772C 000B356C EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B7730 000B3570 4B F5 CD E1 */ bl tan
|
|
/* 800B7734 000B3574 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7738 000B3578 C0 41 00 8C */ lfs f2, 0x8c(r1)
|
|
/* 800B773C 000B357C C0 01 00 90 */ lfs f0, 0x90(r1)
|
|
/* 800B7740 000B3580 D0 01 00 84 */ stfs f0, 0x84(r1)
|
|
/* 800B7744 000B3584 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B7748 000B3588 EE 00 20 30 */ fres f16, f4
|
|
/* 800B774C 000B358C D0 41 00 80 */ stfs f2, 0x80(r1)
|
|
/* 800B7750 000B3590 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7754 000B3594 10 70 80 2A */ ps_add f3, f16, f16
|
|
/* 800B7758 000B3598 10 50 04 32 */ ps_mul f2, f16, f16
|
|
/* 800B775C 000B359C ED E1 00 2A */ fadds f15, f1, f0
|
|
/* 800B7760 000B35A0 12 04 18 BC */ ps_nmsub f16, f4, f2, f3
|
|
/* 800B7764 000B35A4 FC 0F C0 40 */ fcmpo cr0, f15, f24
|
|
/* 800B7768 000B35A8 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B776C 000B35AC 40 82 00 0C */ bne lbl_800B7778
|
|
/* 800B7770 000B35B0 FC 00 C0 90 */ fmr f0, f24
|
|
/* 800B7774 000B35B4 48 00 00 10 */ b lbl_800B7784
|
|
.global lbl_800B7778
|
|
lbl_800B7778:
|
|
/* 800B7778 000B35B8 FC 20 78 90 */ fmr f1, f15
|
|
/* 800B777C 000B35BC 48 04 72 F5 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7780 000B35C0 EC 0F 00 72 */ fmuls f0, f15, f1
|
|
.global lbl_800B7784
|
|
lbl_800B7784:
|
|
/* 800B7784 000B35C4 FC 00 00 50 */ fneg f0, f0
|
|
/* 800B7788 000B35C8 EC 10 00 32 */ fmuls f0, f16, f0
|
|
/* 800B778C 000B35CC D0 01 00 88 */ stfs f0, 0x88(r1)
|
|
.global lbl_800B7790
|
|
lbl_800B7790:
|
|
/* 800B7790 000B35D0 FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7794 000B35D4 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7798 000B35D8 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B779C 000B35DC 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B77A0 000B35E0 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B77A4 000B35E4 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B77A8 000B35E8 38 81 00 8C */ addi r4, r1, 0x8c
|
|
/* 800B77AC 000B35EC 38 A1 00 80 */ addi r5, r1, 0x80
|
|
/* 800B77B0 000B35F0 4B FF F6 21 */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B77B4 000B35F4 3A D6 00 01 */ addi r22, r22, 0x1
|
|
.global lbl_800B77B8
|
|
lbl_800B77B8:
|
|
/* 800B77B8 000B35F8 7C 16 E8 00 */ cmpw r22, r29
|
|
/* 800B77BC 000B35FC 40 81 FE 40 */ ble lbl_800B75FC
|
|
/* 800B77C0 000B3600 C0 01 00 C0 */ lfs f0, 0xc0(r1)
|
|
/* 800B77C4 000B3604 3A C0 00 01 */ li r22, 0x1
|
|
/* 800B77C8 000B3608 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B77CC 000B360C FD C0 00 18 */ frsp f14, f0
|
|
/* 800B77D0 000B3610 48 00 01 C4 */ b lbl_800B7994
|
|
.global lbl_800B77D4
|
|
lbl_800B77D4:
|
|
/* 800B77D4 000B3614 6E C0 80 00 */ xoris r0, r22, 0x8000
|
|
/* 800B77D8 000B3618 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B77DC 000B361C C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B77E0 000B3620 EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B77E4 000B3624 EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B77E8 000B3628 EC 20 A8 28 */ fsubs f1, f0, f21
|
|
/* 800B77EC 000B362C FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B77F0 000B3630 EC 41 07 B2 */ fmuls f2, f1, f30
|
|
/* 800B77F4 000B3634 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B77F8 000B3638 FC 00 70 40 */ fcmpo cr0, f0, f14
|
|
/* 800B77FC 000B363C 40 81 00 08 */ ble lbl_800B7804
|
|
/* 800B7800 000B3640 48 00 00 08 */ b lbl_800B7808
|
|
.global lbl_800B7804
|
|
lbl_800B7804:
|
|
/* 800B7804 000B3644 FC 00 70 90 */ fmr f0, f14
|
|
.global lbl_800B7808
|
|
lbl_800B7808:
|
|
/* 800B7808 000B3648 FC 20 0A 10 */ fabs f1, f1
|
|
/* 800B780C 000B364C EC 75 00 28 */ fsubs f3, f21, f0
|
|
/* 800B7810 000B3650 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B7814 000B3654 FC 01 70 40 */ fcmpo cr0, f1, f14
|
|
/* 800B7818 000B3658 40 81 00 08 */ ble lbl_800B7820
|
|
/* 800B781C 000B365C 48 00 00 08 */ b lbl_800B7824
|
|
.global lbl_800B7820
|
|
lbl_800B7820:
|
|
/* 800B7820 000B3660 FC 20 70 90 */ fmr f1, f14
|
|
.global lbl_800B7824
|
|
lbl_800B7824:
|
|
/* 800B7824 000B3664 FC 18 E0 00 */ fcmpu cr0, f24, f28
|
|
/* 800B7828 000B3668 D3 E1 00 74 */ stfs f31, 0x74(r1)
|
|
/* 800B782C 000B366C D3 41 00 78 */ stfs f26, 0x78(r1)
|
|
/* 800B7830 000B3670 D0 41 00 7C */ stfs f2, 0x7c(r1)
|
|
/* 800B7834 000B3674 41 82 00 90 */ beq lbl_800B78C4
|
|
/* 800B7838 000B3678 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B783C 000B367C 41 82 00 44 */ beq lbl_800B7880
|
|
/* 800B7840 000B3680 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7844 000B3684 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7848 000B3688 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B784C 000B368C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7850 000B3690 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7854 000B3694 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7858 000B3698 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B785C 000B369C 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7860 000B36A0 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7864 000B36A4 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7868 000B36A8 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B786C 000B36AC EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7870 000B36B0 EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B7874 000B36B4 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7878 000B36B8 EC 55 00 28 */ fsubs f2, f21, f0
|
|
/* 800B787C 000B36BC 48 00 00 3C */ b lbl_800B78B8
|
|
.global lbl_800B7880
|
|
lbl_800B7880:
|
|
/* 800B7880 000B36C0 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7884 000B36C4 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7888 000B36C8 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B788C 000B36CC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7890 000B36D0 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7894 000B36D4 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7898 000B36D8 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B789C 000B36DC 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B78A0 000B36E0 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B78A4 000B36E4 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B78A8 000B36E8 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B78AC 000B36EC EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B78B0 000B36F0 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B78B4 000B36F4 EC 55 00 28 */ fsubs f2, f21, f0
|
|
.global lbl_800B78B8
|
|
lbl_800B78B8:
|
|
/* 800B78B8 000B36F8 C0 01 00 74 */ lfs f0, 0x74(r1)
|
|
/* 800B78BC 000B36FC EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B78C0 000B3700 D0 01 00 74 */ stfs f0, 0x74(r1)
|
|
.global lbl_800B78C4
|
|
lbl_800B78C4:
|
|
/* 800B78C4 000B3704 FC 18 D8 00 */ fcmpu cr0, f24, f27
|
|
/* 800B78C8 000B3708 41 82 00 2C */ beq lbl_800B78F4
|
|
/* 800B78CC 000B370C C0 01 00 78 */ lfs f0, 0x78(r1)
|
|
/* 800B78D0 000B3710 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B78D4 000B3714 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B78D8 000B3718 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B78DC 000B371C 40 80 00 28 */ bge lbl_800B7904
|
|
/* 800B78E0 000B3720 C0 01 00 7C */ lfs f0, 0x7c(r1)
|
|
/* 800B78E4 000B3724 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B78E8 000B3728 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B78EC 000B372C FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B78F0 000B3730 40 80 00 14 */ bge lbl_800B7904
|
|
.global lbl_800B78F4
|
|
lbl_800B78F4:
|
|
/* 800B78F4 000B3734 D2 A1 00 68 */ stfs f21, 0x68(r1)
|
|
/* 800B78F8 000B3738 D3 01 00 6C */ stfs f24, 0x6c(r1)
|
|
/* 800B78FC 000B373C D3 01 00 70 */ stfs f24, 0x70(r1)
|
|
/* 800B7900 000B3740 48 00 00 6C */ b lbl_800B796C
|
|
.global lbl_800B7904
|
|
lbl_800B7904:
|
|
/* 800B7904 000B3744 EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B7908 000B3748 4B F5 CC 09 */ bl tan
|
|
/* 800B790C 000B374C FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7910 000B3750 C0 21 00 78 */ lfs f1, 0x78(r1)
|
|
/* 800B7914 000B3754 C0 01 00 7C */ lfs f0, 0x7c(r1)
|
|
/* 800B7918 000B3758 EC 21 00 72 */ fmuls f1, f1, f1
|
|
/* 800B791C 000B375C ED E0 20 30 */ fres f15, f4
|
|
/* 800B7920 000B3760 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7924 000B3764 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B7928 000B3768 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B792C 000B376C EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B7930 000B3770 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B7934 000B3774 FC 10 C0 40 */ fcmpo cr0, f16, f24
|
|
/* 800B7938 000B3778 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B793C 000B377C 40 82 00 0C */ bne lbl_800B7948
|
|
/* 800B7940 000B3780 FC 00 C0 90 */ fmr f0, f24
|
|
/* 800B7944 000B3784 48 00 00 10 */ b lbl_800B7954
|
|
.global lbl_800B7948
|
|
lbl_800B7948:
|
|
/* 800B7948 000B3788 FC 20 80 90 */ fmr f1, f16
|
|
/* 800B794C 000B378C 48 04 71 25 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7950 000B3790 EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B7954
|
|
lbl_800B7954:
|
|
/* 800B7954 000B3794 EC 4F 00 32 */ fmuls f2, f15, f0
|
|
/* 800B7958 000B3798 C0 21 00 78 */ lfs f1, 0x78(r1)
|
|
/* 800B795C 000B379C C0 01 00 7C */ lfs f0, 0x7c(r1)
|
|
/* 800B7960 000B37A0 D0 41 00 68 */ stfs f2, 0x68(r1)
|
|
/* 800B7964 000B37A4 D0 21 00 6C */ stfs f1, 0x6c(r1)
|
|
/* 800B7968 000B37A8 D0 01 00 70 */ stfs f0, 0x70(r1)
|
|
.global lbl_800B796C
|
|
lbl_800B796C:
|
|
/* 800B796C 000B37AC FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7970 000B37B0 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7974 000B37B4 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B7978 000B37B8 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B797C 000B37BC 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B7980 000B37C0 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B7984 000B37C4 38 81 00 74 */ addi r4, r1, 0x74
|
|
/* 800B7988 000B37C8 38 A1 00 68 */ addi r5, r1, 0x68
|
|
/* 800B798C 000B37CC 4B FF F4 45 */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B7990 000B37D0 3A D6 00 01 */ addi r22, r22, 0x1
|
|
.global lbl_800B7994
|
|
lbl_800B7994:
|
|
/* 800B7994 000B37D4 7C 16 E8 00 */ cmpw r22, r29
|
|
/* 800B7998 000B37D8 40 81 FE 3C */ ble lbl_800B77D4
|
|
/* 800B799C 000B37DC C0 01 00 C0 */ lfs f0, 0xc0(r1)
|
|
/* 800B79A0 000B37E0 7F B6 EB 78 */ mr r22, r29
|
|
/* 800B79A4 000B37E4 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B79A8 000B37E8 FD C0 00 18 */ frsp f14, f0
|
|
/* 800B79AC 000B37EC 48 00 01 BC */ b lbl_800B7B68
|
|
.global lbl_800B79B0
|
|
lbl_800B79B0:
|
|
/* 800B79B0 000B37F0 6E C0 80 00 */ xoris r0, r22, 0x8000
|
|
/* 800B79B4 000B37F4 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B79B8 000B37F8 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B79BC 000B37FC EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B79C0 000B3800 EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B79C4 000B3804 EC 20 A8 28 */ fsubs f1, f0, f21
|
|
/* 800B79C8 000B3808 FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B79CC 000B380C EC 41 07 F2 */ fmuls f2, f1, f31
|
|
/* 800B79D0 000B3810 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B79D4 000B3814 FC 00 70 40 */ fcmpo cr0, f0, f14
|
|
/* 800B79D8 000B3818 40 81 00 08 */ ble lbl_800B79E0
|
|
/* 800B79DC 000B381C 48 00 00 08 */ b lbl_800B79E4
|
|
.global lbl_800B79E0
|
|
lbl_800B79E0:
|
|
/* 800B79E0 000B3820 FC 00 70 90 */ fmr f0, f14
|
|
.global lbl_800B79E4
|
|
lbl_800B79E4:
|
|
/* 800B79E4 000B3824 FC 20 0A 10 */ fabs f1, f1
|
|
/* 800B79E8 000B3828 EC 75 00 28 */ fsubs f3, f21, f0
|
|
/* 800B79EC 000B382C FC 20 08 18 */ frsp f1, f1
|
|
/* 800B79F0 000B3830 FC 01 70 40 */ fcmpo cr0, f1, f14
|
|
/* 800B79F4 000B3834 40 81 00 08 */ ble lbl_800B79FC
|
|
/* 800B79F8 000B3838 48 00 00 08 */ b lbl_800B7A00
|
|
.global lbl_800B79FC
|
|
lbl_800B79FC:
|
|
/* 800B79FC 000B383C FC 20 70 90 */ fmr f1, f14
|
|
.global lbl_800B7A00
|
|
lbl_800B7A00:
|
|
/* 800B7A00 000B3840 FC 18 E0 00 */ fcmpu cr0, f24, f28
|
|
/* 800B7A04 000B3844 D0 41 00 5C */ stfs f2, 0x5c(r1)
|
|
/* 800B7A08 000B3848 D3 41 00 60 */ stfs f26, 0x60(r1)
|
|
/* 800B7A0C 000B384C D3 C1 00 64 */ stfs f30, 0x64(r1)
|
|
/* 800B7A10 000B3850 41 82 00 90 */ beq lbl_800B7AA0
|
|
/* 800B7A14 000B3854 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B7A18 000B3858 41 82 00 44 */ beq lbl_800B7A5C
|
|
/* 800B7A1C 000B385C 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7A20 000B3860 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7A24 000B3864 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7A28 000B3868 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7A2C 000B386C 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7A30 000B3870 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7A34 000B3874 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7A38 000B3878 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7A3C 000B387C C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7A40 000B3880 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7A44 000B3884 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B7A48 000B3888 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7A4C 000B388C EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B7A50 000B3890 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7A54 000B3894 EC 55 00 28 */ fsubs f2, f21, f0
|
|
/* 800B7A58 000B3898 48 00 00 3C */ b lbl_800B7A94
|
|
.global lbl_800B7A5C
|
|
lbl_800B7A5C:
|
|
/* 800B7A5C 000B389C 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7A60 000B38A0 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7A64 000B38A4 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7A68 000B38A8 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7A6C 000B38AC 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7A70 000B38B0 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7A74 000B38B4 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7A78 000B38B8 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7A7C 000B38BC C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7A80 000B38C0 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7A84 000B38C4 EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B7A88 000B38C8 EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B7A8C 000B38CC EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7A90 000B38D0 EC 55 00 28 */ fsubs f2, f21, f0
|
|
.global lbl_800B7A94
|
|
lbl_800B7A94:
|
|
/* 800B7A94 000B38D4 C0 01 00 64 */ lfs f0, 0x64(r1)
|
|
/* 800B7A98 000B38D8 EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B7A9C 000B38DC D0 01 00 64 */ stfs f0, 0x64(r1)
|
|
.global lbl_800B7AA0
|
|
lbl_800B7AA0:
|
|
/* 800B7AA0 000B38E0 FC 18 D8 00 */ fcmpu cr0, f24, f27
|
|
/* 800B7AA4 000B38E4 41 82 00 2C */ beq lbl_800B7AD0
|
|
/* 800B7AA8 000B38E8 C0 01 00 5C */ lfs f0, 0x5c(r1)
|
|
/* 800B7AAC 000B38EC FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7AB0 000B38F0 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7AB4 000B38F4 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7AB8 000B38F8 40 80 00 28 */ bge lbl_800B7AE0
|
|
/* 800B7ABC 000B38FC C0 01 00 60 */ lfs f0, 0x60(r1)
|
|
/* 800B7AC0 000B3900 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7AC4 000B3904 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7AC8 000B3908 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7ACC 000B390C 40 80 00 14 */ bge lbl_800B7AE0
|
|
.global lbl_800B7AD0
|
|
lbl_800B7AD0:
|
|
/* 800B7AD0 000B3910 D3 01 00 50 */ stfs f24, 0x50(r1)
|
|
/* 800B7AD4 000B3914 D3 01 00 54 */ stfs f24, 0x54(r1)
|
|
/* 800B7AD8 000B3918 D2 A1 00 58 */ stfs f21, 0x58(r1)
|
|
/* 800B7ADC 000B391C 48 00 00 64 */ b lbl_800B7B40
|
|
.global lbl_800B7AE0
|
|
lbl_800B7AE0:
|
|
/* 800B7AE0 000B3920 EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B7AE4 000B3924 4B F5 CA 2D */ bl tan
|
|
/* 800B7AE8 000B3928 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7AEC 000B392C C0 41 00 5C */ lfs f2, 0x5c(r1)
|
|
/* 800B7AF0 000B3930 C0 01 00 60 */ lfs f0, 0x60(r1)
|
|
/* 800B7AF4 000B3934 D0 01 00 54 */ stfs f0, 0x54(r1)
|
|
/* 800B7AF8 000B3938 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B7AFC 000B393C ED E0 20 30 */ fres f15, f4
|
|
/* 800B7B00 000B3940 D0 41 00 50 */ stfs f2, 0x50(r1)
|
|
/* 800B7B04 000B3944 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7B08 000B3948 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B7B0C 000B394C 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B7B10 000B3950 EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B7B14 000B3954 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B7B18 000B3958 FC 10 C0 40 */ fcmpo cr0, f16, f24
|
|
/* 800B7B1C 000B395C 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B7B20 000B3960 40 82 00 0C */ bne lbl_800B7B2C
|
|
/* 800B7B24 000B3964 FC 00 C0 90 */ fmr f0, f24
|
|
/* 800B7B28 000B3968 48 00 00 10 */ b lbl_800B7B38
|
|
.global lbl_800B7B2C
|
|
lbl_800B7B2C:
|
|
/* 800B7B2C 000B396C FC 20 80 90 */ fmr f1, f16
|
|
/* 800B7B30 000B3970 48 04 6F 41 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7B34 000B3974 EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B7B38
|
|
lbl_800B7B38:
|
|
/* 800B7B38 000B3978 EC 0F 00 32 */ fmuls f0, f15, f0
|
|
/* 800B7B3C 000B397C D0 01 00 58 */ stfs f0, 0x58(r1)
|
|
.global lbl_800B7B40
|
|
lbl_800B7B40:
|
|
/* 800B7B40 000B3980 FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7B44 000B3984 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7B48 000B3988 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B7B4C 000B398C 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B7B50 000B3990 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B7B54 000B3994 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B7B58 000B3998 38 81 00 5C */ addi r4, r1, 0x5c
|
|
/* 800B7B5C 000B399C 38 A1 00 50 */ addi r5, r1, 0x50
|
|
/* 800B7B60 000B39A0 4B FF F2 71 */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B7B64 000B39A4 3A D6 FF FF */ addi r22, r22, -0x1
|
|
.global lbl_800B7B68
|
|
lbl_800B7B68:
|
|
/* 800B7B68 000B39A8 2C 16 00 01 */ cmpwi r22, 0x1
|
|
/* 800B7B6C 000B39AC 40 80 FE 44 */ bge lbl_800B79B0
|
|
/* 800B7B70 000B39B0 C0 01 00 C0 */ lfs f0, 0xc0(r1)
|
|
/* 800B7B74 000B39B4 7F B6 EB 78 */ mr r22, r29
|
|
/* 800B7B78 000B39B8 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7B7C 000B39BC FD C0 00 18 */ frsp f14, f0
|
|
/* 800B7B80 000B39C0 48 00 01 CC */ b lbl_800B7D4C
|
|
.global lbl_800B7B84
|
|
lbl_800B7B84:
|
|
/* 800B7B84 000B39C4 6E C0 80 00 */ xoris r0, r22, 0x8000
|
|
/* 800B7B88 000B39C8 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7B8C 000B39CC C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7B90 000B39D0 EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B7B94 000B39D4 EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B7B98 000B39D8 EC 20 A8 28 */ fsubs f1, f0, f21
|
|
/* 800B7B9C 000B39DC FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B7BA0 000B39E0 EC 41 07 B2 */ fmuls f2, f1, f30
|
|
/* 800B7BA4 000B39E4 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7BA8 000B39E8 FC 00 70 40 */ fcmpo cr0, f0, f14
|
|
/* 800B7BAC 000B39EC 40 81 00 08 */ ble lbl_800B7BB4
|
|
/* 800B7BB0 000B39F0 48 00 00 08 */ b lbl_800B7BB8
|
|
.global lbl_800B7BB4
|
|
lbl_800B7BB4:
|
|
/* 800B7BB4 000B39F4 FC 00 70 90 */ fmr f0, f14
|
|
.global lbl_800B7BB8
|
|
lbl_800B7BB8:
|
|
/* 800B7BB8 000B39F8 FC 20 0A 10 */ fabs f1, f1
|
|
/* 800B7BBC 000B39FC EC 75 00 28 */ fsubs f3, f21, f0
|
|
/* 800B7BC0 000B3A00 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B7BC4 000B3A04 FC 01 70 40 */ fcmpo cr0, f1, f14
|
|
/* 800B7BC8 000B3A08 40 81 00 08 */ ble lbl_800B7BD0
|
|
/* 800B7BCC 000B3A0C 48 00 00 08 */ b lbl_800B7BD4
|
|
.global lbl_800B7BD0
|
|
lbl_800B7BD0:
|
|
/* 800B7BD0 000B3A10 FC 20 70 90 */ fmr f1, f14
|
|
.global lbl_800B7BD4
|
|
lbl_800B7BD4:
|
|
/* 800B7BD4 000B3A14 C8 01 00 C8 */ lfd f0, 0xc8(r1)
|
|
/* 800B7BD8 000B3A18 FC 18 E0 00 */ fcmpu cr0, f24, f28
|
|
/* 800B7BDC 000B3A1C D0 01 00 44 */ stfs f0, 0x44(r1)
|
|
/* 800B7BE0 000B3A20 D3 41 00 48 */ stfs f26, 0x48(r1)
|
|
/* 800B7BE4 000B3A24 D0 41 00 4C */ stfs f2, 0x4c(r1)
|
|
/* 800B7BE8 000B3A28 41 82 00 90 */ beq lbl_800B7C78
|
|
/* 800B7BEC 000B3A2C 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B7BF0 000B3A30 41 82 00 44 */ beq lbl_800B7C34
|
|
/* 800B7BF4 000B3A34 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7BF8 000B3A38 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7BFC 000B3A3C 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7C00 000B3A40 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7C04 000B3A44 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7C08 000B3A48 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7C0C 000B3A4C 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7C10 000B3A50 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7C14 000B3A54 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7C18 000B3A58 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7C1C 000B3A5C EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B7C20 000B3A60 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7C24 000B3A64 EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B7C28 000B3A68 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7C2C 000B3A6C EC 55 00 28 */ fsubs f2, f21, f0
|
|
/* 800B7C30 000B3A70 48 00 00 3C */ b lbl_800B7C6C
|
|
.global lbl_800B7C34
|
|
lbl_800B7C34:
|
|
/* 800B7C34 000B3A74 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7C38 000B3A78 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7C3C 000B3A7C 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7C40 000B3A80 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7C44 000B3A84 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7C48 000B3A88 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7C4C 000B3A8C 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7C50 000B3A90 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7C54 000B3A94 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7C58 000B3A98 EC 00 A0 28 */ fsubs f0, f0, f20
|
|
/* 800B7C5C 000B3A9C EC 00 98 24 */ fdivs f0, f0, f19
|
|
/* 800B7C60 000B3AA0 EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B7C64 000B3AA4 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7C68 000B3AA8 EC 55 00 28 */ fsubs f2, f21, f0
|
|
.global lbl_800B7C6C
|
|
lbl_800B7C6C:
|
|
/* 800B7C6C 000B3AAC C0 01 00 44 */ lfs f0, 0x44(r1)
|
|
/* 800B7C70 000B3AB0 EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B7C74 000B3AB4 D0 01 00 44 */ stfs f0, 0x44(r1)
|
|
.global lbl_800B7C78
|
|
lbl_800B7C78:
|
|
/* 800B7C78 000B3AB8 FC 18 D8 00 */ fcmpu cr0, f24, f27
|
|
/* 800B7C7C 000B3ABC 41 82 00 2C */ beq lbl_800B7CA8
|
|
/* 800B7C80 000B3AC0 C0 01 00 48 */ lfs f0, 0x48(r1)
|
|
/* 800B7C84 000B3AC4 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7C88 000B3AC8 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7C8C 000B3ACC FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7C90 000B3AD0 40 80 00 28 */ bge lbl_800B7CB8
|
|
/* 800B7C94 000B3AD4 C0 01 00 4C */ lfs f0, 0x4c(r1)
|
|
/* 800B7C98 000B3AD8 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7C9C 000B3ADC FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7CA0 000B3AE0 FC 00 90 40 */ fcmpo cr0, f0, f18
|
|
/* 800B7CA4 000B3AE4 40 80 00 14 */ bge lbl_800B7CB8
|
|
.global lbl_800B7CA8
|
|
lbl_800B7CA8:
|
|
/* 800B7CA8 000B3AE8 D2 21 00 38 */ stfs f17, 0x38(r1)
|
|
/* 800B7CAC 000B3AEC D3 01 00 3C */ stfs f24, 0x3c(r1)
|
|
/* 800B7CB0 000B3AF0 D3 01 00 40 */ stfs f24, 0x40(r1)
|
|
/* 800B7CB4 000B3AF4 48 00 00 70 */ b lbl_800B7D24
|
|
.global lbl_800B7CB8
|
|
lbl_800B7CB8:
|
|
/* 800B7CB8 000B3AF8 EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B7CBC 000B3AFC 4B F5 C8 55 */ bl tan
|
|
/* 800B7CC0 000B3B00 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7CC4 000B3B04 C0 21 00 48 */ lfs f1, 0x48(r1)
|
|
/* 800B7CC8 000B3B08 C0 01 00 4C */ lfs f0, 0x4c(r1)
|
|
/* 800B7CCC 000B3B0C EC 21 00 72 */ fmuls f1, f1, f1
|
|
/* 800B7CD0 000B3B10 ED E0 20 30 */ fres f15, f4
|
|
/* 800B7CD4 000B3B14 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7CD8 000B3B18 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B7CDC 000B3B1C 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B7CE0 000B3B20 EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B7CE4 000B3B24 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B7CE8 000B3B28 FC 10 C0 40 */ fcmpo cr0, f16, f24
|
|
/* 800B7CEC 000B3B2C 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B7CF0 000B3B30 40 82 00 0C */ bne lbl_800B7CFC
|
|
/* 800B7CF4 000B3B34 FC 00 C0 90 */ fmr f0, f24
|
|
/* 800B7CF8 000B3B38 48 00 00 10 */ b lbl_800B7D08
|
|
.global lbl_800B7CFC
|
|
lbl_800B7CFC:
|
|
/* 800B7CFC 000B3B3C FC 20 80 90 */ fmr f1, f16
|
|
/* 800B7D00 000B3B40 48 04 6D 71 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7D04 000B3B44 EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B7D08
|
|
lbl_800B7D08:
|
|
/* 800B7D08 000B3B48 FC 40 00 50 */ fneg f2, f0
|
|
/* 800B7D0C 000B3B4C C0 21 00 48 */ lfs f1, 0x48(r1)
|
|
/* 800B7D10 000B3B50 D0 21 00 3C */ stfs f1, 0x3c(r1)
|
|
/* 800B7D14 000B3B54 C0 01 00 4C */ lfs f0, 0x4c(r1)
|
|
/* 800B7D18 000B3B58 EC 2F 00 B2 */ fmuls f1, f15, f2
|
|
/* 800B7D1C 000B3B5C D0 01 00 40 */ stfs f0, 0x40(r1)
|
|
/* 800B7D20 000B3B60 D0 21 00 38 */ stfs f1, 0x38(r1)
|
|
.global lbl_800B7D24
|
|
lbl_800B7D24:
|
|
/* 800B7D24 000B3B64 FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7D28 000B3B68 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7D2C 000B3B6C 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B7D30 000B3B70 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B7D34 000B3B74 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B7D38 000B3B78 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B7D3C 000B3B7C 38 81 00 44 */ addi r4, r1, 0x44
|
|
/* 800B7D40 000B3B80 38 A1 00 38 */ addi r5, r1, 0x38
|
|
/* 800B7D44 000B3B84 4B FF F0 8D */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B7D48 000B3B88 3A D6 FF FF */ addi r22, r22, -0x1
|
|
.global lbl_800B7D4C
|
|
lbl_800B7D4C:
|
|
/* 800B7D4C 000B3B8C 2C 16 00 01 */ cmpwi r22, 0x1
|
|
/* 800B7D50 000B3B90 40 80 FE 34 */ bge lbl_800B7B84
|
|
/* 800B7D54 000B3B94 3A B5 00 01 */ addi r21, r21, 0x1
|
|
.global lbl_800B7D58
|
|
lbl_800B7D58:
|
|
/* 800B7D58 000B3B98 7C 15 E8 00 */ cmpw r21, r29
|
|
/* 800B7D5C 000B3B9C 40 81 F8 64 */ ble lbl_800B75C0
|
|
/* 800B7D60 000B3BA0 3A BD FF FF */ addi r21, r29, -0x1
|
|
/* 800B7D64 000B3BA4 C2 82 8D 40 */ lfs f20, "@8290"@sda21(r2)
|
|
/* 800B7D68 000B3BA8 CA C2 8D 50 */ lfd f22, "@8301"@sda21(r2)
|
|
/* 800B7D6C 000B3BAC 7E B6 AB 78 */ mr r22, r21
|
|
/* 800B7D70 000B3BB0 C2 A2 8D 3C */ lfs f21, "@8289"@sda21(r2)
|
|
/* 800B7D74 000B3BB4 3A 40 00 01 */ li r18, 0x1
|
|
/* 800B7D78 000B3BB8 CA 62 8D 48 */ lfd f19, "@8300"@sda21(r2)
|
|
/* 800B7D7C 000B3BBC 3A 60 00 01 */ li r19, 0x1
|
|
/* 800B7D80 000B3BC0 C2 42 8D 34 */ lfs f18, "@8287"@sda21(r2)
|
|
/* 800B7D84 000B3BC4 3A 80 00 02 */ li r20, 0x2
|
|
/* 800B7D88 000B3BC8 C2 22 8D 58 */ lfs f17, "@9190"@sda21(r2)
|
|
/* 800B7D8C 000B3BCC 3A 20 00 00 */ li r17, 0x0
|
|
/* 800B7D90 000B3BD0 3F 00 00 03 */ lis r24, 0x3
|
|
/* 800B7D94 000B3BD4 48 00 02 88 */ b lbl_800B801C
|
|
.global lbl_800B7D98
|
|
lbl_800B7D98:
|
|
/* 800B7D98 000B3BD8 2C 11 00 00 */ cmpwi r17, 0x0
|
|
/* 800B7D9C 000B3BDC 41 82 00 94 */ beq lbl_800B7E30
|
|
/* 800B7DA0 000B3BE0 2C 14 00 00 */ cmpwi r20, 0x0
|
|
/* 800B7DA4 000B3BE4 41 82 00 20 */ beq lbl_800B7DC4
|
|
/* 800B7DA8 000B3BE8 2C 14 00 01 */ cmpwi r20, 0x1
|
|
/* 800B7DAC 000B3BEC 41 82 00 20 */ beq lbl_800B7DCC
|
|
/* 800B7DB0 000B3BF0 2C 14 00 02 */ cmpwi r20, 0x2
|
|
/* 800B7DB4 000B3BF4 41 82 00 20 */ beq lbl_800B7DD4
|
|
/* 800B7DB8 000B3BF8 2C 14 00 03 */ cmpwi r20, 0x3
|
|
/* 800B7DBC 000B3BFC 41 82 00 20 */ beq lbl_800B7DDC
|
|
/* 800B7DC0 000B3C00 48 00 00 20 */ b lbl_800B7DE0
|
|
.global lbl_800B7DC4
|
|
lbl_800B7DC4:
|
|
/* 800B7DC4 000B3C04 3A 52 FF FF */ addi r18, r18, -0x1
|
|
/* 800B7DC8 000B3C08 48 00 00 18 */ b lbl_800B7DE0
|
|
.global lbl_800B7DCC
|
|
lbl_800B7DCC:
|
|
/* 800B7DCC 000B3C0C 3A 73 00 01 */ addi r19, r19, 0x1
|
|
/* 800B7DD0 000B3C10 48 00 00 10 */ b lbl_800B7DE0
|
|
.global lbl_800B7DD4
|
|
lbl_800B7DD4:
|
|
/* 800B7DD4 000B3C14 3A 52 00 01 */ addi r18, r18, 0x1
|
|
/* 800B7DD8 000B3C18 48 00 00 08 */ b lbl_800B7DE0
|
|
.global lbl_800B7DDC
|
|
lbl_800B7DDC:
|
|
/* 800B7DDC 000B3C1C 3A 73 FF FF */ addi r19, r19, -0x1
|
|
.global lbl_800B7DE0
|
|
lbl_800B7DE0:
|
|
/* 800B7DE0 000B3C20 36 D6 FF FF */ addic. r22, r22, -0x1
|
|
/* 800B7DE4 000B3C24 41 81 00 4C */ bgt lbl_800B7E30
|
|
/* 800B7DE8 000B3C28 2C 14 00 00 */ cmpwi r20, 0x0
|
|
/* 800B7DEC 000B3C2C 38 80 00 03 */ li r4, 0x3
|
|
/* 800B7DF0 000B3C30 41 82 00 08 */ beq lbl_800B7DF8
|
|
/* 800B7DF4 000B3C34 38 94 FF FF */ addi r4, r20, -0x1
|
|
.global lbl_800B7DF8
|
|
lbl_800B7DF8:
|
|
/* 800B7DF8 000B3C38 54 83 0F FE */ srwi r3, r4, 31
|
|
/* 800B7DFC 000B3C3C 54 80 07 FE */ clrlwi r0, r4, 31
|
|
/* 800B7E00 000B3C40 7C 00 1A 78 */ xor r0, r0, r3
|
|
/* 800B7E04 000B3C44 7C 94 23 78 */ mr r20, r4
|
|
/* 800B7E08 000B3C48 7C 03 00 50 */ subf r0, r3, r0
|
|
/* 800B7E0C 000B3C4C 2C 00 00 01 */ cmpwi r0, 0x1
|
|
/* 800B7E10 000B3C50 40 82 00 1C */ bne lbl_800B7E2C
|
|
/* 800B7E14 000B3C54 2C 04 00 01 */ cmpwi r4, 0x1
|
|
/* 800B7E18 000B3C58 40 82 00 10 */ bne lbl_800B7E28
|
|
/* 800B7E1C 000B3C5C 38 1D FF FF */ addi r0, r29, -0x1
|
|
/* 800B7E20 000B3C60 7C 15 00 00 */ cmpw r21, r0
|
|
/* 800B7E24 000B3C64 41 82 00 08 */ beq lbl_800B7E2C
|
|
.global lbl_800B7E28
|
|
lbl_800B7E28:
|
|
/* 800B7E28 000B3C68 3A B5 FF FF */ addi r21, r21, -0x1
|
|
.global lbl_800B7E2C
|
|
lbl_800B7E2C:
|
|
/* 800B7E2C 000B3C6C 7E B6 AB 78 */ mr r22, r21
|
|
.global lbl_800B7E30
|
|
lbl_800B7E30:
|
|
/* 800B7E30 000B3C70 6E 40 80 00 */ xoris r0, r18, 0x8000
|
|
/* 800B7E34 000B3C74 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7E38 000B3C78 6E 60 80 00 */ xoris r0, r19, 0x8000
|
|
/* 800B7E3C 000B3C7C 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7E40 000B3C80 C8 21 00 B0 */ lfd f1, 0xb0(r1)
|
|
/* 800B7E44 000B3C84 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7E48 000B3C88 EC 21 B0 28 */ fsubs f1, f1, f22
|
|
/* 800B7E4C 000B3C8C EC 00 B0 28 */ fsubs f0, f0, f22
|
|
/* 800B7E50 000B3C90 EC 21 07 72 */ fmuls f1, f1, f29
|
|
/* 800B7E54 000B3C94 EC 00 07 72 */ fmuls f0, f0, f29
|
|
/* 800B7E58 000B3C98 EC 41 A8 28 */ fsubs f2, f1, f21
|
|
/* 800B7E5C 000B3C9C EC 60 A8 28 */ fsubs f3, f0, f21
|
|
/* 800B7E60 000B3CA0 FC 20 12 10 */ fabs f1, f2
|
|
/* 800B7E64 000B3CA4 FC 00 1A 10 */ fabs f0, f3
|
|
/* 800B7E68 000B3CA8 EC 82 07 F2 */ fmuls f4, f2, f31
|
|
/* 800B7E6C 000B3CAC FC 20 08 18 */ frsp f1, f1
|
|
/* 800B7E70 000B3CB0 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7E74 000B3CB4 EC A3 07 B2 */ fmuls f5, f3, f30
|
|
/* 800B7E78 000B3CB8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B7E7C 000B3CBC 40 81 00 08 */ ble lbl_800B7E84
|
|
/* 800B7E80 000B3CC0 48 00 00 08 */ b lbl_800B7E88
|
|
.global lbl_800B7E84
|
|
lbl_800B7E84:
|
|
/* 800B7E84 000B3CC4 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B7E88
|
|
lbl_800B7E88:
|
|
/* 800B7E88 000B3CC8 FC 00 1A 10 */ fabs f0, f3
|
|
/* 800B7E8C 000B3CCC FC 40 12 10 */ fabs f2, f2
|
|
/* 800B7E90 000B3CD0 EC 75 08 28 */ fsubs f3, f21, f1
|
|
/* 800B7E94 000B3CD4 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7E98 000B3CD8 FC 20 10 18 */ frsp f1, f2
|
|
/* 800B7E9C 000B3CDC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B7EA0 000B3CE0 40 81 00 08 */ ble lbl_800B7EA8
|
|
/* 800B7EA4 000B3CE4 48 00 00 08 */ b lbl_800B7EAC
|
|
.global lbl_800B7EA8
|
|
lbl_800B7EA8:
|
|
/* 800B7EA8 000B3CE8 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B7EAC
|
|
lbl_800B7EAC:
|
|
/* 800B7EAC 000B3CEC C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B7EB0 000B3CF0 FC 14 E0 00 */ fcmpu cr0, f20, f28
|
|
/* 800B7EB4 000B3CF4 D0 81 00 2C */ stfs f4, 0x2c(r1)
|
|
/* 800B7EB8 000B3CF8 D0 01 00 30 */ stfs f0, 0x30(r1)
|
|
/* 800B7EBC 000B3CFC D0 A1 00 34 */ stfs f5, 0x34(r1)
|
|
/* 800B7EC0 000B3D00 41 82 00 90 */ beq lbl_800B7F50
|
|
/* 800B7EC4 000B3D04 2C 19 00 00 */ cmpwi r25, 0x0
|
|
/* 800B7EC8 000B3D08 41 82 00 44 */ beq lbl_800B7F0C
|
|
/* 800B7ECC 000B3D0C 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7ED0 000B3D10 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7ED4 000B3D14 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7ED8 000B3D18 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7EDC 000B3D1C 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7EE0 000B3D20 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7EE4 000B3D24 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7EE8 000B3D28 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B7EEC 000B3D2C C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B7EF0 000B3D30 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B7EF4 000B3D34 EC 00 90 24 */ fdivs f0, f0, f18
|
|
/* 800B7EF8 000B3D38 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7EFC 000B3D3C EC 00 07 32 */ fmuls f0, f0, f28
|
|
/* 800B7F00 000B3D40 EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7F04 000B3D44 EC 55 00 28 */ fsubs f2, f21, f0
|
|
/* 800B7F08 000B3D48 48 00 00 3C */ b lbl_800B7F44
|
|
.global lbl_800B7F0C
|
|
lbl_800B7F0C:
|
|
/* 800B7F0C 000B3D4C 80 7B 00 EC */ lwz r3, 0xec(r27)
|
|
/* 800B7F10 000B3D50 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B7F14 000B3D54 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B7F18 000B3D58 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B7F1C 000B3D5C 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B7F20 000B3D60 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B7F24 000B3D64 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B7F28 000B3D68 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B7F2C 000B3D6C C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B7F30 000B3D70 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B7F34 000B3D74 EC 00 90 24 */ fdivs f0, f0, f18
|
|
/* 800B7F38 000B3D78 EC 1C 00 32 */ fmuls f0, f28, f0
|
|
/* 800B7F3C 000B3D7C EC 03 00 32 */ fmuls f0, f3, f0
|
|
/* 800B7F40 000B3D80 EC 55 00 28 */ fsubs f2, f21, f0
|
|
.global lbl_800B7F44
|
|
lbl_800B7F44:
|
|
/* 800B7F44 000B3D84 C0 01 00 30 */ lfs f0, 0x30(r1)
|
|
/* 800B7F48 000B3D88 EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B7F4C 000B3D8C D0 01 00 30 */ stfs f0, 0x30(r1)
|
|
.global lbl_800B7F50
|
|
lbl_800B7F50:
|
|
/* 800B7F50 000B3D90 FC 14 D8 00 */ fcmpu cr0, f20, f27
|
|
/* 800B7F54 000B3D94 41 82 00 2C */ beq lbl_800B7F80
|
|
/* 800B7F58 000B3D98 C0 01 00 2C */ lfs f0, 0x2c(r1)
|
|
/* 800B7F5C 000B3D9C FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7F60 000B3DA0 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7F64 000B3DA4 FC 00 88 40 */ fcmpo cr0, f0, f17
|
|
/* 800B7F68 000B3DA8 40 80 00 28 */ bge lbl_800B7F90
|
|
/* 800B7F6C 000B3DAC C0 01 00 34 */ lfs f0, 0x34(r1)
|
|
/* 800B7F70 000B3DB0 FC 00 02 10 */ fabs f0, f0
|
|
/* 800B7F74 000B3DB4 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B7F78 000B3DB8 FC 00 88 40 */ fcmpo cr0, f0, f17
|
|
/* 800B7F7C 000B3DBC 40 80 00 14 */ bge lbl_800B7F90
|
|
.global lbl_800B7F80
|
|
lbl_800B7F80:
|
|
/* 800B7F80 000B3DC0 D2 81 00 20 */ stfs f20, 0x20(r1)
|
|
/* 800B7F84 000B3DC4 D2 A1 00 24 */ stfs f21, 0x24(r1)
|
|
/* 800B7F88 000B3DC8 D2 81 00 28 */ stfs f20, 0x28(r1)
|
|
/* 800B7F8C 000B3DCC 48 00 00 68 */ b lbl_800B7FF4
|
|
.global lbl_800B7F90
|
|
lbl_800B7F90:
|
|
/* 800B7F90 000B3DD0 EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B7F94 000B3DD4 4B F5 C5 7D */ bl tan
|
|
/* 800B7F98 000B3DD8 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B7F9C 000B3DDC C0 41 00 2C */ lfs f2, 0x2c(r1)
|
|
/* 800B7FA0 000B3DE0 C0 01 00 34 */ lfs f0, 0x34(r1)
|
|
/* 800B7FA4 000B3DE4 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B7FA8 000B3DE8 D0 41 00 20 */ stfs f2, 0x20(r1)
|
|
/* 800B7FAC 000B3DEC ED C0 20 30 */ fres f14, f4
|
|
/* 800B7FB0 000B3DF0 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B7FB4 000B3DF4 10 6E 70 2A */ ps_add f3, f14, f14
|
|
/* 800B7FB8 000B3DF8 10 4E 03 B2 */ ps_mul f2, f14, f14
|
|
/* 800B7FBC 000B3DFC ED E1 00 2A */ fadds f15, f1, f0
|
|
/* 800B7FC0 000B3E00 11 C4 18 BC */ ps_nmsub f14, f4, f2, f3
|
|
/* 800B7FC4 000B3E04 FC 0F A0 40 */ fcmpo cr0, f15, f20
|
|
/* 800B7FC8 000B3E08 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B7FCC 000B3E0C 40 82 00 0C */ bne lbl_800B7FD8
|
|
/* 800B7FD0 000B3E10 FC 00 A0 90 */ fmr f0, f20
|
|
/* 800B7FD4 000B3E14 48 00 00 10 */ b lbl_800B7FE4
|
|
.global lbl_800B7FD8
|
|
lbl_800B7FD8:
|
|
/* 800B7FD8 000B3E18 FC 20 78 90 */ fmr f1, f15
|
|
/* 800B7FDC 000B3E1C 48 04 6A 95 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B7FE0 000B3E20 EC 0F 00 72 */ fmuls f0, f15, f1
|
|
.global lbl_800B7FE4
|
|
lbl_800B7FE4:
|
|
/* 800B7FE4 000B3E24 EC 2E 00 32 */ fmuls f1, f14, f0
|
|
/* 800B7FE8 000B3E28 C0 01 00 34 */ lfs f0, 0x34(r1)
|
|
/* 800B7FEC 000B3E2C D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 800B7FF0 000B3E30 D0 21 00 24 */ stfs f1, 0x24(r1)
|
|
.global lbl_800B7FF4
|
|
lbl_800B7FF4:
|
|
/* 800B7FF4 000B3E34 FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B7FF8 000B3E38 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B7FFC 000B3E3C 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B8000 000B3E40 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B8004 000B3E44 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B8008 000B3E48 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B800C 000B3E4C 38 81 00 2C */ addi r4, r1, 0x2c
|
|
/* 800B8010 000B3E50 38 A1 00 20 */ addi r5, r1, 0x20
|
|
/* 800B8014 000B3E54 4B FF ED BD */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B8018 000B3E58 3A 31 00 01 */ addi r17, r17, 0x1
|
|
.global lbl_800B801C
|
|
lbl_800B801C:
|
|
/* 800B801C 000B3E5C 7C 11 B8 00 */ cmpw r17, r23
|
|
/* 800B8020 000B3E60 41 80 FD 78 */ blt lbl_800B7D98
|
|
/* 800B8024 000B3E64 48 00 08 E0 */ b lbl_800B8904
|
|
.global lbl_800B8028
|
|
lbl_800B8028:
|
|
/* 800B8028 000B3E68 C2 22 8D 40 */ lfs f17, "@8290"@sda21(r2)
|
|
/* 800B802C 000B3E6C 3A 20 00 00 */ li r17, 0x0
|
|
/* 800B8030 000B3E70 C2 A2 8D 38 */ lfs f21, "@8288"@sda21(r2)
|
|
/* 800B8034 000B3E74 3F 00 00 03 */ lis r24, 0x3
|
|
/* 800B8038 000B3E78 C2 C2 8D 64 */ lfs f22, "@9193"@sda21(r2)
|
|
/* 800B803C 000B3E7C 3F 20 2A AB */ lis r25, 0x2aab
|
|
/* 800B8040 000B3E80 C2 42 8D 3C */ lfs f18, "@8289"@sda21(r2)
|
|
/* 800B8044 000B3E84 CA 62 8D 48 */ lfd f19, "@8300"@sda21(r2)
|
|
/* 800B8048 000B3E88 C2 82 8D 34 */ lfs f20, "@8287"@sda21(r2)
|
|
/* 800B804C 000B3E8C 48 00 08 B0 */ b lbl_800B88FC
|
|
.global lbl_800B8050
|
|
lbl_800B8050:
|
|
/* 800B8050 000B3E90 FC 11 E8 00 */ fcmpu cr0, f17, f29
|
|
/* 800B8054 000B3E94 40 82 00 8C */ bne lbl_800B80E0
|
|
/* 800B8058 000B3E98 80 1B 00 EC */ lwz r0, 0xec(r27)
|
|
/* 800B805C 000B3E9C 38 98 43 FD */ addi r4, r24, 0x43fd
|
|
/* 800B8060 000B3EA0 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B8064 000B3EA4 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8068 000B3EA8 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B806C 000B3EAC 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B8070 000B3EB0 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8074 000B3EB4 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8078 000B3EB8 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B807C 000B3EBC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8080 000B3EC0 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8084 000B3EC4 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8088 000B3EC8 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B808C 000B3ECC 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8090 000B3ED0 EC 40 A0 24 */ fdivs f2, f0, f20
|
|
/* 800B8094 000B3ED4 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8098 000B3ED8 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B809C 000B3EDC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B80A0 000B3EE0 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B80A4 000B3EE4 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B80A8 000B3EE8 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B80AC 000B3EEC EC 20 98 28 */ fsubs f1, f0, f19
|
|
/* 800B80B0 000B3EF0 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B80B4 000B3EF4 EC 55 00 B2 */ fmuls f2, f21, f2
|
|
/* 800B80B8 000B3EF8 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B80BC 000B3EFC EC 21 A0 24 */ fdivs f1, f1, f20
|
|
/* 800B80C0 000B3F00 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B80C4 000B3F04 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B80C8 000B3F08 EF 42 90 28 */ fsubs f26, f2, f18
|
|
/* 800B80CC 000B3F0C EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B80D0 000B3F10 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B80D4 000B3F14 EF 21 90 28 */ fsubs f25, f1, f18
|
|
/* 800B80D8 000B3F18 EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B80DC 000B3F1C 48 00 04 FC */ b lbl_800B85D8
|
|
.global lbl_800B80E0
|
|
lbl_800B80E0:
|
|
/* 800B80E0 000B3F20 FC 12 E8 00 */ fcmpu cr0, f18, f29
|
|
/* 800B80E4 000B3F24 40 82 02 90 */ bne lbl_800B8374
|
|
/* 800B80E8 000B3F28 80 9B 00 EC */ lwz r4, 0xec(r27)
|
|
/* 800B80EC 000B3F2C 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B80F0 000B3F30 38 79 AA AB */ addi r3, r25, -0x5555
|
|
/* 800B80F4 000B3F34 7C 84 01 D6 */ mullw r4, r4, r0
|
|
/* 800B80F8 000B3F38 3C 84 00 27 */ addis r4, r4, 0x27
|
|
/* 800B80FC 000B3F3C 38 C4 9E C3 */ addi r6, r4, -0x613d
|
|
/* 800B8100 000B3F40 90 DB 00 EC */ stw r6, 0xec(r27)
|
|
/* 800B8104 000B3F44 54 C5 84 3E */ srwi r5, r6, 16
|
|
/* 800B8108 000B3F48 7C 83 28 96 */ mulhw r4, r3, r5
|
|
/* 800B810C 000B3F4C 54 83 0F FE */ srwi r3, r4, 31
|
|
/* 800B8110 000B3F50 7C 64 1A 14 */ add r3, r4, r3
|
|
/* 800B8114 000B3F54 1C 63 00 06 */ mulli r3, r3, 0x6
|
|
/* 800B8118 000B3F58 7C 63 28 51 */ subf. r3, r3, r5
|
|
/* 800B811C 000B3F5C 41 82 00 30 */ beq lbl_800B814C
|
|
/* 800B8120 000B3F60 2C 03 00 01 */ cmpwi r3, 0x1
|
|
/* 800B8124 000B3F64 41 82 00 84 */ beq lbl_800B81A8
|
|
/* 800B8128 000B3F68 2C 03 00 02 */ cmpwi r3, 0x2
|
|
/* 800B812C 000B3F6C 41 82 00 D8 */ beq lbl_800B8204
|
|
/* 800B8130 000B3F70 2C 03 00 03 */ cmpwi r3, 0x3
|
|
/* 800B8134 000B3F74 41 82 01 2C */ beq lbl_800B8260
|
|
/* 800B8138 000B3F78 2C 03 00 04 */ cmpwi r3, 0x4
|
|
/* 800B813C 000B3F7C 41 82 01 80 */ beq lbl_800B82BC
|
|
/* 800B8140 000B3F80 2C 03 00 05 */ cmpwi r3, 0x5
|
|
/* 800B8144 000B3F84 41 82 01 D4 */ beq lbl_800B8318
|
|
/* 800B8148 000B3F88 48 00 04 90 */ b lbl_800B85D8
|
|
.global lbl_800B814C
|
|
lbl_800B814C:
|
|
/* 800B814C 000B3F8C 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B8150 000B3F90 FF 00 90 90 */ fmr f24, f18
|
|
/* 800B8154 000B3F94 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8158 000B3F98 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B815C 000B3F9C 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B8160 000B3FA0 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B8164 000B3FA4 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8168 000B3FA8 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B816C 000B3FAC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8170 000B3FB0 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8174 000B3FB4 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8178 000B3FB8 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B817C 000B3FBC 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8180 000B3FC0 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8184 000B3FC4 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B8188 000B3FC8 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B818C 000B3FCC EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8190 000B3FD0 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B8194 000B3FD4 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8198 000B3FD8 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B819C 000B3FDC EF 41 90 28 */ fsubs f26, f1, f18
|
|
/* 800B81A0 000B3FE0 EF 20 90 28 */ fsubs f25, f0, f18
|
|
/* 800B81A4 000B3FE4 48 00 04 34 */ b lbl_800B85D8
|
|
.global lbl_800B81A8
|
|
lbl_800B81A8:
|
|
/* 800B81A8 000B3FE8 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B81AC 000B3FEC C3 02 8D 64 */ lfs f24, "@9193"@sda21(r2)
|
|
/* 800B81B0 000B3FF0 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B81B4 000B3FF4 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B81B8 000B3FF8 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B81BC 000B3FFC 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B81C0 000B4000 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B81C4 000B4004 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B81C8 000B4008 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B81CC 000B400C EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B81D0 000B4010 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B81D4 000B4014 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B81D8 000B4018 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B81DC 000B401C 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B81E0 000B4020 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B81E4 000B4024 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B81E8 000B4028 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B81EC 000B402C EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B81F0 000B4030 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B81F4 000B4034 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B81F8 000B4038 EF 41 90 28 */ fsubs f26, f1, f18
|
|
/* 800B81FC 000B403C EF 20 90 28 */ fsubs f25, f0, f18
|
|
/* 800B8200 000B4040 48 00 03 D8 */ b lbl_800B85D8
|
|
.global lbl_800B8204
|
|
lbl_800B8204:
|
|
/* 800B8204 000B4044 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B8208 000B4048 FF 20 90 90 */ fmr f25, f18
|
|
/* 800B820C 000B404C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8210 000B4050 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B8214 000B4054 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B8218 000B4058 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B821C 000B405C 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8220 000B4060 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B8224 000B4064 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8228 000B4068 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B822C 000B406C 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8230 000B4070 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B8234 000B4074 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8238 000B4078 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B823C 000B407C EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B8240 000B4080 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B8244 000B4084 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8248 000B4088 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B824C 000B408C EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8250 000B4090 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8254 000B4094 EF 41 90 28 */ fsubs f26, f1, f18
|
|
/* 800B8258 000B4098 EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B825C 000B409C 48 00 03 7C */ b lbl_800B85D8
|
|
.global lbl_800B8260
|
|
lbl_800B8260:
|
|
/* 800B8260 000B40A0 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B8264 000B40A4 C3 22 8D 64 */ lfs f25, "@9193"@sda21(r2)
|
|
/* 800B8268 000B40A8 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B826C 000B40AC 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B8270 000B40B0 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B8274 000B40B4 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B8278 000B40B8 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B827C 000B40BC C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B8280 000B40C0 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8284 000B40C4 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8288 000B40C8 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B828C 000B40CC 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B8290 000B40D0 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8294 000B40D4 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8298 000B40D8 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B829C 000B40DC C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B82A0 000B40E0 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B82A4 000B40E4 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B82A8 000B40E8 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B82AC 000B40EC EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B82B0 000B40F0 EF 41 90 28 */ fsubs f26, f1, f18
|
|
/* 800B82B4 000B40F4 EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B82B8 000B40F8 48 00 03 20 */ b lbl_800B85D8
|
|
.global lbl_800B82BC
|
|
lbl_800B82BC:
|
|
/* 800B82BC 000B40FC 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B82C0 000B4100 FF 40 90 90 */ fmr f26, f18
|
|
/* 800B82C4 000B4104 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B82C8 000B4108 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B82CC 000B410C 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B82D0 000B4110 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B82D4 000B4114 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B82D8 000B4118 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B82DC 000B411C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B82E0 000B4120 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B82E4 000B4124 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B82E8 000B4128 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B82EC 000B412C 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B82F0 000B4130 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B82F4 000B4134 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B82F8 000B4138 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B82FC 000B413C EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8300 000B4140 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B8304 000B4144 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8308 000B4148 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B830C 000B414C EF 21 90 28 */ fsubs f25, f1, f18
|
|
/* 800B8310 000B4150 EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B8314 000B4154 48 00 02 C4 */ b lbl_800B85D8
|
|
.global lbl_800B8318
|
|
lbl_800B8318:
|
|
/* 800B8318 000B4158 7C 66 01 D6 */ mullw r3, r6, r0
|
|
/* 800B831C 000B415C C3 42 8D 64 */ lfs f26, "@9193"@sda21(r2)
|
|
/* 800B8320 000B4160 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8324 000B4164 38 83 9E C3 */ addi r4, r3, -0x613d
|
|
/* 800B8328 000B4168 7C 64 01 D6 */ mullw r3, r4, r0
|
|
/* 800B832C 000B416C 54 80 84 3E */ srwi r0, r4, 16
|
|
/* 800B8330 000B4170 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8334 000B4174 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B8338 000B4178 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B833C 000B417C EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8340 000B4180 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8344 000B4184 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B8348 000B4188 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B834C 000B418C 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8350 000B4190 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B8354 000B4194 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B8358 000B4198 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B835C 000B419C EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B8360 000B41A0 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8364 000B41A4 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8368 000B41A8 EF 21 90 28 */ fsubs f25, f1, f18
|
|
/* 800B836C 000B41AC EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B8370 000B41B0 48 00 02 68 */ b lbl_800B85D8
|
|
.global lbl_800B8374
|
|
lbl_800B8374:
|
|
/* 800B8374 000B41B4 80 1B 00 EC */ lwz r0, 0xec(r27)
|
|
/* 800B8378 000B41B8 38 98 43 FD */ addi r4, r24, 0x43fd
|
|
/* 800B837C 000B41BC C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B8380 000B41C0 EC 3F 07 32 */ fmuls f1, f31, f28
|
|
/* 800B8384 000B41C4 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B8388 000B41C8 EC 7F 00 32 */ fmuls f3, f31, f0
|
|
/* 800B838C 000B41CC EC 00 00 72 */ fmuls f0, f0, f1
|
|
/* 800B8390 000B41D0 EC 5D 00 F2 */ fmuls f2, f29, f3
|
|
/* 800B8394 000B41D4 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8398 000B41D8 EC 7C 00 F2 */ fmuls f3, f28, f3
|
|
/* 800B839C 000B41DC 38 63 9E C3 */ addi r3, r3, -0x613d
|
|
/* 800B83A0 000B41E0 EC 3D 00 32 */ fmuls f1, f29, f0
|
|
/* 800B83A4 000B41E4 54 60 84 3E */ srwi r0, r3, 16
|
|
/* 800B83A8 000B41E8 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B83AC 000B41EC EC 5E 00 B2 */ fmuls f2, f30, f2
|
|
/* 800B83B0 000B41F0 EC 7E 00 F2 */ fmuls f3, f30, f3
|
|
/* 800B83B4 000B41F4 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B83B8 000B41F8 EC 9C 00 B2 */ fmuls f4, f28, f2
|
|
/* 800B83BC 000B41FC 90 7B 00 EC */ stw r3, 0xec(r27)
|
|
/* 800B83C0 000B4200 EC 5E 00 72 */ fmuls f2, f30, f1
|
|
/* 800B83C4 000B4204 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B83C8 000B4208 EC 23 20 2A */ fadds f1, f3, f4
|
|
/* 800B83CC 000B420C EC 9D 00 B2 */ fmuls f4, f29, f2
|
|
/* 800B83D0 000B4210 EC 40 A0 24 */ fdivs f2, f0, f20
|
|
/* 800B83D4 000B4214 EC 04 08 2A */ fadds f0, f4, f1
|
|
/* 800B83D8 000B4218 EC 00 00 B2 */ fmuls f0, f0, f2
|
|
/* 800B83DC 000B421C FC 00 18 40 */ fcmpo cr0, f0, f3
|
|
/* 800B83E0 000B4220 40 80 00 A8 */ bge lbl_800B8488
|
|
/* 800B83E4 000B4224 7C 63 21 D6 */ mullw r3, r3, r4
|
|
/* 800B83E8 000B4228 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B83EC 000B422C 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B83F0 000B4230 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B83F4 000B4234 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B83F8 000B4238 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B83FC 000B423C C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B8400 000B4240 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8404 000B4244 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8408 000B4248 38 63 9E C3 */ addi r3, r3, -0x613d
|
|
/* 800B840C 000B424C 90 7B 00 EC */ stw r3, 0xec(r27)
|
|
/* 800B8410 000B4250 54 60 84 3E */ srwi r0, r3, 16
|
|
/* 800B8414 000B4254 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8418 000B4258 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B841C 000B425C C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B8420 000B4260 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8424 000B4264 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B8428 000B4268 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B842C 000B426C EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8430 000B4270 EF 41 90 28 */ fsubs f26, f1, f18
|
|
/* 800B8434 000B4274 EC 00 90 28 */ fsubs f0, f0, f18
|
|
/* 800B8438 000B4278 EF 3C 00 32 */ fmuls f25, f28, f0
|
|
/* 800B843C 000B427C FC 19 88 40 */ fcmpo cr0, f25, f17
|
|
/* 800B8440 000B4280 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8444 000B4284 40 82 00 0C */ bne lbl_800B8450
|
|
/* 800B8448 000B4288 EF 32 C8 28 */ fsubs f25, f18, f25
|
|
/* 800B844C 000B428C 48 00 00 08 */ b lbl_800B8454
|
|
.global lbl_800B8450
|
|
lbl_800B8450:
|
|
/* 800B8450 000B4290 EF 36 C8 28 */ fsubs f25, f22, f25
|
|
.global lbl_800B8454
|
|
lbl_800B8454:
|
|
/* 800B8454 000B4294 38 18 43 FD */ addi r0, r24, 0x43fd
|
|
/* 800B8458 000B4298 7C 63 01 D6 */ mullw r3, r3, r0
|
|
/* 800B845C 000B429C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8460 000B42A0 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8464 000B42A4 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B8468 000B42A8 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B846C 000B42AC 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8470 000B42B0 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B8474 000B42B4 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8478 000B42B8 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B847C 000B42BC EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8480 000B42C0 EF 00 90 28 */ fsubs f24, f0, f18
|
|
/* 800B8484 000B42C4 48 00 01 54 */ b lbl_800B85D8
|
|
.global lbl_800B8488
|
|
lbl_800B8488:
|
|
/* 800B8488 000B42C8 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B848C 000B42CC 40 80 00 A4 */ bge lbl_800B8530
|
|
/* 800B8490 000B42D0 7C 63 21 D6 */ mullw r3, r3, r4
|
|
/* 800B8494 000B42D4 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8498 000B42D8 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B849C 000B42DC 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B84A0 000B42E0 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B84A4 000B42E4 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B84A8 000B42E8 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B84AC 000B42EC 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B84B0 000B42F0 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B84B4 000B42F4 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B84B8 000B42F8 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B84BC 000B42FC 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B84C0 000B4300 EC 40 A0 24 */ fdivs f2, f0, f20
|
|
/* 800B84C4 000B4304 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B84C8 000B4308 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B84CC 000B430C 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B84D0 000B4310 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B84D4 000B4314 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B84D8 000B4318 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B84DC 000B431C EC 20 98 28 */ fsubs f1, f0, f19
|
|
/* 800B84E0 000B4320 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B84E4 000B4324 EC 55 00 B2 */ fmuls f2, f21, f2
|
|
/* 800B84E8 000B4328 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B84EC 000B432C EC 21 A0 24 */ fdivs f1, f1, f20
|
|
/* 800B84F0 000B4330 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B84F4 000B4334 EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B84F8 000B4338 EF 42 90 28 */ fsubs f26, f2, f18
|
|
/* 800B84FC 000B433C EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8500 000B4340 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8504 000B4344 EC 21 90 28 */ fsubs f1, f1, f18
|
|
/* 800B8508 000B4348 EC 00 90 28 */ fsubs f0, f0, f18
|
|
/* 800B850C 000B434C EF 3D 00 72 */ fmuls f25, f29, f1
|
|
/* 800B8510 000B4350 EF 1C 00 32 */ fmuls f24, f28, f0
|
|
/* 800B8514 000B4354 FC 18 88 40 */ fcmpo cr0, f24, f17
|
|
/* 800B8518 000B4358 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B851C 000B435C 40 82 00 0C */ bne lbl_800B8528
|
|
/* 800B8520 000B4360 EF 12 C0 28 */ fsubs f24, f18, f24
|
|
/* 800B8524 000B4364 48 00 00 B4 */ b lbl_800B85D8
|
|
.global lbl_800B8528
|
|
lbl_800B8528:
|
|
/* 800B8528 000B4368 EF 16 C0 28 */ fsubs f24, f22, f24
|
|
/* 800B852C 000B436C 48 00 00 AC */ b lbl_800B85D8
|
|
.global lbl_800B8530
|
|
lbl_800B8530:
|
|
/* 800B8530 000B4370 7C 63 21 D6 */ mullw r3, r3, r4
|
|
/* 800B8534 000B4374 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8538 000B4378 38 63 9E C3 */ addi r3, r3, -0x613d
|
|
/* 800B853C 000B437C 90 7B 00 EC */ stw r3, 0xec(r27)
|
|
/* 800B8540 000B4380 54 60 84 3E */ srwi r0, r3, 16
|
|
/* 800B8544 000B4384 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B8548 000B4388 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B854C 000B438C EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B8550 000B4390 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B8554 000B4394 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B8558 000B4398 EC 00 90 28 */ fsubs f0, f0, f18
|
|
/* 800B855C 000B439C EF 5C 00 32 */ fmuls f26, f28, f0
|
|
/* 800B8560 000B43A0 FC 1A 88 40 */ fcmpo cr0, f26, f17
|
|
/* 800B8564 000B43A4 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8568 000B43A8 40 82 00 0C */ bne lbl_800B8574
|
|
/* 800B856C 000B43AC EF 52 D0 28 */ fsubs f26, f18, f26
|
|
/* 800B8570 000B43B0 48 00 00 08 */ b lbl_800B8578
|
|
.global lbl_800B8574
|
|
lbl_800B8574:
|
|
/* 800B8574 000B43B4 EF 56 D0 28 */ fsubs f26, f22, f26
|
|
.global lbl_800B8578
|
|
lbl_800B8578:
|
|
/* 800B8578 000B43B8 38 98 43 FD */ addi r4, r24, 0x43fd
|
|
/* 800B857C 000B43BC 7C 63 21 D6 */ mullw r3, r3, r4
|
|
/* 800B8580 000B43C0 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B8584 000B43C4 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B8588 000B43C8 7C 60 21 D6 */ mullw r3, r0, r4
|
|
/* 800B858C 000B43CC 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B8590 000B43D0 90 01 00 BC */ stw r0, 0xbc(r1)
|
|
/* 800B8594 000B43D4 C8 01 00 B8 */ lfd f0, 0xb8(r1)
|
|
/* 800B8598 000B43D8 3C 63 00 27 */ addis r3, r3, 0x27
|
|
/* 800B859C 000B43DC EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B85A0 000B43E0 38 03 9E C3 */ addi r0, r3, -0x613d
|
|
/* 800B85A4 000B43E4 90 1B 00 EC */ stw r0, 0xec(r27)
|
|
/* 800B85A8 000B43E8 54 00 84 3E */ srwi r0, r0, 16
|
|
/* 800B85AC 000B43EC 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 800B85B0 000B43F0 EC 20 A0 24 */ fdivs f1, f0, f20
|
|
/* 800B85B4 000B43F4 C8 01 00 B0 */ lfd f0, 0xb0(r1)
|
|
/* 800B85B8 000B43F8 EC 00 98 28 */ fsubs f0, f0, f19
|
|
/* 800B85BC 000B43FC EC 35 00 72 */ fmuls f1, f21, f1
|
|
/* 800B85C0 000B4400 EC 00 A0 24 */ fdivs f0, f0, f20
|
|
/* 800B85C4 000B4404 EC 15 00 32 */ fmuls f0, f21, f0
|
|
/* 800B85C8 000B4408 EC 21 90 28 */ fsubs f1, f1, f18
|
|
/* 800B85CC 000B440C EC 00 90 28 */ fsubs f0, f0, f18
|
|
/* 800B85D0 000B4410 EF 3D 00 72 */ fmuls f25, f29, f1
|
|
/* 800B85D4 000B4414 EF 1D 00 32 */ fmuls f24, f29, f0
|
|
.global lbl_800B85D8
|
|
lbl_800B85D8:
|
|
/* 800B85D8 000B4418 FC 19 88 40 */ fcmpo cr0, f25, f17
|
|
/* 800B85DC 000B441C D2 21 00 08 */ stfs f17, 0x8(r1)
|
|
/* 800B85E0 000B4420 D2 21 00 0C */ stfs f17, 0xc(r1)
|
|
/* 800B85E4 000B4424 D2 21 00 10 */ stfs f17, 0x10(r1)
|
|
/* 800B85E8 000B4428 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B85EC 000B442C 40 82 00 34 */ bne lbl_800B8620
|
|
/* 800B85F0 000B4430 FC 00 D2 10 */ fabs f0, f26
|
|
/* 800B85F4 000B4434 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B85F8 000B4438 FC 19 00 40 */ fcmpo cr0, f25, f0
|
|
/* 800B85FC 000B443C 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8600 000B4440 40 82 00 20 */ bne lbl_800B8620
|
|
/* 800B8604 000B4444 FC 00 C2 10 */ fabs f0, f24
|
|
/* 800B8608 000B4448 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B860C 000B444C FC 19 00 40 */ fcmpo cr0, f25, f0
|
|
/* 800B8610 000B4450 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8614 000B4454 40 82 00 0C */ bne lbl_800B8620
|
|
/* 800B8618 000B4458 D2 41 00 0C */ stfs f18, 0xc(r1)
|
|
/* 800B861C 000B445C 48 00 00 D0 */ b lbl_800B86EC
|
|
.global lbl_800B8620
|
|
lbl_800B8620:
|
|
/* 800B8620 000B4460 FC 19 88 40 */ fcmpo cr0, f25, f17
|
|
/* 800B8624 000B4464 40 80 00 38 */ bge lbl_800B865C
|
|
/* 800B8628 000B4468 FC 20 D2 10 */ fabs f1, f26
|
|
/* 800B862C 000B446C FC 00 C8 50 */ fneg f0, f25
|
|
/* 800B8630 000B4470 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B8634 000B4474 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B8638 000B4478 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B863C 000B447C 40 82 00 20 */ bne lbl_800B865C
|
|
/* 800B8640 000B4480 FC 20 C2 10 */ fabs f1, f24
|
|
/* 800B8644 000B4484 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B8648 000B4488 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B864C 000B448C 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8650 000B4490 40 82 00 0C */ bne lbl_800B865C
|
|
/* 800B8654 000B4494 D2 C1 00 0C */ stfs f22, 0xc(r1)
|
|
/* 800B8658 000B4498 48 00 00 94 */ b lbl_800B86EC
|
|
.global lbl_800B865C
|
|
lbl_800B865C:
|
|
/* 800B865C 000B449C FC 1A 88 40 */ fcmpo cr0, f26, f17
|
|
/* 800B8660 000B44A0 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8664 000B44A4 40 82 00 34 */ bne lbl_800B8698
|
|
/* 800B8668 000B44A8 FC 00 CA 10 */ fabs f0, f25
|
|
/* 800B866C 000B44AC FC 00 00 18 */ frsp f0, f0
|
|
/* 800B8670 000B44B0 FC 1A 00 40 */ fcmpo cr0, f26, f0
|
|
/* 800B8674 000B44B4 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B8678 000B44B8 40 82 00 20 */ bne lbl_800B8698
|
|
/* 800B867C 000B44BC FC 00 C2 10 */ fabs f0, f24
|
|
/* 800B8680 000B44C0 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B8684 000B44C4 FC 1A 00 40 */ fcmpo cr0, f26, f0
|
|
/* 800B8688 000B44C8 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B868C 000B44CC 40 82 00 0C */ bne lbl_800B8698
|
|
/* 800B8690 000B44D0 D2 41 00 08 */ stfs f18, 0x8(r1)
|
|
/* 800B8694 000B44D4 48 00 00 58 */ b lbl_800B86EC
|
|
.global lbl_800B8698
|
|
lbl_800B8698:
|
|
/* 800B8698 000B44D8 FC 1A 88 40 */ fcmpo cr0, f26, f17
|
|
/* 800B869C 000B44DC 40 80 00 38 */ bge lbl_800B86D4
|
|
/* 800B86A0 000B44E0 FC 20 CA 10 */ fabs f1, f25
|
|
/* 800B86A4 000B44E4 FC 00 D0 50 */ fneg f0, f26
|
|
/* 800B86A8 000B44E8 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B86AC 000B44EC FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B86B0 000B44F0 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B86B4 000B44F4 40 82 00 20 */ bne lbl_800B86D4
|
|
/* 800B86B8 000B44F8 FC 20 C2 10 */ fabs f1, f24
|
|
/* 800B86BC 000B44FC FC 20 08 18 */ frsp f1, f1
|
|
/* 800B86C0 000B4500 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 800B86C4 000B4504 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B86C8 000B4508 40 82 00 0C */ bne lbl_800B86D4
|
|
/* 800B86CC 000B450C D2 C1 00 08 */ stfs f22, 0x8(r1)
|
|
/* 800B86D0 000B4510 48 00 00 1C */ b lbl_800B86EC
|
|
.global lbl_800B86D4
|
|
lbl_800B86D4:
|
|
/* 800B86D4 000B4514 FC 18 88 40 */ fcmpo cr0, f24, f17
|
|
/* 800B86D8 000B4518 4C 41 13 82 */ cror eq, gt, eq
|
|
/* 800B86DC 000B451C 40 82 00 0C */ bne lbl_800B86E8
|
|
/* 800B86E0 000B4520 D2 41 00 10 */ stfs f18, 0x10(r1)
|
|
/* 800B86E4 000B4524 48 00 00 08 */ b lbl_800B86EC
|
|
.global lbl_800B86E8
|
|
lbl_800B86E8:
|
|
/* 800B86E8 000B4528 D2 C1 00 10 */ stfs f22, 0x10(r1)
|
|
.global lbl_800B86EC
|
|
lbl_800B86EC:
|
|
/* 800B86EC 000B452C C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 800B86F0 000B4530 EC 7A 07 F2 */ fmuls f3, f26, f31
|
|
/* 800B86F4 000B4534 EC 38 07 B2 */ fmuls f1, f24, f30
|
|
/* 800B86F8 000B4538 EC 59 00 32 */ fmuls f2, f25, f0
|
|
/* 800B86FC 000B453C D0 61 00 14 */ stfs f3, 0x14(r1)
|
|
/* 800B8700 000B4540 FC 11 D8 00 */ fcmpu cr0, f17, f27
|
|
/* 800B8704 000B4544 D0 41 00 18 */ stfs f2, 0x18(r1)
|
|
/* 800B8708 000B4548 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
/* 800B870C 000B454C 41 82 01 C8 */ beq lbl_800B88D4
|
|
/* 800B8710 000B4550 C0 01 00 08 */ lfs f0, 0x8(r1)
|
|
/* 800B8714 000B4554 FC 11 00 00 */ fcmpu cr0, f17, f0
|
|
/* 800B8718 000B4558 41 82 00 98 */ beq lbl_800B87B0
|
|
/* 800B871C 000B455C FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B8720 000B4560 FC 20 12 10 */ fabs f1, f2
|
|
/* 800B8724 000B4564 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B8728 000B4568 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B872C 000B456C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B8730 000B4570 40 81 00 08 */ ble lbl_800B8738
|
|
/* 800B8734 000B4574 48 00 00 08 */ b lbl_800B873C
|
|
.global lbl_800B8738
|
|
lbl_800B8738:
|
|
/* 800B8738 000B4578 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B873C
|
|
lbl_800B873C:
|
|
/* 800B873C 000B457C EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B8740 000B4580 4B F5 BD D1 */ bl tan
|
|
/* 800B8744 000B4584 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B8748 000B4588 C0 21 00 18 */ lfs f1, 0x18(r1)
|
|
/* 800B874C 000B458C C0 01 00 1C */ lfs f0, 0x1c(r1)
|
|
/* 800B8750 000B4590 EC 21 00 72 */ fmuls f1, f1, f1
|
|
/* 800B8754 000B4594 ED E0 20 30 */ fres f15, f4
|
|
/* 800B8758 000B4598 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B875C 000B459C 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B8760 000B45A0 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B8764 000B45A4 EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B8768 000B45A8 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B876C 000B45AC FC 10 88 40 */ fcmpo cr0, f16, f17
|
|
/* 800B8770 000B45B0 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B8774 000B45B4 40 82 00 0C */ bne lbl_800B8780
|
|
/* 800B8778 000B45B8 FC 00 88 90 */ fmr f0, f17
|
|
/* 800B877C 000B45BC 48 00 00 10 */ b lbl_800B878C
|
|
.global lbl_800B8780
|
|
lbl_800B8780:
|
|
/* 800B8780 000B45C0 FC 20 80 90 */ fmr f1, f16
|
|
/* 800B8784 000B45C4 48 04 62 ED */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B8788 000B45C8 EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B878C
|
|
lbl_800B878C:
|
|
/* 800B878C 000B45CC EC 6F 00 32 */ fmuls f3, f15, f0
|
|
/* 800B8790 000B45D0 C0 41 00 08 */ lfs f2, 0x8(r1)
|
|
/* 800B8794 000B45D4 C0 21 00 18 */ lfs f1, 0x18(r1)
|
|
/* 800B8798 000B45D8 C0 01 00 1C */ lfs f0, 0x1c(r1)
|
|
/* 800B879C 000B45DC EC 42 00 F2 */ fmuls f2, f2, f3
|
|
/* 800B87A0 000B45E0 D0 21 00 0C */ stfs f1, 0xc(r1)
|
|
/* 800B87A4 000B45E4 D0 41 00 08 */ stfs f2, 0x8(r1)
|
|
/* 800B87A8 000B45E8 D0 01 00 10 */ stfs f0, 0x10(r1)
|
|
/* 800B87AC 000B45EC 48 00 01 28 */ b lbl_800B88D4
|
|
.global lbl_800B87B0
|
|
lbl_800B87B0:
|
|
/* 800B87B0 000B45F0 C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 800B87B4 000B45F4 FC 11 00 00 */ fcmpu cr0, f17, f0
|
|
/* 800B87B8 000B45F8 41 82 00 94 */ beq lbl_800B884C
|
|
/* 800B87BC 000B45FC FC 00 0A 10 */ fabs f0, f1
|
|
/* 800B87C0 000B4600 FC 20 1A 10 */ fabs f1, f3
|
|
/* 800B87C4 000B4604 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B87C8 000B4608 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B87CC 000B460C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B87D0 000B4610 40 81 00 08 */ ble lbl_800B87D8
|
|
/* 800B87D4 000B4614 48 00 00 08 */ b lbl_800B87DC
|
|
.global lbl_800B87D8
|
|
lbl_800B87D8:
|
|
/* 800B87D8 000B4618 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B87DC
|
|
lbl_800B87DC:
|
|
/* 800B87DC 000B461C EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B87E0 000B4620 4B F5 BD 31 */ bl tan
|
|
/* 800B87E4 000B4624 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B87E8 000B4628 C0 41 00 14 */ lfs f2, 0x14(r1)
|
|
/* 800B87EC 000B462C C0 01 00 1C */ lfs f0, 0x1c(r1)
|
|
/* 800B87F0 000B4630 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B87F4 000B4634 D0 41 00 08 */ stfs f2, 0x8(r1)
|
|
/* 800B87F8 000B4638 ED E0 20 30 */ fres f15, f4
|
|
/* 800B87FC 000B463C EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B8800 000B4640 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B8804 000B4644 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B8808 000B4648 EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B880C 000B464C 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B8810 000B4650 FC 10 88 40 */ fcmpo cr0, f16, f17
|
|
/* 800B8814 000B4654 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B8818 000B4658 40 82 00 0C */ bne lbl_800B8824
|
|
/* 800B881C 000B465C FC 00 88 90 */ fmr f0, f17
|
|
/* 800B8820 000B4660 48 00 00 10 */ b lbl_800B8830
|
|
.global lbl_800B8824
|
|
lbl_800B8824:
|
|
/* 800B8824 000B4664 FC 20 80 90 */ fmr f1, f16
|
|
/* 800B8828 000B4668 48 04 62 49 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B882C 000B466C EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B8830
|
|
lbl_800B8830:
|
|
/* 800B8830 000B4670 EC 4F 00 32 */ fmuls f2, f15, f0
|
|
/* 800B8834 000B4674 C0 01 00 1C */ lfs f0, 0x1c(r1)
|
|
/* 800B8838 000B4678 C0 21 00 0C */ lfs f1, 0xc(r1)
|
|
/* 800B883C 000B467C D0 01 00 10 */ stfs f0, 0x10(r1)
|
|
/* 800B8840 000B4680 EC 01 00 B2 */ fmuls f0, f1, f2
|
|
/* 800B8844 000B4684 D0 01 00 0C */ stfs f0, 0xc(r1)
|
|
/* 800B8848 000B4688 48 00 00 8C */ b lbl_800B88D4
|
|
.global lbl_800B884C
|
|
lbl_800B884C:
|
|
/* 800B884C 000B468C FC 00 12 10 */ fabs f0, f2
|
|
/* 800B8850 000B4690 FC 20 1A 10 */ fabs f1, f3
|
|
/* 800B8854 000B4694 FC 00 00 18 */ frsp f0, f0
|
|
/* 800B8858 000B4698 FC 20 08 18 */ frsp f1, f1
|
|
/* 800B885C 000B469C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 800B8860 000B46A0 40 81 00 08 */ ble lbl_800B8868
|
|
/* 800B8864 000B46A4 48 00 00 08 */ b lbl_800B886C
|
|
.global lbl_800B8868
|
|
lbl_800B8868:
|
|
/* 800B8868 000B46A8 FC 20 00 90 */ fmr f1, f0
|
|
.global lbl_800B886C
|
|
lbl_800B886C:
|
|
/* 800B886C 000B46AC EC 21 06 F2 */ fmuls f1, f1, f27
|
|
/* 800B8870 000B46B0 4B F5 BC A1 */ bl tan
|
|
/* 800B8874 000B46B4 FC 80 08 18 */ frsp f4, f1
|
|
/* 800B8878 000B46B8 C0 41 00 14 */ lfs f2, 0x14(r1)
|
|
/* 800B887C 000B46BC C0 01 00 18 */ lfs f0, 0x18(r1)
|
|
/* 800B8880 000B46C0 D0 01 00 0C */ stfs f0, 0xc(r1)
|
|
/* 800B8884 000B46C4 EC 22 00 B2 */ fmuls f1, f2, f2
|
|
/* 800B8888 000B46C8 ED E0 20 30 */ fres f15, f4
|
|
/* 800B888C 000B46CC D0 41 00 08 */ stfs f2, 0x8(r1)
|
|
/* 800B8890 000B46D0 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 800B8894 000B46D4 10 6F 78 2A */ ps_add f3, f15, f15
|
|
/* 800B8898 000B46D8 10 4F 03 F2 */ ps_mul f2, f15, f15
|
|
/* 800B889C 000B46DC EE 01 00 2A */ fadds f16, f1, f0
|
|
/* 800B88A0 000B46E0 11 E4 18 BC */ ps_nmsub f15, f4, f2, f3
|
|
/* 800B88A4 000B46E4 FC 10 88 40 */ fcmpo cr0, f16, f17
|
|
/* 800B88A8 000B46E8 4C 40 13 82 */ cror eq, lt, eq
|
|
/* 800B88AC 000B46EC 40 82 00 0C */ bne lbl_800B88B8
|
|
/* 800B88B0 000B46F0 FC 00 88 90 */ fmr f0, f17
|
|
/* 800B88B4 000B46F4 48 00 00 10 */ b lbl_800B88C4
|
|
.global lbl_800B88B8
|
|
lbl_800B88B8:
|
|
/* 800B88B8 000B46F8 FC 20 80 90 */ fmr f1, f16
|
|
/* 800B88BC 000B46FC 48 04 61 B5 */ bl FrSqrt__Q24nw4r4mathFf
|
|
/* 800B88C0 000B4700 EC 10 00 72 */ fmuls f0, f16, f1
|
|
.global lbl_800B88C4
|
|
lbl_800B88C4:
|
|
/* 800B88C4 000B4704 EC 2F 00 32 */ fmuls f1, f15, f0
|
|
/* 800B88C8 000B4708 C0 01 00 10 */ lfs f0, 0x10(r1)
|
|
/* 800B88CC 000B470C EC 00 00 72 */ fmuls f0, f0, f1
|
|
/* 800B88D0 000B4710 D0 01 00 10 */ stfs f0, 0x10(r1)
|
|
.global lbl_800B88D4
|
|
lbl_800B88D4:
|
|
/* 800B88D4 000B4714 FC 20 B8 90 */ fmr f1, f23
|
|
/* 800B88D8 000B4718 7F 43 D3 78 */ mr r3, r26
|
|
/* 800B88DC 000B471C 7F 66 DB 78 */ mr r6, r27
|
|
/* 800B88E0 000B4720 7F 87 E3 78 */ mr r7, r28
|
|
/* 800B88E4 000B4724 7F C8 F3 78 */ mr r8, r30
|
|
/* 800B88E8 000B4728 7F E9 FB 78 */ mr r9, r31
|
|
/* 800B88EC 000B472C 38 81 00 14 */ addi r4, r1, 0x14
|
|
/* 800B88F0 000B4730 38 A1 00 08 */ addi r5, r1, 0x8
|
|
/* 800B88F4 000B4734 4B FF E4 DD */ bl EmissionSub__Q34nw4r2ef15EmitterFormCubeFRQ34nw4r4math4VEC3RQ34nw4r4math4VEC3PQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManagerUsfPCQ34nw4r4math5MTX34
|
|
/* 800B88F8 000B4738 3A 31 00 01 */ addi r17, r17, 0x1
|
|
.global lbl_800B88FC
|
|
lbl_800B88FC:
|
|
/* 800B88FC 000B473C 7C 11 E8 00 */ cmpw r17, r29
|
|
/* 800B8900 000B4740 41 80 F7 50 */ blt lbl_800B8050
|
|
.global lbl_800B8904
|
|
lbl_800B8904:
|
|
/* 800B8904 000B4744 39 61 01 10 */ addi r11, r1, 0x110
|
|
/* 800B8908 000B4748 E3 E1 02 28 */ psq_l f31, 0x228(r1), 0, qr0
|
|
/* 800B890C 000B474C CB E1 02 20 */ lfd f31, 0x220(r1)
|
|
/* 800B8910 000B4750 E3 C1 02 18 */ psq_l f30, 0x218(r1), 0, qr0
|
|
/* 800B8914 000B4754 CB C1 02 10 */ lfd f30, 0x210(r1)
|
|
/* 800B8918 000B4758 E3 A1 02 08 */ psq_l f29, 0x208(r1), 0, qr0
|
|
/* 800B891C 000B475C CB A1 02 00 */ lfd f29, 0x200(r1)
|
|
/* 800B8920 000B4760 E3 81 01 F8 */ psq_l f28, 0x1f8(r1), 0, qr0
|
|
/* 800B8924 000B4764 CB 81 01 F0 */ lfd f28, 0x1f0(r1)
|
|
/* 800B8928 000B4768 E3 61 01 E8 */ psq_l f27, 0x1e8(r1), 0, qr0
|
|
/* 800B892C 000B476C CB 61 01 E0 */ lfd f27, 0x1e0(r1)
|
|
/* 800B8930 000B4770 E3 41 01 D8 */ psq_l f26, 0x1d8(r1), 0, qr0
|
|
/* 800B8934 000B4774 CB 41 01 D0 */ lfd f26, 0x1d0(r1)
|
|
/* 800B8938 000B4778 E3 21 01 C8 */ psq_l f25, 0x1c8(r1), 0, qr0
|
|
/* 800B893C 000B477C CB 21 01 C0 */ lfd f25, 0x1c0(r1)
|
|
/* 800B8940 000B4780 E3 01 01 B8 */ psq_l f24, 0x1b8(r1), 0, qr0
|
|
/* 800B8944 000B4784 CB 01 01 B0 */ lfd f24, 0x1b0(r1)
|
|
/* 800B8948 000B4788 E2 E1 01 A8 */ psq_l f23, 0x1a8(r1), 0, qr0
|
|
/* 800B894C 000B478C CA E1 01 A0 */ lfd f23, 0x1a0(r1)
|
|
/* 800B8950 000B4790 E2 C1 01 98 */ psq_l f22, 0x198(r1), 0, qr0
|
|
/* 800B8954 000B4794 CA C1 01 90 */ lfd f22, 0x190(r1)
|
|
/* 800B8958 000B4798 E2 A1 01 88 */ psq_l f21, 0x188(r1), 0, qr0
|
|
/* 800B895C 000B479C CA A1 01 80 */ lfd f21, 0x180(r1)
|
|
/* 800B8960 000B47A0 E2 81 01 78 */ psq_l f20, 0x178(r1), 0, qr0
|
|
/* 800B8964 000B47A4 CA 81 01 70 */ lfd f20, 0x170(r1)
|
|
/* 800B8968 000B47A8 E2 61 01 68 */ psq_l f19, 0x168(r1), 0, qr0
|
|
/* 800B896C 000B47AC CA 61 01 60 */ lfd f19, 0x160(r1)
|
|
/* 800B8970 000B47B0 E2 41 01 58 */ psq_l f18, 0x158(r1), 0, qr0
|
|
/* 800B8974 000B47B4 CA 41 01 50 */ lfd f18, 0x150(r1)
|
|
/* 800B8978 000B47B8 E2 21 01 48 */ psq_l f17, 0x148(r1), 0, qr0
|
|
/* 800B897C 000B47BC CA 21 01 40 */ lfd f17, 0x140(r1)
|
|
/* 800B8980 000B47C0 E2 01 01 38 */ psq_l f16, 0x138(r1), 0, qr0
|
|
/* 800B8984 000B47C4 CA 01 01 30 */ lfd f16, 0x130(r1)
|
|
/* 800B8988 000B47C8 E1 E1 01 28 */ psq_l f15, 0x128(r1), 0, qr0
|
|
/* 800B898C 000B47CC C9 E1 01 20 */ lfd f15, 0x120(r1)
|
|
/* 800B8990 000B47D0 E1 C1 01 18 */ psq_l f14, 0x118(r1), 0, qr0
|
|
/* 800B8994 000B47D4 C9 C1 01 10 */ lfd f14, 0x110(r1)
|
|
/* 800B8998 000B47D8 4B F4 E9 C9 */ bl lbl_80007360
|
|
/* 800B899C 000B47DC 80 01 02 34 */ lwz r0, 0x234(r1)
|
|
/* 800B89A0 000B47E0 7C 08 03 A6 */ mtlr r0
|
|
/* 800B89A4 000B47E4 38 21 02 30 */ addi r1, r1, 0x230
|
|
/* 800B89A8 000B47E8 4E 80 00 20 */ blr
|
|
/* 800B89AC 000B47EC 00 00 00 00 */ .4byte 0x00000000
|
|
.include "macros.inc"
|
|
|
|
.section .data, "wa" # 0x80421040 - 0x80496700 ; 0x000756C0
|
|
.global __vt__Q34nw4r2ef15EmitterFormCube
|
|
__vt__Q34nw4r2ef15EmitterFormCube:
|
|
|
|
.4byte 0
|
|
.4byte 0
|
|
.4byte Emission__Q34nw4r2ef15EmitterFormCubeFPQ34nw4r2ef7EmitterPQ34nw4r2ef15ParticleManageriUlPfUsfPCQ34nw4r4math5MTX34
|
|
.4byte 0
|
|
.include "macros.inc"
|
|
|
|
.section .sdata2, "wa" # 0x8055DF80 - 0x805643C0 ; 0x00006440
|
|
.global "@8286"
|
|
"@8286":
|
|
|
|
.4byte 0x00800000
|
|
|
|
.global "@8287"
|
|
"@8287":
|
|
|
|
.4byte 0x47800000
|
|
|
|
.global "@8288"
|
|
"@8288":
|
|
|
|
.4byte 0x40000000
|
|
|
|
.global "@8289"
|
|
"@8289":
|
|
|
|
.4byte 0x3F800000
|
|
|
|
.global "@8290"
|
|
"@8290":
|
|
|
|
.4byte 0
|
|
|
|
.global "@8291"
|
|
"@8291":
|
|
|
|
.4byte 0x3C23D70A
|
|
|
|
.global "@8300"
|
|
"@8300":
|
|
|
|
.4byte 0x43300000
|
|
.4byte 0
|
|
|
|
.global "@8301"
|
|
"@8301":
|
|
|
|
.4byte 0x43300000
|
|
.4byte 0x80000000
|
|
|
|
.global "@9190"
|
|
"@9190":
|
|
|
|
.4byte 0x3727C5AC
|
|
|
|
.global "@9191"
|
|
"@9191":
|
|
|
|
.4byte 0x40490FDB
|
|
|
|
.global "@9192"
|
|
"@9192":
|
|
|
|
.4byte 0x34C90FDB
|
|
|
|
.global "@9193"
|
|
"@9193":
|
|
|
|
.4byte 0xBF800000
|