261 lines
12 KiB
ArmAsm
261 lines
12 KiB
ArmAsm
.include "macros.inc"
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.section .init, "ax" # 0x80004000 - 0x80006740
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.global __check_pad3
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__check_pad3:
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/* 800062C0 000023C0 3C 60 80 00 */ lis r3, 0x800030E4@ha
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/* 800062C4 000023C4 A0 03 30 E4 */ lhz r0, 0x800030E4@l(r3)
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/* 800062C8 000023C8 70 00 0E EF */ andi. r0, r0, 0xeef
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/* 800062CC 000023CC 2C 00 0E EF */ cmpwi r0, 0xeef
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/* 800062D0 000023D0 4C 82 00 20 */ bnelr
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/* 800062D4 000023D4 38 60 00 00 */ li r3, 0
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/* 800062D8 000023D8 38 80 00 00 */ li r4, 0
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/* 800062DC 000023DC 38 A0 00 00 */ li r5, 0
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/* 800062E0 000023E0 48 01 D5 40 */ b OSResetSystem
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/* 800062E4 000023E4 4E 80 00 20 */ blr
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/* 800062E8 000023E8 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 800062EC 000023EC 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __set_debug_bba
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__set_debug_bba:
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/* 800062F0 000023F0 38 00 00 01 */ li r0, 1
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/* 800062F4 000023F4 98 0D E4 58 */ stb r0, Debug_BBA-_SDA_BASE_(r13)
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/* 800062F8 000023F8 4E 80 00 20 */ blr
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/* 800062FC 000023FC 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __get_debug_bba
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__get_debug_bba:
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/* 80006300 00002400 88 6D E4 58 */ lbz r3, Debug_BBA-_SDA_BASE_(r13)
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/* 80006304 00002404 4E 80 00 20 */ blr
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/* 80006308 00002408 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 8000630C 0000240C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __start
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__start:
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/* 80006310 00002410 48 00 01 C1 */ bl __init_registers
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/* 80006314 00002414 48 00 02 4D */ bl __init_data
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/* 80006318 00002418 48 00 03 09 */ bl __init_hardware
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/* 8000631C 0000241C 38 00 FF FF */ li r0, -1
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/* 80006320 00002420 94 21 FF F8 */ stwu r1, -8(r1)
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/* 80006324 00002424 90 01 00 04 */ stw r0, 4(r1)
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/* 80006328 00002428 90 01 00 00 */ stw r0, 0(r1)
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/* 8000632C 0000242C 38 00 00 00 */ li r0, 0
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/* 80006330 00002430 3C C0 80 00 */ lis r6, 0x80000044@ha
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/* 80006334 00002434 38 C6 00 44 */ addi r6, r6, 0x80000044@l
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/* 80006338 00002438 90 06 00 00 */ stw r0, 0(r6)
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/* 8000633C 0000243C 3C C0 80 00 */ lis r6, 0x800000F4@ha
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/* 80006340 00002440 38 C6 00 F4 */ addi r6, r6, 0x800000F4@l
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/* 80006344 00002444 80 C6 00 00 */ lwz r6, 0(r6)
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/* 80006348 00002448 28 06 00 00 */ cmplwi r6, 0
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/* 8000634C 0000244C 41 82 00 0C */ beq lbl_80006358
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/* 80006350 00002450 80 E6 00 0C */ lwz r7, 0xc(r6)
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/* 80006354 00002454 48 00 00 24 */ b lbl_80006378
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lbl_80006358:
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/* 80006358 00002458 3C A0 80 00 */ lis r5, 0x80000034@ha
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/* 8000635C 0000245C 38 A5 00 34 */ addi r5, r5, 0x80000034@l
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/* 80006360 00002460 80 A5 00 00 */ lwz r5, 0(r5)
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/* 80006364 00002464 28 05 00 00 */ cmplwi r5, 0
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/* 80006368 00002468 41 82 00 4C */ beq lbl_800063B4
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/* 8000636C 0000246C 3C E0 80 00 */ lis r7, 0x800030E8@ha
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/* 80006370 00002470 38 E7 30 E8 */ addi r7, r7, 0x800030E8@l
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/* 80006374 00002474 80 E7 00 00 */ lwz r7, 0(r7)
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lbl_80006378:
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/* 80006378 00002478 38 A0 00 00 */ li r5, 0
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/* 8000637C 0000247C 28 07 00 02 */ cmplwi r7, 2
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/* 80006380 00002480 41 82 00 24 */ beq lbl_800063A4
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/* 80006384 00002484 28 07 00 03 */ cmplwi r7, 3
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/* 80006388 00002488 38 A0 00 01 */ li r5, 1
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/* 8000638C 0000248C 41 82 00 18 */ beq lbl_800063A4
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/* 80006390 00002490 28 07 00 04 */ cmplwi r7, 4
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/* 80006394 00002494 40 82 00 20 */ bne lbl_800063B4
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/* 80006398 00002498 38 A0 00 02 */ li r5, 2
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/* 8000639C 0000249C 4B FF FF 55 */ bl __set_debug_bba
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/* 800063A0 000024A0 48 00 00 14 */ b lbl_800063B4
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lbl_800063A4:
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/* 800063A4 000024A4 3C C0 80 01 */ lis r6, InitMetroTRK@ha
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/* 800063A8 000024A8 38 C6 5A 14 */ addi r6, r6, InitMetroTRK@l
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/* 800063AC 000024AC 7C C8 03 A6 */ mtlr r6
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/* 800063B0 000024B0 4E 80 00 21 */ blrl
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lbl_800063B4:
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/* 800063B4 000024B4 3C C0 80 00 */ lis r6, 0x800000F4@ha
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/* 800063B8 000024B8 38 C6 00 F4 */ addi r6, r6, 0x800000F4@l
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/* 800063BC 000024BC 80 A6 00 00 */ lwz r5, 0(r6)
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/* 800063C0 000024C0 28 05 00 00 */ cmplwi r5, 0
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/* 800063C4 000024C4 41 A2 00 60 */ beq+ lbl_80006424
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/* 800063C8 000024C8 80 C5 00 08 */ lwz r6, 8(r5)
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/* 800063CC 000024CC 28 06 00 00 */ cmplwi r6, 0
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/* 800063D0 000024D0 41 A2 00 54 */ beq+ lbl_80006424
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/* 800063D4 000024D4 7C C5 32 14 */ add r6, r5, r6
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/* 800063D8 000024D8 81 C6 00 00 */ lwz r14, 0(r6)
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/* 800063DC 000024DC 28 0E 00 00 */ cmplwi r14, 0
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/* 800063E0 000024E0 41 82 00 44 */ beq lbl_80006424
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/* 800063E4 000024E4 39 E6 00 04 */ addi r15, r6, 4
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/* 800063E8 000024E8 7D C9 03 A6 */ mtctr r14
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lbl_800063EC:
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/* 800063EC 000024EC 38 C6 00 04 */ addi r6, r6, 4
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/* 800063F0 000024F0 80 E6 00 00 */ lwz r7, 0(r6)
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/* 800063F4 000024F4 7C E7 2A 14 */ add r7, r7, r5
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/* 800063F8 000024F8 90 E6 00 00 */ stw r7, 0(r6)
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/* 800063FC 000024FC 42 00 FF F0 */ bdnz lbl_800063EC
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/* 80006400 00002500 3C A0 80 00 */ lis r5, 0x80000034@ha
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/* 80006404 00002504 38 A5 00 34 */ addi r5, r5, 0x80000034@l
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/* 80006408 00002508 55 E7 00 34 */ rlwinm r7, r15, 0, 0, 0x1a
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/* 8000640C 0000250C 90 E5 00 00 */ stw r7, 0(r5)
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/* 80006410 00002510 3C A0 80 00 */ lis r5, 0x80003110@ha
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/* 80006414 00002514 38 A5 31 10 */ addi r5, r5, 0x80003110@l
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/* 80006418 00002518 55 E7 00 34 */ rlwinm r7, r15, 0, 0, 0x1a
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/* 8000641C 0000251C 90 E5 00 00 */ stw r7, 0(r5)
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/* 80006420 00002520 48 00 00 0C */ b lbl_8000642C
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lbl_80006424:
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/* 80006424 00002524 39 C0 00 00 */ li r14, 0
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/* 80006428 00002528 39 E0 00 00 */ li r15, 0
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lbl_8000642C:
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/* 8000642C 0000252C 48 01 49 55 */ bl OSInit
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/* 80006430 00002530 3C 80 80 00 */ lis r4, 0x800030E6@ha
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/* 80006434 00002534 38 84 30 E6 */ addi r4, r4, 0x800030E6@l
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/* 80006438 00002538 A0 64 00 00 */ lhz r3, 0(r4)
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/* 8000643C 0000253C 70 65 80 00 */ andi. r5, r3, 0x8000
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/* 80006440 00002540 41 82 00 10 */ beq lbl_80006450
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/* 80006444 00002544 70 63 7F FF */ andi. r3, r3, 0x7fff
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/* 80006448 00002548 28 03 00 01 */ cmplwi r3, 1
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/* 8000644C 0000254C 40 82 00 08 */ bne lbl_80006454
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lbl_80006450:
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/* 80006450 00002550 4B FF FE 71 */ bl __check_pad3
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lbl_80006454:
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/* 80006454 00002554 4B FF FE AD */ bl __get_debug_bba
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/* 80006458 00002558 28 03 00 01 */ cmplwi r3, 1
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/* 8000645C 0000255C 40 82 00 08 */ bne lbl_80006464
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/* 80006460 00002560 48 00 F6 4D */ bl InitMetroTRK_BBA
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lbl_80006464:
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/* 80006464 00002564 48 02 20 CD */ bl __init_user
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/* 80006468 00002568 7D C3 73 78 */ mr r3, r14
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/* 8000646C 0000256C 7D E4 7B 78 */ mr r4, r15
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/* 80006470 00002570 48 16 E6 69 */ bl main
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/* 80006474 00002574 48 02 21 2C */ b exit
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/* 80006478 00002578 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 8000647C 0000257C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __my_flush_cache
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__my_flush_cache:
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/* 80006480 00002580 28 04 00 00 */ cmplwi r4, 0
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/* 80006484 00002584 4C 81 00 20 */ blelr
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/* 80006488 00002588 54 65 06 FE */ clrlwi r5, r3, 0x1b
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/* 8000648C 0000258C 7C 84 2A 14 */ add r4, r4, r5
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/* 80006490 00002590 38 84 00 1F */ addi r4, r4, 0x1f
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/* 80006494 00002594 54 84 D9 7E */ srwi r4, r4, 5
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/* 80006498 00002598 7C 89 03 A6 */ mtctr r4
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lbl_8000649C:
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/* 8000649C 0000259C 7C 00 18 AC */ dcbf 0, r3
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/* 800064A0 000025A0 38 63 00 20 */ addi r3, r3, 0x20
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/* 800064A4 000025A4 42 00 FF F8 */ bdnz lbl_8000649C
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/* 800064A8 000025A8 7C D0 FA A6 */ mfspr r6, 0x3f0
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/* 800064AC 000025AC 60 C7 00 08 */ ori r7, r6, 8
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/* 800064B0 000025B0 7C F0 FB A6 */ mtspr 0x3f0, r7
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/* 800064B4 000025B4 4C 00 01 2C */ isync
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/* 800064B8 000025B8 7C 00 04 AC */ sync 0
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/* 800064BC 000025BC 7C D0 FB A6 */ mtspr 0x3f0, r6
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/* 800064C0 000025C0 4E 80 00 20 */ blr
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/* 800064C4 000025C4 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 800064C8 000025C8 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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/* 800064CC 000025CC 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.global __init_registers
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__init_registers:
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/* 800064D0 000025D0 38 00 00 00 */ li r0, 0
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/* 800064D4 000025D4 38 60 00 00 */ li r3, 0
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/* 800064D8 000025D8 38 80 00 00 */ li r4, 0
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/* 800064DC 000025DC 38 A0 00 00 */ li r5, 0
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/* 800064E0 000025E0 38 C0 00 00 */ li r6, 0
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/* 800064E4 000025E4 38 E0 00 00 */ li r7, 0
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/* 800064E8 000025E8 39 00 00 00 */ li r8, 0
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/* 800064EC 000025EC 39 20 00 00 */ li r9, 0
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/* 800064F0 000025F0 39 40 00 00 */ li r10, 0
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/* 800064F4 000025F4 39 60 00 00 */ li r11, 0
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/* 800064F8 000025F8 39 80 00 00 */ li r12, 0
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/* 800064FC 000025FC 39 C0 00 00 */ li r14, 0
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/* 80006500 00002600 39 E0 00 00 */ li r15, 0
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/* 80006504 00002604 3A 00 00 00 */ li r16, 0
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/* 80006508 00002608 3A 20 00 00 */ li r17, 0
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/* 8000650C 0000260C 3A 40 00 00 */ li r18, 0
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/* 80006510 00002610 3A 60 00 00 */ li r19, 0
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/* 80006514 00002614 3A 80 00 00 */ li r20, 0
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/* 80006518 00002618 3A A0 00 00 */ li r21, 0
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/* 8000651C 0000261C 3A C0 00 00 */ li r22, 0
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/* 80006520 00002620 3A E0 00 00 */ li r23, 0
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/* 80006524 00002624 3B 00 00 00 */ li r24, 0
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/* 80006528 00002628 3B 20 00 00 */ li r25, 0
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/* 8000652C 0000262C 3B 40 00 00 */ li r26, 0
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/* 80006530 00002630 3B 60 00 00 */ li r27, 0
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/* 80006534 00002634 3B 80 00 00 */ li r28, 0
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/* 80006538 00002638 3B A0 00 00 */ li r29, 0
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/* 8000653C 0000263C 3B C0 00 00 */ li r30, 0
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/* 80006540 00002640 3B E0 00 00 */ li r31, 0
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/* 80006544 00002644 3C 20 80 58 */ lis r1, 0x80585000@h
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/* 80006548 00002648 60 21 50 00 */ ori r1, r1, 0x80585000@l
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/* 8000654C 0000264C 3C 40 80 56 */ lis r2, 0x80565F80@h
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/* 80006550 00002650 60 42 5F 80 */ ori r2, r2, 0x80565F80@l
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/* 80006554 00002654 3D A0 80 55 */ lis r13, $$2523@h
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/* 80006558 00002658 61 AD E4 20 */ ori r13, r13, $$2523@l
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/* 8000655C 0000265C 4E 80 00 20 */ blr
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.global __init_data
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__init_data:
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/* 80006560 00002660 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 80006564 00002664 7C 08 02 A6 */ mflr r0
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/* 80006568 00002668 90 01 00 24 */ stw r0, 0x24(r1)
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/* 8000656C 0000266C 93 E1 00 1C */ stw r31, 0x1c(r1)
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/* 80006570 00002670 93 C1 00 18 */ stw r30, 0x18(r1)
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/* 80006574 00002674 93 A1 00 14 */ stw r29, 0x14(r1)
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/* 80006578 00002678 3F A0 80 00 */ lis r29, _rom_copy_info@ha
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/* 8000657C 0000267C 3B BD 66 84 */ addi r29, r29, _rom_copy_info@l
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lbl_80006580:
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/* 80006580 00002680 83 DD 00 08 */ lwz r30, 8(r29)
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/* 80006584 00002684 2C 1E 00 00 */ cmpwi r30, 0
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/* 80006588 00002688 41 82 00 38 */ beq lbl_800065C0
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/* 8000658C 0000268C 80 9D 00 00 */ lwz r4, 0(r29)
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/* 80006590 00002690 83 FD 00 04 */ lwz r31, 4(r29)
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/* 80006594 00002694 41 82 00 24 */ beq lbl_800065B8
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/* 80006598 00002698 7C 1F 20 40 */ cmplw r31, r4
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/* 8000659C 0000269C 41 82 00 1C */ beq lbl_800065B8
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/* 800065A0 000026A0 7F E3 FB 78 */ mr r3, r31
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/* 800065A4 000026A4 7F C5 F3 78 */ mr r5, r30
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/* 800065A8 000026A8 4B FF DA 59 */ bl memcpy
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/* 800065AC 000026AC 7F E3 FB 78 */ mr r3, r31
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/* 800065B0 000026B0 7F C4 F3 78 */ mr r4, r30
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/* 800065B4 000026B4 48 00 00 9D */ bl __flush_cache
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lbl_800065B8:
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/* 800065B8 000026B8 3B BD 00 0C */ addi r29, r29, 0xc
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/* 800065BC 000026BC 4B FF FF C4 */ b lbl_80006580
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lbl_800065C0:
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/* 800065C0 000026C0 3F A0 80 00 */ lis r29, _bss_init_info@ha
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/* 800065C4 000026C4 3B BD 67 08 */ addi r29, r29, _bss_init_info@l
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lbl_800065C8:
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/* 800065C8 000026C8 83 DD 00 04 */ lwz r30, 4(r29)
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/* 800065CC 000026CC 2C 1E 00 00 */ cmpwi r30, 0
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/* 800065D0 000026D0 41 82 00 30 */ beq lbl_80006600
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/* 800065D4 000026D4 83 FD 00 00 */ lwz r31, 0(r29)
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/* 800065D8 000026D8 41 82 00 20 */ beq lbl_800065F8
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/* 800065DC 000026DC 7F E3 FB 78 */ mr r3, r31
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/* 800065E0 000026E0 7F C5 F3 78 */ mr r5, r30
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/* 800065E4 000026E4 38 80 00 00 */ li r4, 0
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/* 800065E8 000026E8 4B FF DD 69 */ bl memset
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/* 800065EC 000026EC 7F E3 FB 78 */ mr r3, r31
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/* 800065F0 000026F0 7F C4 F3 78 */ mr r4, r30
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/* 800065F4 000026F4 4B FF FE 8D */ bl __my_flush_cache
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lbl_800065F8:
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/* 800065F8 000026F8 3B BD 00 08 */ addi r29, r29, 8
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/* 800065FC 000026FC 4B FF FF CC */ b lbl_800065C8
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lbl_80006600:
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/* 80006600 00002700 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 80006604 00002704 83 E1 00 1C */ lwz r31, 0x1c(r1)
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/* 80006608 00002708 83 C1 00 18 */ lwz r30, 0x18(r1)
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/* 8000660C 0000270C 83 A1 00 14 */ lwz r29, 0x14(r1)
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/* 80006610 00002710 7C 08 03 A6 */ mtlr r0
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/* 80006614 00002714 38 21 00 20 */ addi r1, r1, 0x20
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/* 80006618 00002718 4E 80 00 20 */ blr
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/* 8000661C 0000271C 00 00 00 00 */ .4byte 0x00000000 /* unknown instruction */
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.section .bss, "wa" # 0x80496700 - 0x805643FC
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.global Debug_BBA
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Debug_BBA:
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.skip 0x8
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