donut-decomp/asm/bte/btm_discovery.s

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4.1 KiB
ArmAsm
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.include "macros.inc"
.section .text, "ax" # 0x80006A00 - 0x80406260 ; 0x003FF860
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.global btm_discovery_db_init
btm_discovery_db_init:
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/* 80081B7C 0007D9BC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80081B80 0007D9C0 7C 08 02 A6 */ mflr r0
/* 80081B84 0007D9C4 38 80 00 00 */ li r4, 0x0
/* 80081B88 0007D9C8 38 A0 10 20 */ li r5, 0x1020
/* 80081B8C 0007D9CC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80081B90 0007D9D0 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80081B94 0007D9D4 3F E0 80 4F */ lis r31, btm_cb@ha
/* 80081B98 0007D9D8 3B FF 5F 58 */ addi r31, r31, btm_cb@l
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/* 80081B9C 0007D9DC 38 1F 06 D4 */ addi r0, r31, 0x6d4
/* 80081BA0 0007D9E0 90 1F 16 78 */ stw r0, 0x1678(r31)
/* 80081BA4 0007D9E4 38 7F 06 58 */ addi r3, r31, 0x658
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/* 80081BA8 0007D9E8 4B F8 27 A9 */ bl memset
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/* 80081BAC 0007D9EC 38 60 00 01 */ li r3, 0x1
/* 80081BB0 0007D9F0 38 80 00 02 */ li r4, 0x2
/* 80081BB4 0007D9F4 38 00 10 02 */ li r0, 0x1002
/* 80081BB8 0007D9F8 B0 7F 06 70 */ sth r3, 0x670(r31)
/* 80081BBC 0007D9FC 80 7F 16 78 */ lwz r3, 0x1678(r31)
/* 80081BC0 0007DA00 38 DF 06 74 */ addi r6, r31, 0x674
/* 80081BC4 0007DA04 B0 9F 06 74 */ sth r4, 0x674(r31)
/* 80081BC8 0007DA08 38 80 0F A0 */ li r4, 0xfa0
/* 80081BCC 0007DA0C 38 A0 00 01 */ li r5, 0x1
/* 80081BD0 0007DA10 38 E0 00 00 */ li r7, 0x0
/* 80081BD4 0007DA14 B0 1F 06 78 */ sth r0, 0x678(r31)
/* 80081BD8 0007DA18 39 00 00 00 */ li r8, 0x0
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/* 80081BDC 0007DA1C 48 01 AB B5 */ bl SDP_InitDiscoveryDb
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/* 80081BE0 0007DA20 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80081BE4 0007DA24 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80081BE8 0007DA28 7C 08 03 A6 */ mtlr r0
/* 80081BEC 0007DA2C 38 21 00 10 */ addi r1, r1, 0x10
/* 80081BF0 0007DA30 4E 80 00 20 */ blr
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.global btm_discovery_db_reset
btm_discovery_db_reset:
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/* 80081BF4 0007DA34 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80081BF8 0007DA38 7C 08 02 A6 */ mflr r0
/* 80081BFC 0007DA3C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80081C00 0007DA40 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80081C04 0007DA44 3F E0 80 4F */ lis r31, btm_cb@ha
/* 80081C08 0007DA48 3B FF 5F 58 */ addi r31, r31, btm_cb@l
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/* 80081C0C 0007DA4C 38 7F 06 58 */ addi r3, r31, 0x658
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/* 80081C10 0007DA50 4B FF 63 11 */ bl btu_stop_timer
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/* 80081C14 0007DA54 88 1F 16 74 */ lbz r0, 0x1674(r31)
/* 80081C18 0007DA58 2C 00 00 00 */ cmpwi r0, 0x0
/* 80081C1C 0007DA5C 41 82 00 28 */ beq lbl_80081C44
/* 80081C20 0007DA60 81 9F 06 D0 */ lwz r12, 0x6d0(r31)
/* 80081C24 0007DA64 38 00 00 00 */ li r0, 0x0
/* 80081C28 0007DA68 98 1F 16 74 */ stb r0, 0x1674(r31)
/* 80081C2C 0007DA6C 2C 0C 00 00 */ cmpwi r12, 0x0
/* 80081C30 0007DA70 90 1F 06 D0 */ stw r0, 0x6d0(r31)
/* 80081C34 0007DA74 41 82 00 10 */ beq lbl_80081C44
/* 80081C38 0007DA78 38 60 00 00 */ li r3, 0x0
/* 80081C3C 0007DA7C 7D 89 03 A6 */ mtctr r12
/* 80081C40 0007DA80 4E 80 04 21 */ bctrl
.global lbl_80081C44
lbl_80081C44:
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/* 80081C44 0007DA84 3F E0 80 4F */ lis r31, btm_cb@ha
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/* 80081C48 0007DA88 38 80 00 00 */ li r4, 0x0
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/* 80081C4C 0007DA8C 3B FF 5F 58 */ addi r31, r31, btm_cb@l
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/* 80081C50 0007DA90 38 A0 10 20 */ li r5, 0x1020
/* 80081C54 0007DA94 38 1F 06 D4 */ addi r0, r31, 0x6d4
/* 80081C58 0007DA98 90 1F 16 78 */ stw r0, 0x1678(r31)
/* 80081C5C 0007DA9C 38 7F 06 58 */ addi r3, r31, 0x658
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/* 80081C60 0007DAA0 4B F8 26 F1 */ bl memset
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/* 80081C64 0007DAA4 38 60 00 01 */ li r3, 0x1
/* 80081C68 0007DAA8 38 80 00 02 */ li r4, 0x2
/* 80081C6C 0007DAAC 38 00 10 02 */ li r0, 0x1002
/* 80081C70 0007DAB0 B0 7F 06 70 */ sth r3, 0x670(r31)
/* 80081C74 0007DAB4 80 7F 16 78 */ lwz r3, 0x1678(r31)
/* 80081C78 0007DAB8 38 DF 06 74 */ addi r6, r31, 0x674
/* 80081C7C 0007DABC B0 9F 06 74 */ sth r4, 0x674(r31)
/* 80081C80 0007DAC0 38 80 0F A0 */ li r4, 0xfa0
/* 80081C84 0007DAC4 38 A0 00 01 */ li r5, 0x1
/* 80081C88 0007DAC8 38 E0 00 00 */ li r7, 0x0
/* 80081C8C 0007DACC B0 1F 06 78 */ sth r0, 0x678(r31)
/* 80081C90 0007DAD0 39 00 00 00 */ li r8, 0x0
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/* 80081C94 0007DAD4 48 01 AA FD */ bl SDP_InitDiscoveryDb
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/* 80081C98 0007DAD8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80081C9C 0007DADC 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80081CA0 0007DAE0 7C 08 03 A6 */ mtlr r0
/* 80081CA4 0007DAE4 38 21 00 10 */ addi r1, r1, 0x10
/* 80081CA8 0007DAE8 4E 80 00 20 */ blr